JEDEC JESD22-A101D-2015 Steady-State Temperature-Humidity Bias Life Test.pdf
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1、JEDEC STANDARD Steady-State Temperature-Humidity Bias Life Test JESD22-A101D (Revision of JESD22-A101C, March 2009) JULY 2015 JEDEC SOLID STATE TECHNOLOGY ASSOCIATION NOTICE JEDEC standards and publications contain material that has been prepared, reviewed, and approved through the JEDEC Board of Di
2、rectors level and subsequently reviewed and approved by the JEDEC legal counsel. JEDEC standards and publications are designed to serve the public interest through eliminating misunderstandings between manufacturers and purchasers, facilitating interchangeability and improvement of products, and ass
3、isting the purchaser in selecting and obtaining with minimum delay the proper product for use by those other than JEDEC members, whether the standard is to be used either domestically or internationally. JEDEC standards and publications are adopted without regard to whether or not their adoption may
4、 involve patents or articles, materials, or processes. By such action JEDEC does not assume any liability to any patent owner, nor does it assume any obligation whatever to parties adopting the JEDEC standards or publications. The information included in JEDEC standards and publications represents a
5、 sound approach to product specification and application, principally from the solid state device manufacturer viewpoint. Within the JEDEC organization there are procedures whereby a JEDEC standard or publication may be further processed and ultimately become an ANSI standard. No claims to be in con
6、formance with this standard may be made unless all requirements stated in the standard are met. Inquiries, comments, and suggestions relative to the content of this JEDEC standard or publication should be addressed to JEDEC at the address below, or refer to www.jedec.org under Standards and Document
7、s for alternative contact information. Published by JEDEC Solid State Technology Association 2015 3103 North 10th Street Suite 240 South Arlington, VA 22201-2107 This document may be downloaded free of charge; however JEDEC retains the copyright on this material. By downloading this file the individ
8、ual agrees not to charge for or resell the resulting material. PRICE: Contact JEDEC Printed in the U.S.A. All rights reserved PLEASE! DONT VIOLATE THE LAW! This document is copyrighted by JEDEC and may not be reproduced without permission. For information, contact: JEDEC Solid State Technology Assoc
9、iation 3103 North 10th Street Suite 240 South Arlington, VA 22201-2107 or refer to www.jedec.org under Standards-Documents/Copyright Information. JEDEC Standard No. 22-A101D Page 1 Test Method A101D (Revision of Test Method A101C) TEST METHOD A101D STEADY-STATE TEMPERATURE-HUMIDITY BIAS LIFE TEST (F
10、rom JEDEC Board Ballots JCB-96-64, JCB-09-10, and JCB-15-28, formulated under the cognizance of JC-14.1 Committee on Reliability Test Methods for Packaged Devices.) 1 Scope The Steady-State Temperature-Humidity Bias Life Test is performed to evaluate the reliability of non-hermetic packaged IC devic
11、es in humid environments. Temperature, humidity, and bias conditions are applied to accelerate the penetration of moisture through the external protective material (encapsulant or seal) or along the interface between the external protective material and the metallic conductors which pass through it.
12、 2 Apparatus The test requires a temperature-humidity test chamber capable of maintaining a specified temperature and relative humidity continuously, while providing electrical connections to the devices under test in a specified biasing configuration. 2.1 Temperature and relative humidity The chamb
13、er must be capable of providing controlled conditions of temperature and relative humidity during ramp-up to, and ramp-down from, the specified test conditions. NOTE Care should be taken to ensure the test chamber (dry-bulb) temperature exceeds the wet-bulb temperature at all times. 2.2 Devices unde
14、r stress Devices under stress must be physically located to minimize temperature gradients. NOTE Care should be taken to minimize relative humidity gradients and maximize air flow between devices. 2.3 Minimize release of contamination Care must be exercised in the choice of board and socket material
15、s to minimize release of contamination, and to minimize degradation due to corrosion and other mechanisms. 2.4 Ionic contamination Ionic contamination from the test apparatus (e.g., card cage, test boards, sockets, wiring, storage containers, etc.) shall be controlled to avoid test artifacts. 2.5 De
16、ionized water Deionized water with a minimum resistivity of 1 M-cm at room temperature shall be used. JEDEC Standard No. 22-A101D Page 2 Test Method A101D (Revision of Test Method A101C) 3 Test Conditions Test conditions consist of a temperature, relative humidity, and duration used in conjunction w
17、ith an electrical bias configuration specific to the device. 3.1 Temperature, Relative Humidity and Duration Temperature1dry-bulb C Relative Humidity1% Temperature2wet-bulb, C Vapor Pressure2kPa (psia) Duration3hours 85 2 85 5 81.0 49.1 (7.12) Typ. 1000 +168/-24 NOTE 1 Tolerances apply to the entire
18、 useable test area. NOTE 2 For information only. NOTE 3 The test conditions are to be applied continuously except during any interim readouts. For interim readouts, devices should be returned to stress within the time specified in 4.5. 3.2 Biasing guidelines Apply either of the two methods ofbias ac
19、cording to the following guidelines: a) Minimize power dissipation. b) Alternate pin bias as much as possible. c) Distribute potential differences across chip metallization as much as possible. d) Maximize voltage within operating range. NOTE The priority of the above guidelines depends on mechanism
20、 and specific device characteristics. e) Either of two methods of bias can be used to satisfy these guidelines, whichever is more severe: 1) Continuous bias: The dc bias shall be applied continuously. Continuous bias is more severe than cycled bias when the die temperature is 10 C higher than the ch
21、amber ambient temperature. If the die temperature is not known, when the heat dissipation of the device under test (DUT) is less than 200 mW. If the heat dissipation of the DUT exceeds 200 mW, then the die temperature should be calculated. If the die temperature exceeds the chamber ambient temperatu
22、re by more than 5 C then the die temperature rise above the chamber ambient should be included in reports of test results since acceleration of failure mechanisms will be affected. JEDEC Standard No. 22-A101D Page 3 Test Method A101D (Revision of Test Method A101C) 3.2 Biasing guidelines (contd) 2)
23、Cycled bias: The dc voltage applied to the devices under test shall be periodically interrupted with an appropriate frequency and duty cycle. If the biasing configuration results in a temperature rise above the chamber ambient, Tja, exceeding 10 C, then cycled bias, when optimized for a specific dev
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