TIA-423-B-1996 Electrical Characteristics of Unbalanced Voltage Digital Interface Circuits.pdf

1、 TIA-423-B-1995 APPROVED: MAY 10, 1995 REAFFIRMED: NOVEMBER 20, 2001 REAFFIRMED: DECEMBER 7, 2012 TIA-423-B (Revision of TIA-423-A) February 1996Electrical Characteristics of Unbalanced Voltage Digital Interface Circuits NOTICE TIA Engineering Standards and Publications are designed to serve the pub

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6、ory limitations before its use. (From Project No. 3-3058-RF2, formulated under the cognizance of the TIA TR-30.2 Subcommittee on DTE-DCE Interfaces and Protocols.) Published by TELECOMMUNICATIONS INDUSTRY ASSOCIATION Technology (b) there is no assurance that the Document will be approved by any Comm

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19、HEREOF, AND THESE CONTENTS WOULD NOT BE PUBLISHED BY TIA WITHOUT SUCH LIMITATIONS. TINEIA-423-6 FOREWORD (This foreword is not part of this Standard) This Standard was formulated under the cognizance of TIA Subcommittee TR-30.2 on Data Transmission Interfaces. This Standard specifies generators and

20、receivers capable of operating at data signaling rates nominally up to 100 kbits. No technical changes have been incorporated into TINEIA-423-B which will create compatibility problems with equipment conforming to previous versions of TIAEIA-423. Annex A of this Standard is informative and provides

21、guidelines for application. Annex B of this Standard is also informative and provides information on compatibility with other interface standards, information formerly contained in EIA Industrial Electronics Bulletin #12, and references to this Standard. Both Annexes are not considered part of this

22、Standard. I TINEIA-423-B BLANK PAGE TINEIA-423-6 ELECTRICAL CHARACTERISTICS OF UNBALANCED VOLTAGE DIGITAL INTERFACE CIRCUITS Contents Page 1 2 3 4 4.1 4.1.1 4.1.2 4.1.3 4.1.4 4.1.5 4.1.6 4.1.7 4.2 4.2.1 4.2.2 4.2.3 4.2.4 4.2.5 4.2.6 4.3 4.4 4.4.1 4.4.2 4.4.3 5 SCOPE 1 DEFINITIONS AND SYMBOLS 2 APPLI

23、CABILITY . 3 ELECTRICAL CHARACTERISTICS 5 Generator Characteristics Generator Output Impedance Open Circuit Measurement Test Termination Measurement Short-circuit Measurement . Power-off Measurement . Waveshaping Output Signal Waveform Load Characteristics . 10 Input Balance Measurements 14 Multiple

24、 Receiver Operation 14 Total Load Limit 16 Input Current-Voitage Measurements 11 Input Sensitivity Measurements 11 Failsafe Operation . 15 Interconnecting Cable Characteristics . 16 Signal Return 16 Signal Return Option 1 16 Signal Return Option 2 . 17 Signal Return Option 3 . 18 ENVIRONMENTAL CONST

25、RAINTS 19 6 CIRCUIT PROTECTION . 20 7 OPTIONAL GROUNDING ARRANGEMENTS 21 Signal Common . 21 7.1 Configuration A“ 22 7.1.1 7.1.2 Configuration B“ 22 *u *u TINEIA-423B Contents Page 7.2 Shield Ground 22 ANNEX A (informative) . 23 A . 1 Operational Constraints 23 A.2 Waveshaping 25 A.3 Codirectional an

26、d Contradirectional Timing Information . 26 ANNEX B (informative) - 77 . B . 1 Compatibility with Other Interface Standards . 27 B.l.l Compatibility With TIAEIA-422-B . 27 B.1.2 Compatibility With EIA/TIA-232-E and ElMIA-562 . 27 B.2 Related TINEIA Standards 29 iv TINEIA-423-B 1 SCOPE This Standard

27、specifies the electrical characteristics of the unbalanced voltage digital interface circuit, normally implemented in integrated circuit .technology, that may be employed when specified for the interchange of serial binary signals between Data Terminal Equipment (DTE) and Data Circuit-Terminating Eq

28、uipment (DCE) or in any point-to-point interconnection of serial binary signals between digital equipment. This Standard is compatible with ITU-T (Formerly CCilT) Recommendation V.l O. The interface circuit includes a generator connected by a interconnecting cable to a load consisting of a receiver

29、or receivers. The electrical characteristics of the circuit are specified in terms of required voltage, current, and resistance values obtained from direct measurements of the generator and receiver components at the interface points. The logic function of the generator and the receiver is not defin

30、ed by this Standard, as it is application dependent. The requirements for signal wave shaping, generally necessary to reduce unbalanced circuit near-end crosstalk to adjacent circuits, are also described. The receiver specification for the unbalanced interface is identical to that specified for the

31、balanced interface circuit in TINEIA-422-B. Minimum performance requirements for the interconnecting cable are furnished. Guidance is given in Annex A.l with respect to limitations on data signaling rate imposed by the parameters of the cable length and generation of near-end crosstalk. The paramete

32、r values specified for the unbalanced generator and load components of the interface are designed such that unbalanced interface circuits may be used within the same interconnection as balanced interface circuits specified by TINEIA-422-B. For example, the balanced circuits may be used for data and

33、timing while the unbalanced circuits may be used for low speed control functions. In addition, interoperation may be possible under certain conditions with generators and receivers of other digital interface standards such as EIWIA-232-E (see Annex B Section B.l). It is intended that this Standard w

34、ill be referenced by other standards that specify the complete DTE/DCE interface (Le., connector, pin .assignments, function) for applications where the electrical characteristics of an unbalanced voltage digital interface circuit are required. This Standard does not specify other characteristics of

35、 the DTE/DCE interface (such as signal quality and timing, etc.) essential for proper operation across the interface. When this Standard is referenced by other standards or specifications, it should be noted that certain options are available. The preparer of those referencing standards and specific

36、ations must determine and specify those optional features which are required for that application. 1 TINEIA-423-B 2 DEFINITIONS AND SYMBOLS For the purposes of this Standard, the following definitions apply: cable length, refers to twisted pair 24 AWG copper cable with a shunt capacitance of 52.5 pF

37、/meter (1 6 pF/foot) (see Annex A). data signaling rate, expressed in the units bit/s (bits per second), is the significant parameter. It may be different from the equipments data transfer rate, which employs the same units. Data signaling rate is defined as 1/T where T is the minimum interval betwe

38、en two significant instants. In a binary system for which this Standard is designed, the data signaling rate in bits and the modulation rate in bauds are numerically eaual when the unit interval used in each determination is the minimum interval. The data signaling rate on the interface lead is diff

39、erent from the equipments data transfer rate in those systems where modulation establishes a unit interval shorter than the duration of one information bit; such as, in biphase encoded systems where the data signaling rate is twice the data transfer rate. star (*) represents the opposite input condi

40、tion for a parameter. For example, the symbol Q represents the receiver output state for one input condition, while Q* represents the output state for the opposite input state. 2 TINEIA-423-B D T E A 3 APPLICABILITY I I I D D I D C C T I E I E E I I The provisions of this Standard may be applied to

41、the circuits employed at the interface between equipments where information being conveyed is in the form of binary signals at the dc baseband level. This Standard shall be referenced by the specifications and specific interface standards applying these electrical characteristics. Typical points of

42、applicability for this Standard are depicted in figure 1. I I D T E I I - D T E Legend: DTE = Data Terminal Equipment DCE = Data Circuit-Termhating Equipment = interface Generator -1nterfaceReceiver + =nterfaceirwit + = Telecommunications Channel Figure 1 - Applications of unbalanced voltage digital

43、 interface circuit The unbalanced voltage digital interface circuit will “normally“ be utilized on data and timing, or control circuits where the data signaling rate is nominally up to 100 kbit/s. Data signaling rates above 100 kbit/s may also be employed, however, the maximum operating distance wou

44、ld have to be shortened accordingly (see Annex A, Section A. 1 ). Unbalanced voltage digital interface devices meeting the electrical characteristics of this Standard need not operate over the entire data signaling rate range specified. They may be designed to operate over a narrower ranges to satis

45、fy more economically specific applications, particularly at the lower data signaling rates. 3 TINEIA-423-8 While the unbalanced interface is intended for use at the lower data signaling rates than the balanced interface, its general use is not recommended where the following conditions prevail: a. T

46、he interconnecting cable length is too long for effective unbalanced operation. b. The interconnecting cable is exposed to extraneous noise sources that may cause an unwanted voltage in excess of fl V measured differentially between the signal conductor and circuit common at the load end of the cabl

47、e with a 50 Q resistor substituted for the generator. c. It is necessary to minimize interference with other signals. While a restriction of maximum cable length in not specified, guidelines are given with respect to conservative operating distances as a function of data signaling rate (see Annex A,

48、 Section A.1). In general, these conservative values may be exceeded where the installation is engineered to ensure that noise and common potential difference values are held within specified limits. 4 TINEIA-423-6 4 ELECTRICAL CHARACTERISTICS The unbalanced voltage digital interface circuit is show

49、n in figure 2. The circuit consists of three parts: the generator (G), the interconnecting cable, and the load. The load is composed of one or more receivers (R). The electrical characteristics of the generator and receiver are specified in terms of direct electrical measurements while the interconnecting cable is described in terms of its electrical and physical characteristics. :+ GENERATOR INTERCONNECTING LOAD CABLE e Ai :A : /I V / n Y - w A cP Y B Vcpd b i To additional receivers, - - Legend: = ifanv. G = Generator R = Receiver Vcpd = Common Potential Difference A,C = G