IEC 60191-6-22-2012 Mechanical standardization of semiconductor devices - Part 6-22 General rules for the preparation of outline drawings of surface mounted semiconductor device pa.pdf

1、 IEC 60191-6-22 Edition 1.0 2012-12 INTERNATIONAL STANDARD NORME INTERNATIONALE Mechanical standardization of semiconductor devices Part 6-22: General rules for the preparation of outline drawings of surface mounted semiconductor device packages Design guide for semiconductor packages Silicon Fine-p

2、itch Ball Grid Array and Silicon Fine-pitch Land Grid Array (S-FBGA and S-FLGA) Normalisation mcanique des dispositifs semiconducteurs Partie 6-22: Rgles gnrales pour la prparation des dessins dencombrement des dispositifs semiconducteurs montage en surface Guide de conception pour les botiers matri

3、ciels billes et pas fins en silicium et botiers matriciels zone de contact plate et pas fins en silicium (S-FBGA et S-FLGA) IEC 60191-6-22:2012 THIS PUBLICATION IS COPYRIGHT PROTECTED Copyright 2012 IEC, Geneva, Switzerland All rights reserved. Unless otherwise specified, no part of this publication

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17、entaires sur cette publication ou si vous avez des questions contactez-nous: csciec.ch. IEC 60191-6-22 Edition 1.0 2012-12 INTERNATIONAL STANDARD NORME INTERNATIONALE Mechanical standardization of semiconductor devices Part 6-22: General rules for the preparation of outline drawings of surface mount

18、ed semiconductor device packages Design guide for semiconductor packages Silicon Fine-pitch Ball Grid Array and Silicon Fine-pitch Land Grid Array (S-FBGA and S-FLGA) Normalisation mcanique des dispositifs semiconducteurs Partie 6-22: Rgles gnrales pour la prparation des dessins dencombrement des di

19、spositifs semiconducteurs montage en surface Guide de conception pour les botiers matriciels billes et pas fins en silicium et botiers matriciels zone de contact plate et pas fins en silicium (S-FBGA et S-FLGA) INTERNATIONAL ELECTROTECHNICAL COMMISSION COMMISSION ELECTROTECHNIQUE INTERNATIONALE Q IC

20、S 31.080.01 PRICE CODE CODE PRIX ISBN 978-2-83220-526-6 Registered trademark of the International Electrotechnical Commission Marque dpose de la Commission Electrotechnique Internationale Warning! Make sure that you obtained this publication from an authorized distributor. Attention! Veuillez vous a

21、ssurer que vous avez obtenu cette publication via un distributeur agr. 2 60191-6-22 IEC:2012 CONTENTS FOREWORD . 3 1 Scope . 5 2 Normative references . 5 3 Terms and definitions . 5 4 Terminal position numbering . 5 5 Code of package nominal dimensions . 5 6 Symbols and drawings 6 7 Dimensions 9 7.1

22、 Group 1 . 9 7.2 Group 2 . 11 8 Combination list of D, E, M D , and M E12 Bibliography 17 Figure 1 S-FBGA outline 6 Figure 2 S-FLGA outline 7 Figure 3 Mechanical gauge drawing e). 8 Figure 4 Array of terminal-existence areas f). 8 Table 1 Dimensions and tolerances in Group 1 9 Table 2 Dimensions and

23、 tolerances of Group 2 11 Table 3 e= 0,80 mm pitch S-FBGA and S-FLGA . 12 Table 4 e= 0,65 mm pitch S-FBGA and S-FLGA . 12 Table 5 e= 0,50 mm pitch S-FBGA and S-FLGA . 13 Table 6 e= 0,40 mm pitch S-FBGA and S-FLGA . 14 Table 7 e= 0,30 mm pitch S-FBGA and S-FLGA . 15 Table 8 e= 0,25 mm pitch S-FLGA .

24、16 60191-6-22 IEC:2012 3 INTERNATIONAL ELECTROTECHNICAL COMMISSION _ MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES Part 6-22: General rules for the preparation of outline drawings of surface mounted semiconductor device packages Design guide for semiconductor packages Silicon Fine-pitch Ball G

25、rid Array and Silicon Fine-pitch Land Grid Array (S-FBGA and S-FLGA) FOREWORD 1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising all national electrotechnical committees (IEC National Committees). The object of IEC is to promote internat

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34、or costs (including legal fees) and expenses arising out of the publication, use of, or reliance upon, this IEC Publication or any other IEC Publications. 8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is indispensable for the correct

35、application of this publication. 9) Attention is drawn to the possibility that some of the elements of this IEC Publication may be the subject of patent rights. IEC shall not be held responsible for identifying any or all such patent rights. International Standard IEC 60191-6-22 has been prepared by

36、 subcommittee 47D: Semiconductor packaging, of IEC technical committee 47: Semiconductor devices. The text of this standard is based on the following documents: CDV Report on voting 47D/812/CDV 47D/820/RVC Full information on the voting for the approval of this standard can be found in the report on

37、 voting indicated in the above table. This publication has been drafted in accordance with the ISO/IEC Directives, Part 2. 4 60191-6-22 IEC:2012 A list of all the parts in the IEC 60191 series, under the general title Mechanical standardization of semiconductor devices, can be found on the IEC websi

38、te. The committee has decided that the contents of this publication will remain unchanged until the stability date indicated on the IEC web site under “http:/webstore.iec.ch“ in the data related to the specific publication. At this date, the publication will be reconfirmed, withdrawn, replaced by a

39、revised edition, or amended. 60191-6-22 IEC:2012 5 MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES Part 6-22: General rules for the preparation of outline drawings of surface mounted semiconductor device packages Design guide for semiconductor packages Silicon Fine-pitch Ball Grid Array and Sili

40、con Fine-pitch Land Grid Array (S-FBGA and S-FLGA) 1 Scope This part of IEC 60191 provides the outline drawings and dimensions common to silicon- based package structures and materials of ball grid array packages (BGA) and land grid array packages (LGA). 2 Normative references The following document

41、s, in whole or in part, are normatively referenced in this document and are indispensable for its application. For dated references, only the edition cited applies. For undated references, the latest edition of the referenced document (including any amendments) applies. Void 3 Terms and definitions

42、For the purpose of this document, the following terms and definitions apply. 3.1 S-FBGA FBGA composed of silicon die, dielectric layer(s) on the die, rerouting wires from the die pads to outer balls on the dielectric layer(s), and outer balls with heights more than 0,1 mm 3.2 S-FLGA FLGA composed of

43、 silicon die, dielectric layer(s) on the die, rerouting wires from the die pads to outer lands on the dielectric layer(s), and outer lands with heights of 0,1 mm or less 4 Terminal position numbering When a package is viewed from the terminal side with the index corner in the bottom left corner posi

44、tion, terminal rows are lettered from bottom to top starting with A, then B, C, AA, AB, etc., whereas terminal columns are numbered from left to right starting with 1. Terminal positions are designated by a row-column grid system and shown as alphanumeric identification, e.g., A1, B1. The letters I,

45、 O, Q, S, X and Z shall not be used for naming the terminal rows. 5 Code of package nominal dimensions A code of package nominal dimensions is defined as the combination of package width E and length D which are shown in the second decimal place in millimeter. 6 60191-6-22 IEC:2012 6 Symbols and dra

46、wings Symbols and drawings are shown in Figures 1, 2, 3 and 4. a) B E A y 1S S A 1A e e y CZ (Z E ) (Z D ) n b d)Top view Side view Bottom view D D C B A 1 2 3 4 x 1M A M B M c)S S x 2M b) IEC 2310/12 Figure 1 S-FBGA outline 60191-6-22 IEC:2012 7 a) B E A y 1S S A 1A e e y CZ (Z E ) (Z D ) n b d)Top

47、 view Side view Bottom view D D C B A 1 2 3 4 x 1M A M B M c)S S x 2M b) IEC 2311/12 Figure 2 S-FLGA outline 8 60191-6-22 IEC:2012 e e e e b 3E maxD maxb 4IEC 2312/12 IEC 2313/12 Figure 3 Mechanical gauge drawing e)Figure 4 Array of terminal-existence areas f)Footnotes relating to Figures 1 to 4 a)

48、Datum S is the seating plane on which a package stays. b) The hatched zone is an index-marking area indicating A1 corner. c) True positional tolerances of terminals, x 1 and x 2, are applied to all terminals. d) The terminal diameter b is the maximum diameter of the ball as measured in a plane paral

49、lel to the seating plane. e) An array of terminal-existence areas with regard to the datum S , A , and B is shown in the mechanical gauge drawing in Figure 3. f) The array of terminal-existence areas with regard to the datum S is shown in Figure 4. 60191-6-22 IEC:2012 9 7 Dimensions 7.1 Group 1 Group 1 dimensions are shown in Table 1. Table 1 Dimens