1、 IEC 62326-20 Edition 1.0 2016-02 INTERNATIONAL STANDARD NORME INTERNATIONALE Printed boards Part 20: Printed circuit boards for high-brightness LEDs Cartes imprimes Partie 20: Cartes de circuits imprims destines aux LED haute luminosit IEC 62326-20:2016-02(en-fr) colour inside THIS PUBLICATION IS C
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19、ication ou si vous avez des questions contactez-nous: csciec.ch. IEC 62326-20 Edition 1.0 2016-02 INTERNATIONAL STANDARD NORME INTERNATIONALE Printed boards Part 20: Printed circuit boards for high-brightness LEDs Cartes imprimes Partie 20: Cartes de circuits imprims destines aux LED haute luminosit
20、 INTERNATIONAL ELECTROTECHNICAL COMMISSION COMMISSION ELECTROTECHNIQUE INTERNATIONALE ICS 31.180 ISBN 978-2-8322-3152-4 Registered trademark of the International Electrotechnical Commission Marque dpose de la Commission Electrotechnique Internationale Warning! Make sure that you obtained this public
21、ation from an authorized distributor. Attention! Veuillez vous assurer que vous avez obtenu cette publication via un distributeur agr. colour inside 2 IEC 62326-20:2016 IEC 2016 CONTENTS FOREWORD . 6 1 Scope 8 2 Normative references. 8 3 Terms, definitions and abbreviations 8 3.1 Terms and definitio
22、ns 8 3.2 Abbreviations 8 4 Classification and class of the printed circuit board for high-brightness LEDs 9 5 Design rules and allowance . 10 5.1 Panel and board sizes . 10 5.1.1 Board size . 10 5.1.2 Allowance of dimensions 11 5.1.3 Perforation and slit . 11 5.1.4 V-cut 12 5.2 Total board thickness
23、 13 5.3 Holes 14 5.3.1 Insertion holes and vias . 14 5.3.2 Datum hole 16 5.3.3 Assembly hole (a through-hole without wall plating) 16 5.4 Conductor . 17 5.4.1 Width of conductor pattern and its allowance 17 5.4.2 Distance between conductors and its allowance 17 5.4.3 Thickness of the insulating laye
24、r . 18 5.5 Printed contact 18 5.5.1 Allowance of the distance between the centers of two adjacent printed contacts . 18 5.5.2 Allowance of the terminal width of printed contacts . 19 5.5.3 Shift of the center of printed contacts on front and back sides of a board . 19 5.6 Land pattern . 20 5.6.1 All
25、owance of the distance between the centers of two lands 20 5.6.2 Allowance of the width of a land . 20 5.6.3 Land diameter and its allowance for BGA/CSP 21 5.7 Fiducial mark and mark for component positioning . 22 5.7.1 Typical form and size of the fiducial mark . 22 5.7.2 Dimensional allowance of f
26、iducial mark and component positioning mark 23 5.7.3 Position allowance of the component positioning mark 23 5.8 Interlayer connection Copper plating . 23 6 Quality 24 6.1 Gap between conductor and the wall of a component insertion hole or a via . 24 6.2 Positional deviation between conductor layers
27、 of a multilayer board . 24 6.3 Minimum land width . 24 6.4 Surface treatment . 25 6.4.1 Gold plating for printed contact . 25 6.4.2 Other surface treatment . 26 6.5 Defects of solder resist 26 6.6 Symbol mark . 28 6.6.1 General . 28 IEC 62326-20:2016 IEC 2016 3 6.6.2 Conductor surface 28 6.6.3 Betw
28、een conductors . 28 6.6.4 Defects within insulating layers 29 6.6.5 Routing and drilling 30 6.6.6 Conductor pattern 30 6.7 Land . 30 6.8 Land of a land pattern . 31 6.9 Defects in a land for BGA/CSP mounting . 32 6.10 Printed contact 32 7 Performance and test methods . 34 7.1 Resistance of conductor
29、s 34 7.2 Current proof of conductor and plated through hole 35 7.3 Observation of component mountings and vias 36 7.3.1 Observation with standard conditions . 36 7.3.2 Observation after thermal shock test 38 8 Marking, packaging and storage . 39 8.1 Marking on a product . 39 8.2 Marking on the packa
30、ge 39 8.3 Packaging and storage 40 8.3.1 Packaging 40 8.3.2 Storage 40 Annex A (informative) Classification and class of the PCB for high-brightness LEDs 41 Bibliography . 46 Figure 1 Example of a classification and its application . 10 Figure 2 Board arrangement in a panel . 11 Figure 3 Distances f
31、rom the datum point to perforation and slit . 12 Figure 4 Distance from the datum point to the V-cut 12 Figure 5 Allowance of position off-set of V-cuts on front and back surfaces . 13 Figure 6 PWB board with symbol mark, solder resist, copper foil and plating . 13 Figure 7 Positions of component in
32、sertion holes . 15 Figure 8 Distance between the wall of a hole and the board edge . 15 Figure 9 Wall of a hole and the minimum designed spacing to the inner conductor . 16 Figure 10 Width of finished conductor . 17 Figure 11 Distance between conductor and board edge 18 Figure 12 Thickness of the in
33、sulating layer . 18 Figure 13 Distance between centers of terminals of printed contacts . 19 Figure 14 Terminal width of a printed contact . 19 Figure 15 Shift of the center of printed contacts on front and back sides of a board 20 Figure 16 Land pattern . 20 Figure 17 Land width of a land pattern 2
34、1 Figure 18 Land diameter of BGA/CSP formed of a conductor only . 21 Figure 19 Land diameter (d) of BGA/CSP formed at the opening of solder resist . 22 Figure 20 Examples of fiducial mark and component positioning mark . 23 Figure 21 Minimum land width 25 4 IEC 62326-20:2016 IEC 2016 Figure 22 Expos
35、ure of conductor 26 Figure 23 Minimum land with caused by the shift of solder resist . 27 Figure 24 Overlap, smear and shift of solder resist . 27 Figure 25 Examples of smear or blur 28 Figure 26 Example of measling 29 Figure 27 Examples of crazing . 29 Figure 28 Conductor nicks 30 Figure 29 Conduct
36、or residue 30 Figure 30 Land 31 Figure 31 Defects in a land of a land pattern. 31 Figure 32 Defects in BGA/CSP mounting lands . 32 Figure 33 Areas to be checked for defects of a printed contact 33 Figure 34 Defects in a printed contact 33 Figure 35 Relations between resistance and width, thickness a
37、nd temperature of a conductor . 35 Figure 36 Relationship between current, conductor width and thickness and temperature rise . 36 Figure 37 Defect on a plating of a component hole . 37 Figure 38 Resin smear . 38 Figure 39 Corner crack 38 Figure 40 Barrel crack 39 Figure 41 Foil crack . 39 Figure A.
38、1 Relation between thermal conductive parameter and heat transfer coefficient parameter 42 Table 1 Application and classification . 9 Table 2 Panel dimensions 11 Table 3 Allowance of dimensions . 11 Table 4 Allowance of the distances from the datum point to perforation and slit 12 Table 5 Allowance
39、of the distance from the datum point to the center of the V-cut . 13 Table 6 Total thickness and its allowance . 14 Table 7 Allowance of holes for component insertion 14 Table 8 Position allowance of component insertion holes 15 Table 9 Distance between the wall of a hole and board edge 16 Table 10
40、Minimum clearance between the wall of a hole and the inner layer conductor . 16 Table 11 Allowance of conductor width . 17 Table 12 Allowance of the distance between conductors . 18 Table 13 Allowance of terminal width of a printed contact . 19 Table 14 Allowance of terminal width of a printed conta
41、ct . 20 Table 15 Allowance of the width of a land of a land pattern . 21 Table 16 Land diameter and its allowance for BGA/CSP . 22 Table 17 Allowance of the land diameter (d) of BGA/CSP formed at the opening of solder resist 22 IEC 62326-20:2016 IEC 2016 5 Table 18 Shapes and sizes of typical fiduci
42、al marks and component positioning marks . 23 Table 19 Minimum thickness of copper plating 23 Table 20 Minimum thickness of copper plating 24 Table 21 Minimum land width . 27 Table 22 Overlap, smear and shift of solder resist over a fool print 28 Table 23 Allowance of the area of a defect, remaining
43、 width and protrusion of a land . 31 Table 24 Defect of a land of a land pattern . 32 Table 25 Defects in BGA/CSP mounting lands 32 Table 26 Defects in a printed contact . 34 Table 27 Specification and test methods of resistance of conductors . 34 Table 28 Specification and test methods of current p
44、roof 35 Table 29 Allowance in horizontal sectioning 38 Table A.1 Relation between thermal conductive parameter and heat transfer coefficient parameter 42 Table A.2 Related test methods 43 6 IEC 62326-20:2016 IEC 2016 INTERNATIONAL ELECTROTECHNICAL COMMISSION _ PRINTED BOARDS Part 20: Printed circuit
45、 boards for high-brightness LEDs FOREWORD 1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising all national electrotechnical committees (IEC National Committees). The object of IEC is to promote international co-operation on all questions
46、concerning standardization in the electrical and electronic fields. To this end and in addition to other activities, IEC publishes International Standards, Technical Specifications, Technical Reports, Publicly Available Specifications (PAS) and Guides (hereafter referred to as “IEC Publication(s)”).
47、 Their preparation is entrusted to technical committees; any IEC National Committee interested in the subject dealt with may participate in this preparatory work. International, governmental and non- governmental organizations liaising with the IEC also participate in this preparation. IEC collabora
48、tes closely with the International Organization for Standardization (ISO) in accordance with conditions determined by agreement between the two organizations. 2) The formal decisions or agreements of IEC on technical matters express, as nearly as possible, an international consensus of opinion on the relevant subjects since each technical committee has representation from all interested IEC National Committees. 3) IEC Publications have the form of recommendations for international use and are accepted by IEC National Committees in that sense. While all reasonable efforts are made to ensure th
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