IEC 60748-4-3-2006 Semiconductor devices - Integrated circuits - Part 4-3 Interface integrated circuits - Dynamic criteria for analogue-digital converters (ADC).pdf

1、 INTERNATIONAL STANDARD IEC 60748-4-3First edition 2006-08Semiconductor devices Integrated circuits Part 4-3: Interface integrated circuits Dynamic criteria for analogue-digital converters (ADC) Reference number IEC 60748-4-3:2006(E) Publication numbering As from 1 January 1997 all IEC publications

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8、DARD IEC 60748-4-3First edition 2006-08Semiconductor devices Integrated circuits Part 4-3: Interface integrated circuits Dynamic criteria for analogue-digital converters (ADC) IEC 2006 Copyright - all rights reserved No part of this publication may be reproduced or utilized in any form or by any mea

9、ns, electronic or mechanical, including photocopying and microfilm, without permission in writing from the publisher. International Electrotechnical Commission, 3, rue de Varemb, PO Box 131, CH-1211 Geneva 20, Switzerland Telephone: +41 22 919 02 11 Telefax: +41 22 919 03 00 E-mail: inmailiec.ch Web

10、: www.iec.ch W For price, see current catalogue PRICE CODE Commission Electrotechnique Internationale International Electrotechnical Commission 2 60748-4-3 IEC:2006(E) CONTENTS FOREWORD.3 INTRODUCTION.5 1 Scope.6 2 Normative references .6 3 Terms and definitions .6 4 Characteristics .7 5 Measuring m

11、ethods 9 5.1 Dynamic testing with sinusoidal signals.9 5.2 Dynamic tests with wideband signals.22 5.3 Linearity error of a linear ADC (E L ) (E L(adj) ) (E T )24 5.4 Differential linearity error (E D ) .30 Annex A (informative) Mathematical derivations.32 Annex B (informative) Wideband signal genera

12、tion and analysis.35 Bibliography36 Figure 1 Test arrangement for measurements on ADCs under dynamic conditions.9 Figure 2 Test arrangement for measurements on ADCs, using wideband signals .22 Figure 3 Record size versus total noise, for various numbers of records, ramp waveform input .25 Figure 4 R

13、ecord size versus total noise, for various numbers of records, sine wave input 28 Table 1 Confidence level versus range of variable (in standard deviations)12 60748-4-3 IEC:2006(E) 3 INTERNATIONAL ELECTROTECHNICAL COMMISSION _ SEMICONDUCTOR DEVICES INTEGRATED CIRCUITS Part 4-3: Interface integrated

14、circuits Dynamic criteria for analogue-digital converters (ADC) FOREWORD 1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising all national electrotechnical committees (IEC National Committees). The object of IEC is to promote international

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23、blication or any other IEC Publications. 8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is indispensable for the correct application of this publication. 9) Attention is drawn to the possibility that some of the elements of this IEC Pu

24、blication may be the subject of patent rights. IEC shall not be held responsible for identifying any or all such patent rights. International Standard IEC 60748-4-3 has been prepared by subcommittee 47A: Integrated circuits, of IEC technical committee 47: Semiconductor devices. The text of this stan

25、dard is based on the following documents: FDIS Report on voting 47A/750/FDIS 47A/758/RVD Full information on the voting for the approval of this standard can be found in the report on voting indicated in the above table. This publication has been drafted in accordance with the ISO/IEC Directives, Pa

26、rt 2. 4 60748-4-3 IEC:2006(E) The list of all the parts of the IEC 60748 series, under the general title Semiconductor devices Integrated circuits, can be found on the IEC website. The committee has decided that the contents of this publication will remain unchanged until the maintenance result date

27、 indicated on the IEC web site under “http:/webstore.iec.ch“ in the data related to the specific publication. At this date, the publication will be reconfirmed; withdrawn; replaced by a revised edition, or amended. 60748-4-3 IEC:2006(E) 5 INTRODUCTION The use of ADCs has increased significantly in t

28、he last few years with the large increase in the use of digital signal processing. The majority of the processing of analogue signals now takes place in the digital domain, and this requires high precision in the conversion of signals from the analogue to the digital form. Consequently, the characte

29、rization of ADCs is of great importance. IEC 60748-4 contains measuring methods for ADCs in which the test conditions are either static or change very slowly. However, some of the characteristics of an ADC can change to some degree with the rate of change of the input signal, and there are other cha

30、racteristics that cannot be measured except under dynamic conditions. Consequently, a set of dynamic tests is required in order to obtain the response of an ADC when operated under dynamic conditions. The output of a dynamic test consists of the set of output code values obtained during the test. Th

31、is record, being the sequence in time of a set of values, gives information in the “time- domain”. The result of applying the Fourier Transform to the record is information that is in the “frequency domain”, and this contains the spectrum of the output over the range of frequencies of interest. In p

32、articular, distortion, noise and spurious output frequencies can then be evaluated. This International Standard introduces a set of dynamic methods, which are now coming into use in industry and which rely mostly on measurements made with sinusoidal input signals, and of which the results are suitab

33、le for analysis in the frequency domain. It also includes a further dynamic method that uses a wide-band input signal. For the reasons explained below, industry has shown great interest in this particular method. Linearity errors of an ADC are dependent on the amplitude of the input signal and its r

34、ate of change. Not so well known is that linearity errors also depend on the instantaneous amplitude distribution, i.e. amplitude probability density function (APDF) of the input signal. This source of error is usually a result of localized heating effects in the integrated circuit and is dependent

35、on ADC architecture and internal circuit layout. Single-frequency signals have an APDF concentrated at the extremes and therefore exaggerate the effect of errors at the ends of the input range compared to those nearer the centre. Conversely, a wide-band signal has an APDF concentrated more around th

36、e centre of the input range. A wide-band signal is much closer to the typical input signal in the majority of ADC applications than a single-frequency signal. Therefore, measurements made with such a signal will give more realistic error estimates. A wide-band signal can be generated from a pseudo-r

37、andom binary sequence. Although such a signal appears to be noisy, it contains only a set of defined frequencies and is therefore suitable for measuring errors. 6 60748-4-3 IEC:2006(E) SEMICONDUCTOR DEVICES INTEGRATED CIRCUITS Part 4-3: Interface integrated circuits Dynamic criteria for analogue-dig

38、ital converters (ADC) 1 Scope This part of IEC 60748 specifies a set of measuring methods and requirements for testing ADCs under dynamic conditions, together with associated terminology and characteristics. 2 Normative references The following referenced documents are indispensable for the applicat

39、ion of this document. For dated references, only the edition cited applies. For undated references, the latest edition of the referenced document (including any amendments) applies. IEC 60748-4:1997, Semiconductor devices Integrated circuits Part 4: Interface integrated circuits IEC 60268-10:1991, S

40、ound system equipment Part 10: Peak programme level meters 3 Terms and definitions For the purposes of this document, the following definitions, in addition to those found in Chapter II, Clause 2, Terms for category II of IEC 60748-4:1997, apply. 3.1 coherent sampling process in which the output rec

41、ord contains samples taken from an integral number of input cycles of a repetitive waveform NOTE In general, this process is limited to the case where the number of input cycles and the number of samples in the record have no common factors. 3.2 equivalent-time sampling coherent sampling in which co

42、nsecutive samples of a repetitive waveform, acquired from multiple repetitions of the waveform, are assembled and re-arranged to produce a single record of samples that represent a single repetition of the waveform NOTE This process is normally used only when the spectrum of the input waveform conta

43、ins significant amounts of energy at frequencies above half the sampling frequency. It has the result that each frequency in the input appears in the output divided by the number of repetitions. For each successive input cycle, the set of samples is delayed (or advanced) relative to the previous set

44、 by a fixed amount. 3.3 (code) transition value boundary between two adjacent steps 3.4 signal-to-noise-and-distortion ratio for a pure sine-wave input, ratio of the r.m.s. amplitude of the output signal at the input frequency to the r.m.s. amplitude of all other signals in the output 60748-4-3 IEC:

45、2006(E) 7 3.5 (spurious-free) dynamic range for a pure sine-wave input, ratio of the r.m.s. amplitude of the output signal at the input frequency to the largest r.m.s. amplitude of the output at any other single frequency 3.6 effective number of bits N efpractical limit of the resolution of an ADC d

46、ue to inherent noise and errors 3.7 signal-dependent timing error effect equivalent to the delay of the instant of sampling, in an ADC, that is proportional to the rate of change of input voltage NOTE This effect is caused by the inherent voltage-dependent non-linearity of circuit elements in semico

47、nductors. 3.8 spurious frequency persistent sine wave in the output that is not considered to be a harmonic of the input frequency 3.9 word error rate probability of an output code having an error not attributable to random noise or to offset, gain, and linearity errors 4 Characteristics The followi

48、ng characteristics shall be included as characteristics applicable to ADCs and should be read with reference to Chapter III, Section 2, Category II, Clause 4 of IEC 60748- 4:1997. 8 60748-4-3 IEC:2006(E) Requirements Ref. Characteristic Conditions at 25 C unless specified otherwise Letter Symbol Not

49、es Max. Min. 4.1 Settling time t totX 4.2 Long-term settling error E LTX 4.3 Rise and fall times t r ; t fX 4.4 Limiting rate of change of output (slew rate) Supply voltages Input step amplitude Specified levels for transition time Clock frequency, as appropriate Conditions at other terminals Tolerance for settling time ( v/ t) max , SR X 4.5 Overload recovery times 4.5.1 Input overload recovery time, where appropriate t or