BS PD IEC TR 62878-2-2-2015 Device embedded substrate Guidelines Electrical testing《装置内埋基板 指南 电气试验》.pdf

1、BSI Standards Publication Device embedded substrate Part 2-2: Guidelines Electrical testing PD IEC/TR 62878-2-2:2015National foreword This Published Document is the UK implementation of IEC/TR 62878-2-2:2015. The UK participation in its preparation was entrusted to Technical Committee EPL/501, Elect

2、ronic Assembly Technology. A list of organizations represented on this committee can be obtained on request to its secretary. This publication does not purport to include all the necessary provisions of a contract. Users are responsible for its correct application. The British Standards Institution

3、2015. Published by BSI Standards Limited 2015 ISBN 978 0 580 76556 8 ICS 31.180; 31.190 Compliance with a British Standard cannot confer immunity from legal obligations. This Published Document was published under the authority of the Standards Policy and Strategy Committee on 31 December 2015. Amen

4、dments/corrigenda issued since publication Date Text affected PUBLISHED DOCUMENT PD IEC/TR 62878-2-2:2015 IEC TR 62878-2-2 Edition 1.0 2015-12 TECHNICAL REPORT RAPPORT TECHNIQUE Device embedded substrate Part 2-2: Guidelines Electrical testing Substrat avec appareil(s) intgr(s) Partie 2-2: Directive

5、s Essai lectrique INTERNATIONAL ELECTROTECHNICAL COMMISSION COMMISSION ELECTROTECHNIQUE INTERNATIONALE ICS 31.180; 31.190 ISBN 978-2-8322-3032-9 Registered trademark of the International Electrotechnical Commission Marque dpose de la Commission Electrotechnique Internationale Warning! Make sure that

6、 you obtained this publication from an authorized distributor. Attention! Veuillez vous assurer que vous avez obtenu cette publication via un distributeur agr. colour inside PD IEC/TR 62878-2-2:2015 2 IEC TR 62878-2-2:2015 IEC 2015 CONTENTS FOREWORD . 3 INTRODUCTION . 5 1 Scope 6 2 Electrical tests

7、. 6 2.1 Test level 1A for device embedded substrate 6 2.2 Test level 1B for component embedded substrate . 7 2.3 Test level 2A for component embedded substrate . 7 2.4 Test level 2B for passive device embedded substrate . 9 2.5 Test level 3 for device embedded substrate 10 3 Electrical test procedur

8、e for device embedded substrate . 12 Bibliography 15 Figure 1 Interconnection open/short test 5 Figure 2 Test level 1A 7 Figure 3 Test level 1B 7 Figure 4 Test level 2A 8 Figure 5 Test level 2B 9 Figure 6 Device embedded substrate with two or more passive devices . 10 Figure 7 Test level 3 for funct

9、ional test 11 Figure 8 Circuit model and simulation result . 12 Figure 9 Preparation for the test setup . 13 Figure 10 Test procedure flow 14 PD IEC/TR 62878-2-2:2015IEC TR 62878-2-2:2015 IEC 2015 3 INTERNATIONAL ELECTROTECHNICAL COMMISSION _ DEVICE EMBEDDED SUBSTRATE Part 2-2: Guidelines Electrical

10、 testing FOREWORD 1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising all national electrotechnical committees (IEC National Committees). The object of IEC is to promote international co-operation on all questions concerning standardizati

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19、the publication, use of, or reliance upon, this IEC Publication or any other IEC Publications. 8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is indispensable for the correct application of this publication. 9) Attention is drawn to th

20、e possibility that some of the elements of this IEC Publication may be the subject of patent rights. IEC shall not be held responsible for identifying any or all such patent rights. The main task of IEC technical committees is to prepare International Standards. However, a technical committee may pr

21、opose the publication of a Technical Report when it has collected data of a different kind from that which is normally published as an International Standard, for example “state of the art“. IEC TR 62878-2-2, which is a Technical Report, has been prepared by IEC technical committee 91: Electronics a

22、ssembly technology. The text of this Technical Report is based on the following documents: Enquiry draft Report on voting 91/1220/DTR 91/1245/RVC Full information on the voting for the approval of this Technical Report can be found in the report on voting indicated in the above table. PD IEC/TR 6287

23、8-2-2:2015 4 IEC TR 62878-2-2:2015 IEC 2015 The French version of this Technical Report has not been voted upon. This publication has been drafted in accordance with the ISO/IEC Directives, Part 2. A list of all parts in the IEC 62878 series, published under the general title Device embedded substra

24、te, can be found on the IEC website. The committee has decided that the contents of this publication will remain unchanged until the stability date indicated on the IEC website under “http:/webstore.iec.ch“ in the data related to the specific publication. At this date, the publication will be reconf

25、irmed, withdrawn, replaced by a revised edition, or amended. IMPORTANT The colour inside logo on the cover page of this publication indicates that it contains colours which are considered to be useful for the correct understanding of its contents. Users should therefore print this document using a c

26、olour printer. PD IEC/TR 62878-2-2:2015IEC TR 62878-2-2:2015 IEC 2015 5 INTRODUCTION Current electrical package designs are becoming more complex, more functionally integrated, more reliable and more miniaturized than ever. Hence, electrical tests should be classified into levels in order to ensure

27、the performance and quality of device embedded substrates since the substrate contains active/passive devices within it. While the interconnection open/short test is enough for general substrates, functional tests should be done when active/passive devices are embedded inside the substrate. However,

28、 the main problem is that we need to understand which devices are embedded and how they are connected functionally to each other. This is the main reason that there should be standardized test methods for device embedded substrate. Figure 1 shows the existing substrate test method: the interconnecti

29、on open/short test. a) Open test b) Short test Figure 1 Interconnection open/short test IEC P1 P2 V IEC P1 P2 V + PD IEC/TR 62878-2-2:2015 6 IEC TR 62878-2-2:2015 IEC 2015 DEVICE EMBEDDED SUBSTRATE Part 2-2: Guidelines Electrical testing 1 Scope This part of IEC 62878, which is a Technical Report, d

30、escribes the necessary information on electrical testing for device embedded substrate. This includes the interconnection open- and short-circuit tests as well as the device functional test. It also provides guidelines by demonstrating the electrical test for device embedded substrate. This part of

31、IEC 62878 is applicable to device embedded substrates fabricated by use of organic base material, which include for example active or passive devices, discrete components formed in the fabrication process of electronic wiring board, and sheet formed components. The IEC 62878 series does not apply to

32、 the re-distribution layer (RDL) nor to the electronic modules defined as an M-type business model in IEC 62421. 2 Electrical tests 2.1 Test level 1A for device embedded substrate Test level 1A for device embedded substrate is to check the continuity and isolation of interconnections which are not c

33、onnected to any embedded components. This is shown in Figure 2. Test point 1 and test point 2 are on different networks. After measuring the resistance between net 1 and net 2, it can be found that net 1 and net 2 are short if the measured resistances are below a certain resistance. Test point 3 and

34、 test point 4 are on the same net, which is net 3. They are open if the measured resistance between the two test points is over a certain resistance. It means that they are not electrically connected. Multi-testers which can measure voltage and current are commercially available. The source meter ca

35、n measure the resistance directly since it has its own power supply. In terms of reliability, a high-current or low-level voltage test can be done to check the micro-open which causes the latent defects in the printed-circuit board and to check the micro-short which causes noise in the RF system. PD

36、 IEC/TR 62878-2-2:2015IEC TR 62878-2-2:2015 IEC 2015 7 Figure 2 Test level 1A 2.2 Test level 1B for component embedded substrate Test level 1B is for testing electrical interconnection between wiring nets and component nets. This is shown in Figure 3. The test method of this level is the same as tha

37、t of test level 1A because test level 1B is to check the isolation interconnection. Electrical interconnections are short if the measured resistance between wiring nets and component nets is below a certain resistance. It means that they are electrically connected. Figure 3 Test level 1B 2.3 Test le

38、vel 2A for component embedded substrate Test level 2A is for testing a single component embedded substrate. Figure 4 a) shows the passive component scheme. Through this test, the electrical performance of the passive component and the continuity of the net can be measured. However, only the electric

39、al performance test is suitable because the performance of the passive component will be affected if there is a problem with the continuity. In order to measure the performance of the passive component, the test method and the test signal need to be changed along with the IEC Test point 1 Test point

40、 2 Test point 3 Net 3 Current source Voltage meter V A + Net 4 Test point 4 Net 2 Net 1 Current meter Voltage source IEC Component nets A + Capacitor Current meter Voltage source Wiring nets Resistor PD IEC/TR 62878-2-2:2015 8 IEC TR 62878-2-2:2015 IEC 2015 type of passive component. In the case of

41、resistors, resistance can be measured by detecting the current/voltage ratio using constant voltage and constant current as in test levels 1A and 1B. However, in the case of capacitors and inductors, capacitance and inductance need to use an AC source to get the values. LCR meters and impedance anal

42、yzers are commercially available to measure resistance, capacitance, inductance and impedance. The equipment should be selected based on the frequency range to be measured. Figure 4 b) shows the active component circuit diagram, the method and the design of the electrostatic discharge (ESD) protecti

43、on diode. Test level 2A is achieved by applying positive/negative bias to the circuit. a) Passive component scheme b) Active component circuit diagram and the method Key V dddrain voltage V sssource voltage pMOS p-channel metal oxide semiconductor nMOS n-channel metal oxide semiconductor Figure 4 Te

44、st level 2A IEC A Capacitor Current meter Voltage meter Resistor V AC Inductor Voltage source IEC Current source Voltage measure V Input V ddpMOS nMOS V ssPD IEC/TR 62878-2-2:2015IEC TR 62878-2-2:2015 IEC 2015 9 2.4 Test level 2B for passive device embedded substrate Test level 2B is for a simple pa

45、ssive structure which consists of a few passive components. These components are connected either in parallel or in series (Figure 5). This test will measure the electrical performance of the structure and the continuity of the transmission lines. For this case, only the electrical performance test

46、is suitable because the performance of the passive components will be affected if there is a problem with the continuity, as for test level 2A. To be able to test passive components, test level 2B uses an AC source like test level 2A. However, it cannot measure the performance of individual passive

47、components because the measured impedance will be the combination of impedances of all passive components. Moreover, tolerance values are introduced when the passive components are measured. Figure 5 Test level 2B For example, as shown in Figure 6 a), if the capacitance of C1 is 1 F with a tolerance

48、 of 20 %, the capacitance of C2 is 0,1 F with a tolerance of 10 % and they are good components, then the total capacitance will be 0,89 F (C1 + C2) 1,31 F because of their tolerances. Thus, the passive component is good if the measured capacitance is between 0,89 F and 1,31 F. However, if C1 is good

49、 and C2 ( 0,11 F) is bad, then the results are 0,8 F (C1 + C2) 1,29 F and (C1 + C2) 0,91 F, respectively. In these cases, we cannot judge if the passive components are good or bad because the results of both experiments are good even though one component is bad. However, if the frequency dependence of impedance is measured as in Figure 6 b), then the performances of each individual capacitor can be seen. Hence we can decide if C