ANSI IEEE 1149.1-2013 Test Access Port and Boundary-Scan Architecture (IEEE Computer Society).pdf

1、IEEE Standard for Test Access Port and Boundary-Scan Architecture Sponsored by the Test Technology Standards Committee IEEE 3 Park Avenue New York, NY 10016-5997 USA 13 May 2013 IEEE Computer Society IEEE Std 1149.1-2013 (Revision of IEEE Std 1149.1-2001) IEEE Std 1149.1TM-2013 (Revision of IEEE Std

2、 1149.1-2001) IEEE Standard for Test Access Port and Boundary-Scan Architecture Sponsor Test Technology Standards Committee of the IEEE Computer Society Approved 6 February 2013 IEEE-SA Standards Board Approved 3 November 2014American National Standards InstituteAbstract: Circuitry that may be built

3、 into an integrated circuit to assist in the test, maintenance and support of assembled printed circuit boards and the test of internal circuits is defined. The circuitry includes a standard interface through which instructions and test data are communicated. A set of test features is defined, inclu

4、ding a boundary-scan register, such that the component is able to respond to a minimum set of instructions designed to assist with testing of assembled printed circuit boards. Also, a language is defined that allows rigorous structural description of the component-specific aspects of such testabilit

5、y features, and a second language is defined that allows rigorous procedural description of how the testability features may be used. Keywords: boundary scan, boundary-scan architecture, Boundary-Scan Description Language (BSDL), boundary-scan register, circuit boards, circuitry, IEEE 1149.1TM, inte

6、grated circuit, printed circuit boards, Procedural Description Language (PDL), test, test access port (TAP), very high speed integrated circuit (VHSIC), VHSIC Hardware Description Language (VHDL) The Institute of Electrical and Electronics Engineers, Inc. 3 Park Avenue, New York, NY 10016-5997, USA

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21、o the IEEE-SA Standards Board for approval, the P1149.1 Working Group had the following membership: C. J. Clark, Chair Carol Pyron, Vice-Chair Carl F. Barnhart, Editor Bill Tuthill, Secretary John Braden Bill Bruce Richard Cornejo Adam Cron Wim Driessen David Dubberke Ted Eaton Heiko Ehrenberg Willi

22、am Eklow Peter Elias Joshua Ferry Jeff Halnon Dharma Konda Roland R. Latvala Adam W. Ley Sankaran Menon Kent Ng Kenneth P. Parker Francisco Russi John Seibold Roger Sowada Craig Stephan Brian Turmelle Hugh Wallace The following members of the individual balloting committee voted on this standard. Ba

23、lloters may have voted for approval, disapproval, or abstention. Gobinathan Athimolom Carl F. Barnhart Hugh Barrass William Borroz John Braden Dennis Brophy Susan Burgess Gunnar Carlsson Vivek Chickermane C. J. Clark Richard Cornejo Adam Cron Alfred Crouch Frans G De Jong Jason Doege Wim Driessen Da

24、vid Dubberke Sourav Dutta Heiko Ehrenberg William Eklow Peter Elias Joshua Ferry Chris Gorringe Prashant Goteti Robert Gottlieb J. Grealish Randall Groves Jeff Halnon Peter Harrod Neil Glenn Jacobson Rohit Kapur Dharma Konda Roland R. Latvala Philippe LeBourg Adam W. Ley Teresa Lopes Greg Luri Wayne

25、 Manges Colin Maunder Ian Mcintosh Harrison Miles Jr. Jeffrey Moore Benoit Nadeau-Dostie Ion Neag Kenneth P. Parker Steve Poehlman Ulrich Pohl Irith Pomeranz John Potter Carol Pyron Mike Ricchetti Gordon Robinson Andrzej Rucinski Francisco Russi Bartien Sayogo John Seibold Ozgur Sinanoglu Roger Sowa

26、da Craig Stephan Cees Stork Walter Struppler Stephen Sunter Bambang Suparjo Anthony Suto Efren Taboada David Thompson Brian Turmelle Bill Tuthill Louis Ungar Dmitri Varsanofiev Srinivasa Vemuru John Vergis Tom Waayers Douglas D. Way Thomas Williams Henk Wit Oren Yuen Janusz Zalewskivii Copyright 201

27、3 IEEE. All rights reserved. When the IEEE-SA Standards Board approved this standard on 6 February 2013, it had the following membership: Richard H. Hulett, Chair Robert Grow, Past Chair Konstantinos Karachalios, Secretary Satish Aggarwal Masayuki Ariyoshi Peter Balma William Bartley Ted Burse Clint

28、 Chaplin Wael William Diab Jean-Philippe Faure Alexander Gelman Paul Houz Jim Hughes Young Kyun Kim Joseph L. Koepfinger* David J. Law Thomas Lee Hung Ling Oleg Logvinov Ted Olsen Gary Robinson Jon Walter Rosdahl Mike Seavey Yatin Trivedi Phil Winston Yu Yuan *Member Emeritus Also included are the f

29、ollowing nonvoting IEEE-SA Standards Board liaisons: Richard DeBlasio, DOE Representative Michael Janezic, NIST Representative Don Messina IEEE Standards Program Manager, Document Development Kathryn Bennett IEEE Standards Program Manager, Technical Program Development viii Copyright 2013 IEEE. All

30、rights reserved. Introduction This introduction is not part of IEEE Std 1149.1-2013, IEEE Standard for Test Access Port and Boundary-Scan Architecture. This standard defines a test access port and boundary-scan architecture for digital integrated circuits and for the digital portions of mixed analog

31、/digital integrated circuits. The facilities defined by the standard seek to provide a solution to the problem of testing assembled printed circuit boards and other products based on highly complex digital integrated circuits and high-density surface-mounting assembly techniques. They also provide a

32、 means of accessing and controlling design-for-test features built into the digital integrated circuits themselves. Such features might, for example, include internal scan paths and self-test functions as well as other features intended to support service applications in the assembled product. In ad

33、dition, two languages are provided to describe both the structure of the test logic and the procedures needed to use the test logic. History of the development of this standard The process of developing this standard began in 1985 when the Joint European Test Action Group (JETAG) was formed in Europ

34、e. During 1986, this group expanded to include members from both Europe and North America and, as a result, was renamed the Joint Test Action Group (JTAG). Between 1986 and 1988, the JTAG Technical Subcommittee developed and published a series of proposals for a standardized form of boundary scan. I

35、n 1988, the last of these proposals, JTAG Version 2.0, was offered to the IEEE Testability Bus Standards Committee (P1149) for inclusion in the standard then under development. The Testability Bus Standards Committee accepted this approach. It decided that the JTAG proposal should become the basis o

36、f a standard within the Testability Bus family, with the result that the P1149.1 project was initiated. Following these decisions, the JTAG Technical Subcommittee became the core of the IEEE Working Group that developed this standard. After the initial approval of this standard in February 1990 and

37、its subsequent publication, the Working Group immediately began efforts to develop a supplement for the purpose of correction, clarification, and enhancement. This effort, spurred and guided by interaction between developers and users of the original standard, culminated in IEEE Std 1149.1aTM-1993,

38、which was approved in June 1993. The major changes to this standard introduced by IEEE Std 1149.1a-1993 were as follows: The addition of two optional instructions, CLAMP and HIGHZ, which standardized the names and specifications of features often implemented as design-specific features. The addition

39、 of an optional facility to switch a component from a mode in which it complies to this standard into one in which it supports another design-for-test approach. Furthermore, starting with a proposal made by Kenneth P. Parker and Stig Oresjo in 1990, an effort was undertaken to develop a language to

40、describe components that conform to this standard. This effort concluded in the approval of IEEE Std 1149.1bTM-1994 in September 1994. The major change introduced to this standard by IEEE Std 1149.1b-1994 was the addition of Annex B, which defines the Boundary-Scan Description Language. All other ch

41、anges were minor and were strictly for clarification. The 2001 revision was primarily a housekeeping update, designed to incorporate learning from the first 10 years of the standards use into the standard document. The principal changes introduced were as follows: To reduce the risk of accidental en

42、try into test mode, the requirement that a binary code for the EXTEST instruction be 000.0 was removed and use of this binary code for other instructions that result in entry to test mode was deprecated. ix Copyright 2013 IEEE. All rights reserved. To increase the flexibility with which instructions

43、 may be implemented and merged, the implicitly merged SAMPLE/PRELOAD instruction was redefined as two separate instructions: SAMPLE and PRELOAD. These instructions can continue to share a single binary code, effectively resulting in a merged SAMPLE/PRELOAD instruction, but alternatively, they may no

44、w share binary codes with other instructions, provided that no rules applying to any of the merged instructions are violated. To enable more efficient implementation of boundary-scan register cells provided at system logic outputs, the source of data to be captured in such cells in response to the S

45、AMPLE instruction was allowed to be at the connected system pin. Additionally, three new cell types based on this implementation (BC_8, BC_9, and BC_10) were added to the standard Boundary-Scan Description Language (BSDL) Package and Package Body. To permit more flexible boundary-scan register cell

46、implementations, sharing of circuitry between the boundary-scan register and other elements of the test and/or system logic were allowed in limited cases. To support more complete description of IC pin drivers with bus keeper circuits, a new value for was defined (KEEPER). To track the widespread ac

47、ceptance of BSDL, the language was made a normative part of this standard and its use for documentation was mandated. Additionally, a number of minor changes were made to correct and clarify the language of this standard. Changes introduced by this revision First, this version of the standard affirm

48、s what had been required in the previous (2001) version. There are only minor clarifications or relaxations to the rules that are already established. It is expected that components currently compliant with the previous version of this standard will remain compliant with this one. The one exception

49、is that the previously deprecated BC_6 boundary-scan cell is no longer supported or defined, and the component supplier must provide a user-supplied BSDL package defining the BC_6 cell for any component using the STD_1149_1_2013 standard Package and still using that cell. Second, while this is a major revision, items introduced in this version are optional and intended to provide test improvements for the complex components being created today and in the foreseeable future. There are also significant improvements in documentation capabil