ANSI IEEE 1532-2002 Standard for In-System Configuration of Programmable Devices (IEEE Computer Society Document)《可编程设备的系统内配置标准》.pdf

1、IEEE Std 1532-2002(Revision of IEEE Std 1532-2001) IEEE Standards1532TMIEEE Standard for In-SystemConfiguration of ProgrammableDevicesPublished by The Institute of Electrical and Electronics Engineers, Inc.3 Park Avenue, New York, NY 10016-5997, USA10 January 2003IEEE Computer SocietySponsored by th

2、eTest Technology Technical CouncilIEEE StandardsPrint: SH95071PDF: SS95071The Institute of Electrical and Electronics Engineers, Inc.3 Park Avenue, New York, NY 10016-5997, USACopyright 2003 by the Institute of Electrical and Electronics Engineers, Inc.All rights reserved. Published 10 January 2003.

3、 Printed in the United States of America.Print:ISBN 0-7381-3507-0 SH95071PDF:ISBN 0-7381-3508-9 SS95071No part of this publication may be reproduced in any form, in an electronic retrieval system or otherwise, without the prior written permission of the publisher.IEEE Std 1532-2002(Revision ofIEEE S

4、td 1532-2001)IEEE Standard for In-System Configuration of Programmable DevicesSponsorTest Technology Technical Councilof theIEEE Computer SocietyApproved 11 December 2002IEEE-SA Standards BoardAbstract:The communication protocol described by IEEE Std 1149.1TM-2001 (Standard Test Ac-cess Port and Bou

5、ndary-Scan Architecture) has been adopted by this standard for providingstandardized programming access and methodology for programmable integrated circuit devices.Devices that implement this standard will first be compliant with IEEE Std 1149.1-2001, which isused for testing purposes. A device, or

6、set of devices, implementing this standard can be pro-grammed (written), read back, erased, and verified, singly or concurrently, with a standardized setof resources. Sample implementation and application details (which are not part of this standard)are included for illustrative purposes.Keywords:co

7、mplex programmable logic device (CPLD), erasable programmable read-only mem-ory (EPROM), field programmable gate array (FPGA), Flash RAM, in-system (or in situ)configuration (ISC), programmable deviceAmerican National Standard (ANSI)Recognized as anIEEE Standardsdocuments are developed within the IE

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24、o its attention.Copyright 2003 IEEE. All rights reserved.iiiIntroduction(This introduction is not part of IEEE Std 1532-2002, IEEE Standard for In-System Configuration of ProgrammableDevices.)The development of this standard began with a preliminary meeting held 19 April 1996. There, a group ofProgr

25、ammable Device vendors and users discussed the possibility of standardizing the programming processfor these devices. Subsequent meetings were held regularly and agreement was developed for basing theprogramming process upon the IEEE Std 1149.1 communication protocol, because many of these deviceswe

26、re expected to support IEEE Std 1149.1 for testing purposes. This group adopted as its mission:To define, document, and promote the use of a standardized process and methodology forimplementing programming capabilities within programmable integrated circuit devices, utilizing(and compatible with) th

27、e IEEE Std 1149.1 communication protocol. This standard would allow theprogramming of one or more compliant devices concurrently, while mounted on a board orembedded in a system, known as “In-System Configuration.” Concurrent programming may oftenresult in significant programming time efficiencies.

28、The In-System feature would address the need toconfigure or reconfigure, read back, verify or erase programmable devices after they have beeninstalled by a manufacturing process. This eliminates handling damage and the need formanufacturing steps and inventory management related to preprogrammed dev

29、ices.This work received the support of the IEEE Std 1149.1 Working Group which ultimately urged that thiseffort become its own standard within the Test Technology Technical Committee of the IEEE ComputerSociety, in July of 1998. The initially approved version of this standard described the necessary

30、 hardwareelements for compliance. By making this available quickly and early, the development of compliant siliconwas facilitated and its availability accelerated. The next revision of this standard described the softwareelements necessary for full implementation of this standard. The software eleme

31、nts described includeextensions to the BSDL file that describe the programming algorithm and hardware implementation of thisstandard. Additionally a new data file format has been described. This revision further extends the standardby adding support for devices that require adaptive programming algo

32、rithms along with some slightmodifications to the initial standard that will help to better meet users needs. ivCopyright 2003 IEEE. All rights reserved.Following is a list of participants in the In-System Configuration Working Group of the Test TechnologyTechnical Council. Voting members at the tim

33、e of publication are marked with an asterisk (*).Neil G. Jacobson,ChairDavid Bonnet,Vice-ChairDennis Lia, SecretaryMark Moyer, EditorKenneth P. Parker, Editor EmeritusThe following members of the balloting committee voted on this standard. Balloters may have voted forapproval, disapproval, or absten

34、tion. Turgut AbaciogluJohn AndrewsDon ArnoldBill AronsonMarco BarahmandJason Baumbach*Glenn BaxterMenachem BlasbergTerry BorrozStephen BrownIan BryantSteven ButkovichTapan ChakrabortySung Chung*C. J. Clark*Ray Dellecker *Yadvindra DhamiWim Driessen*Alon DroryTed Eaton*Rob EcclesPeter van den Eijnden

35、Bernardo ElaydaP. D. FelenJudy Chen FengDan GravitzJack Griffin*Kurt GuntherothPeter HansenSteve HarrisonBernie HaverkampAlan Herrmann*Brad Ishihara*John JoyRaj KamdarDoug KayArthur KhuPeter LarsenBertrand LeighFrank LienKeith LoftstromPatrick McHughG. MeijerinkMatthew MurphyGary OBrienDavid PaulBru

36、ce PetersonEtienne RacineBapcha RamamurthyDoug RaymondJacky RenauxRobert RussellDavid Lee RutledgeBobbie SavilleSanjeev Sharma*Steve StarkChung SunJerry TalenHoward Tang*Elke TiemeyerDouglas Way*Thomas WenzelMike WestermeierKevin WibleBill WilkieCarmy YellinDan YoungPiotr ZbysinskiMorris BalamutRoge

37、r BennettsDavid BonnettTerry BorrozTapan ChakrabortyKeith ChowC. J. ClarkLuis E. CordovaFrans De JongHeiko EhrenbergPeter van den EijndenKazumi HatayamaNeil G. JacobsonAdam LeyDennis LiaYinghua MinMark MoyerBenoit Nadeau-DostieBruce PetersonMike RicchettiGordon RobinsonRobert RussellDouglas WayCopyr

38、ight 2003 IEEE. All rights reserved.vWhen the IEEE-SA Standards Board approved this standard on 11 December 2002, it had the followingmembership:James T. Carlo,ChairJames H. Gurney,Vice ChairJudith Gorman,Secretary*Member EmeritusAlso included is the following nonvoting IEEE-SA Standards Board liais

39、on:Alan Cookson, NIST RepresentativeSatish K. Aggarwal, NRC RepresentativeNoelle D. HumenickIEEE Standards Project EditorSid BennettH. Stephen BergerClyde R. CampRichard DeBlasioHarold E. EpsteinJulian Forster*Howard M. FrazierToshio FukudaArnold M. GreenspanRaymond HapemanDonald M. HeirmanRichard H

40、. HulettLowell G. JohnsonJoseph L. Koepfinger*Peter H. LipsNader MehravariDaleep C. MohlaWilliam J. MoylanMalcolm V. ThadenGeoffrey O. ThompsonHoward L. WolfmanDon WrightviCopyright 2003 IEEE. All rights reserved.Contents1. Overview 11.1 Scope 11.2 Organization of the standard 11.3 Context. 21.4 Obj

41、ectives 22. References 33. Definitions and acronyms 33.1 Definitions 33.2 Acronyms. 94. System modal states. 94.1 Definition of system modal states 104.2 Description of system modal state transitions . 124.3 System modal state transition timing.154.4 System I/O pin behavior 185. ISC architecture . 2

42、25.1 Overview 225.2 Specification 355.3 Description. 386. ISC Instructions . 396.1 General properties of ISC instructions.396.2 Mandatory ISC instructions . 466.3 Optional ISC programming instructions 526.4 Optional ISC program control/security instructions 596.5 Optional address/data access instruc

43、tions 636.6 Requirements for IEEE Std 1149.1-2001 masters and ISC programming algorithms 686.7 Adding new instructions for ISC programming support 707. Data registers . 707.1 Device identification register. 717.2 Bypass register. 727.3 Boundary scan register. 727.4 ISC_Default . 727.5 ISC_Config 737

44、.6 ISC_PData 747.7 ISC_RData . 747.8 ISC_Sector . 747.9 ISC_Info. 747.10 ISC_Data 757.11 ISC_Address 757.12 ISC_Inc 75Copyright 2003 IEEE. All rights reserved.vii8. Conformance and documentation requirements758.1 Conformance758.2 Documentation.768.3 BSDL extension for ISC description (STD_1532_2002)

45、788.4 ISC extension structure798.5 ISC BSDL attribute definitions819. Data file format1109.1 Data file syntax specification.1109.2 Description.1139.3 Mapping data onto a flow1149.4 Merging flows for concurrent programming.1159.5 Data file transmission CRC calculation.117Annex A (informative) Use of

46、device features119Annex B (informative) ISC programming flows.123Annex C (informative) Example ISC BSDL/data file.134Copyright 2003 IEEE. All rights reserved.1IEEE Standard for In-System Configuration of Programmable Devices1. Overview1.1 ScopeThis standard describes a series of mandatory and option

47、al programming instructions and associated dataregisters that define a standard methodology for accessing and configuring programmable devices. Theseadditional registers and instructions extend the capabilities of devices that comply with IEEE Std 1149.1TM-2001 such that the IEEE Std 1149.1-2001 Tes

48、t Access Port may be used for configuration activities. A datadescription format and extensions to Boundary-Scan Description Language (BSDL) are also specified thatprovide for the development of standardized automation tools for device programming.1.2 Organization of the standardThis standard is div

49、ided into nine clauses and three annexes, as follows: Clause 1 describes the scope, context, objectives, and organization of this standard. Clause 2 provides references to other IEEE documentation needed to understand this document. Clause 3 defines terms and acronyms used in this standard. Clause 4 defines the variations of system state that are unique to programmable logic devices. Clause 5 describes the general architecture of an in-system configurable (ISC) device. Clause 6 describes the ISC instruction set. Clause 7 describes the ISC register set and the operation