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本文(ANSI INCITS ISO 9160-1988 Information processing - Data encipherment - Physical layer interoperability requirements (Adopted by INCITS).pdf)为本站会员(roleaisle130)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

ANSI INCITS ISO 9160-1988 Information processing - Data encipherment - Physical layer interoperability requirements (Adopted by INCITS).pdf

1、INTERNATIONAL STANDARD IS0 9160 First edition 1988-02-o 1 INTERNATIONAL ORGANIZATION FOR STANDARDIZATION ORGANISATION INTERNATIONALE DE NORMALISATION MEXAYHAPOAHAR OPrAHM3AMR n0 CTAHjJAPTM3AL publication anticipated in due course. 1 ISO9160:1998(E) Physical layer Data communication DTE DCE DCElDTE I

2、nterface Call establishment Data transfer Test loops Serial transmission Asynchronous transmission Start Stop transmission Start signal Stop singal Synchronous transmission Duplex transmission Half duplex transmision 3.2 This International Standard makes use of the following terms drawn from the res

3、pective International Standards. Service Data Unit (SDU) (IS0 7498) Physical connection (IS0 7498) Ciphertext (I SO 749812) Plaintext (I so 7498/2) Initializing Value (IV) (IS0 8372) Starting Variable (SV) (IS0 8372) 4 Applicable interfaces Where an interface exists between the DEE and the DTE, DCE,

4、 or wrth botb this interface may be one of those recommended by CCfTf such as V.24, X.26, X2Obis, X.21 or X.2lbis. This International Standard refers to the call establishment of a physical layer connection which is signalled in a different manner across these different interfaces. Control signals n

5、ot affecting, nor affected by, DEE operation shall be passed through or re-driven at the DEE. A DEE presenting a standard DCUDTE Interface needs to delay some control signals such, as Ready for Sending, Data Set Ready, or the Ready for Data indications, when relaying them to the DTE, as required to

6、complete its own operations. The delay caused by the DEE, together with the delay caused by the DCE, shall fit into the time- out requirements determined by the DTE. The DTE shall not commence data transmission prior to having received the appropriate control signal as mentioned above. 4.1 V-24 Inte

7、rfaces For interchange circuits to Recommendation V.24, circuit 108 (Data Terminal Ready I Connect Data Set to Line) from the DTE to the DCE, if used by the DCE, circuit 107 (Data Set Ready) from the DCE to the DTE, and circuit 109 (Data Channel Received Line Signal Detector) from the DCE to the DTE

8、 are always passed through or redriven with minimal delay by the DEE. However, it is recommended that the DEE delays the ON condition on circuit 109 to the DTE until such time as the DEE is in a position to deliver data to the DTE on circuit 104 (Received Data). The DEE shall not signal the ON condi

9、tion on circuit 109 to the DTE until after the ON condition on circuit 107 has been signalled to the DTE. Inserting a DEE into a DTElDCE Interface introduces inherent delays in control signals and should consider the time-out provisions of existing equipment. The time-outs depend, among other things

10、, on duplex transmission and half duplex transmission. The appropriate modam recommendation should be consulted. 4.1.1 Duplex Transmission Call establishment of a physical connection is indicated by reception by the DEE of the ON condition on circuit 107 from the DCE. In leased line operation, circu

11、it 107 is permanently ON. Both the transmit and receive data channels are active at the time circuit 109 and circuit 106 are ON. The DEE shall not signal the ON condition on circuit 106 to the DTE until such time as all of the following conditions are met: a) Circuit 107 is switched ON from the DCE

12、to the DEE and passed through by the DEE to the DTE b) Circuit 105 from the DTE, if required by the DCE, is switched ON and passed through to the DCE. c) Circuit 106 from the DCE is ON and the initiating DEE operations are completed. A physical connection can be cleared by: a) the DCE, indicated by

13、the transition to the OFF condition of circuit 107, as a national option; or by b) the DTE, indicated by the transition to the OFF condition of circuit 106; or by c) the DEE, indicated by the transition to the OFF condition of circuit 106 to the DCE and of circuit 107 to the DTE. When this happens i

14、t indicates a fault condition in the DEE. 4.1.2 Hatf - Duplex Transmission Call establishment of a physical connection is indicated by reception of the ON condition on circuit 107 from the DCE. In leased line operation circuit 107 is permanently ON. Depending on the condition of the Request to Send

15、(circuit 105), either the transmit or receive data channel is active at a time. The ready for sending state, circuit 106 ON, is indicated by the DCE after the DTE and the DEE switched circuit 106 ON. The ready for receiving state is indicated by the ON condition of circuit 109 from the DCE. Circuit

16、105 is used such that the transition to the ON condition is always passed through or re-driven with minimal delay by the DEE. The transition to the OFF condition to the DCE is delayed by the DEE until the last data bit is transmitted on Transmitted Data (circuit 103). Circuit 106 ON from the DEE to

17、the DTE is indicated after initiating DEE operations are completed. A physical connection can be cleared by: a) the DCE, indicated by the transition to the OFF condition of circuit 107, as a national option; or by b) the DTE, indicated by the transition to the OFF condition of circuit 108; or by c)

18、the DEE, indicated by the transition to the OFF condition of circuit 106 to the DCE and of circuit 107 to the 2 IS0 9160 : 1966 (El DTE. When this happens it indicates a fault condition in the DEE. NOTE - To avoid false DEE decipherment starts, caused by false signals on circuit 104 which can occur

19、shortly after the ON to OFF transition on circuit 105 and the following OFF to ON transition on circuit 109 in the DCE, the DEE should be used with a DCE which uses the clamping option of V.24, clause 4.3, together with the longer OFF to ON response time of circuit 106 as specified in the relevant D

20、CE recommendation. 4.2 X.2Obis or X.Plbis Interfaces For interchange circuits to CCITT Recommendations X.2Ctbis and X.2lbis consult the applicable V.24 operation for duplex transmission as described above. 4.3 x.20 Intelfaes For interchange circuits to CCllT Recommendation X.20, Call establishment o

21、f a physical connection provides for start-stop and duplex transmission. It is indicated by reception of the call control character ACK on the Receive interchange circuit R. In leased circuit service, data can be transmitted and received at any time. In circuit switched service, reception of data (r

22、eady for receiving state) may take place immediately after reception of ACK. This state is called Connected. Transmission of data (ready for sending state) may take place not earlier than 26 ms after ACK. This later is called Ready for Data. The Connected state from the DEE to the DTE is indicated b

23、y ACK after the initiating DEE operations are completed. Clearing of a physical connection is indicated by the DCE clear confirmation at the clearing DTE or the DTE clear confirmation at the cleared DTE, both indicated by the transmission of continuous binary zeros on circuit R, i.e. r= 0, which per

24、sists for at least 210 ms. Clearing may be initiated either by DTE clear request from the DTE, DCE clear indication from the DCE, or by the DEE indicating DTE clear request to the DCE and DCE clear indication to the DTE. The DEE initiated disconnect indicates a fault condition in the DEE. 4.4 x.21 l

25、nterkes For interchange circuits to CCllT Recommendation X.21, call establishment of a physical connection provides for synchronous and duplex transmission. It requires the Transmit interchange circuit T from the DTE to the DCE in ON condition. Call establishment is indicated by the Ready for Data s

26、tate, which is the transition to ON on the Indication interchange circuit I from the DCE. In leased circuit service, circuit I goes ON as a response to circuit T switched ON. Circuit T from the DTE to the DCE is always passed through or re-driven with minimal delay by the DEE. The transmission and r

27、eception of data (ready for sending state and ready for receiving state) may take place not earlier than 16 bit times after i=ON. The Ready for Data state, i.e., i =ON, from the DEE to the DTE is indicated after the initiating DEE operations are completed. Clearing of a physical connection is indica

28、ted by the DCE clear confirmation at the clearing DTE or the DTE clear confirmation at the cleared DTE, both indicated by a transition to OFF on circuit I from the DCE together with binary zeros on circuit R, i.e., r=O, i =OFF. Clearing may be initiated either by DTE clear request from the DTE, DCE

29、clear indication from the DCE, or by the DEE indicating DTE clear request to the DCE and DCE clear indication to the DTE. The DEE initiated disconnect indicates a fault condition in the DEE. 4.5 Transmitted and Received Data interchange CiraMs The term transmitted data interchange circuit in this In

30、ternational Standard refers, in the case of a V.24, X.2Obis or X.Plbis interface, to circuit 103 and in the case of an X.20 or X.21 interface to circuit T. The term received data interchange circuit in this International Standard refers, in the case of a V.24, X2Obis or X.Plbis interface, to circuit

31、 104, and in the case of an X.20 or X.21 interface to circuit R. 5 General requirements When employing this International Standard for interworking between DEEs, the following conditions are required in all DEEs of an interworking group: E: The same cipher algorithm. The same cryptographic key value

32、. C. The same IV length, IV structure, and IV bit transmission order. This International Standard does not specify a particular cipher algorithm but does require any algorithm used to ba applicable on a single bit or single character at a time basis, as appropriate to the physical layer service prov

33、ided. NOTES 1. The use of a block cipher algorithm in the 1 -bit cipher feedback (CFS- 1) mode of operation specified in IS0 8372 meets the requirements of this International Standard. 2. Annex S contains the IV requirements when the DEA (ANSI X3.92 - 1981) algorithm is used for encipherment. If the

34、re is loss of synchronization between DEEs and this condition is detected, resynchronization can be forced by the DEE or DTE, by clearing the physical connection, followed by the re - establishment of the physical connection using procedures appropriate to the type of interface as specified in claus

35、e 4. The DEE shall not initiate connection re - establishment. 3 IS0 9160 : 1966 (El 6 Synchronous encipherment operation 7.1 Transmission 6.1 IV The IV length and IV structure may be chosen according to the application. There shall be prior agreement concerning IV length and IV structure among all

36、the DEEs in an interworking group. 6.2 Transmission Upon call establishment of a physical connection and indication of the ready for sending state, the transmitted data interchange circuit is in a MARK condition. The IV is sent at this point in time, preceded by a single binary zero bit to delimit t

37、he IV. Encipherment continues until clearing of the physical connection or data channel turn-around in half duplex transmission. The transmission of the first enciphered data bit of the SDU shall follow the transmission of the IV according to one of the following alternatives. 6.2.1 Alternative A: I

38、mmediate The first enciphered data bit follows immediately after transmission of the IV. 6.2.2 Altemative B: Delayed Immediately following transmission of the IV, an indeterminate number of binary one bits (MARK condition) may be transmitted. However, if this alternative is used this delay condition

39、 shall be maintained for a minimum of 10 ms, up to a maximum of 50 ms. The binary one bits are followed by a single binary zero bit to delimit the data, followed by the first enciphered data bit. 6.3 Reception Upon call establishment of a physical connection and indication of the ready for receiving

40、 state, the received data interchange circuit is in a MARK condition. The IV is received immediately following the first binary zero bit. In Alternative A, all subsequent received bits are then deciphered. In Alternative B, the receiving DEE shall be capable of recognising the delimiting binary zero

41、 bit and deciphering incoming data within 10 ms. In both Alternative A and Alternative B, decipherment continues until clearing of the physical connection or data channel turn-around in half duplex transmission. Figure 1 shows the operation of the V.24 interchange circuits for duplex transmission. F

42、igures 2 and 3 illustrate the V.24 half duplex transmission signalling sequences for synchronous encipherment Alternative A and B respect- ively. 7 Asynchronous encipherment operation NOTE - The use of a physical connection capable of duplex transmission is recommended in order to improve the effici

43、ency of operation. 7.1.1 IV Upon the establishment of a physical layer connection and indication of the ready for sending state, the transmitted data interchange circuit is in a MARK condition. The IV shall be sent subdivided into units equal to the size of the characters about to be enciphered and

44、transmitted. The IV length and IV structure may be chosen according to the application. There shall be prior agreement between transmitting and receiving DEE on IV length, IV structure, and framing of the IV in transmitted characters. 7.1.2 Starting Encipherment Characters of the SDU (corresponding

45、to characters on the transmitted data interchange circuit), framed within start and stop signals, are transmitted enciphered following the last IV character. Start and stop framing signals are not enciphered. Encipherment continues, except for BREAK (described below), until clearing of the physical

46、connection or data channel turn- around in half duplex transmission. Figure 4 illustrates the start of asynchronous encipher- ment as well as the Class A BREAK operation described below. 7.1.3 BREAK BREAK is signalled by a SPACE condition existing for one character time or longer. The action of the

47、DEE on a BREAK shall ba according to one of the following alternatives. 7.1.3.1 Class A The first binary zero bit of the BREAK is treated as a start signal. The next n binary zero bits are enciphered, where n is the normal character length in bits without the start signal snd stop signal. The stop s

48、ignal (MARK condition) is not output by the DEE. Subsequent binary zero bits in the BREAK are not enciphered and the DEE continues to output the binary zero state. Figure 4 illustrates this action on the right hand side. The transition to the MARK condition at the DEE input produces a corresponding

49、transition at the DEE output. Subsequently, the DEE resumes its normal operation. 7.1.3.2 Class B The DEE normally does not output any character until the stop signal has been received. BREAK is detected by the absence of the expected stop signal. Having detected a BREAK the DEE outputs an identical BREAK, suspending encipherment. The end of the BREAK is output after a suitable delay, following which normal operation is resumed. Figure 5 illustrates Class B break operation. 7.2 Reception 7.2.1 Starting Decipherment Upon call esta

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