ANSI TIA EIA 422-B-1994 Electrical Characteristics of Balanced Voltage Digital Interface Circuits《平衡电压数字接口电路的电气特性》.pdf

1、 TIA STANDARD Electrical Characteristics of Balanced Voltage Digital Interface Circuits TIA-422-B (Revision of EIA-422-A) May 1994 TELECOMMUNICATIONS INDUSTRY ASSOCIATION Representing the telecommunications industry in association with the Electronic Industries Alliance ANSI/TIA/EIA-422-B-1994Approv

2、ed: April 13, 1994Reaffirmed: January 27, 2000Reaffirmed: September 16, 2005Copyright Telecommunications Industry Association Provided by IHS under license with EIANot for ResaleNo reproduction or networking permitted without license from IHS-,-,-NOTICE TIA Engineering Standards and Publications are

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6、arties adopting the Standard or Publication. This Standard does not purport to address all safety problems associated with its use or all applicable regulatory requirements. It is the responsibility of the user of this Standard to establish appropriate safety and health practices and to determine th

7、e applicability of regulatory limitations before its use. (From Standards Proposal No. 3-4635-RF2, formulated under the cognizance of the TIA TR-30.2 Subcommittee on DTE-DCE Interfaces). Published by TELECOMMUNICATIONS INDUSTRY ASSOCIATION Standards and Technology Department 2500 Wilson Boulevard Ar

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21、rovided by IHS under license with EIANot for ResaleNo reproduction or networking permitted without license from IHS-,-,-FOREWORD (This foreword is not part of this Standard) This Standard, from Standards Proposal No. 1849, was formulated under the cognizance of TIA Subcommittee TR-30.2 on Data Trans

22、mission Interfaces. This Standard specifies generators and receivers capable of operating at data signaling rates up to 10 Mbitls. No technical changes have been incorporated into TIAIEIA-422-B which will create compatibility problems with equipment conforming to previous versions of TIAIEIA-422. Th

23、is Standard provides an additional termination option not specified in EIA-422-A. This option is an RC termination, and is optimal for use on low speed control lines where power dissipation is a major concern. Annex A of this Standard is informative and provides guidelines for application. Annex B o

24、f this Standard is also informative and provides information on compatibility with other interface standards, and references to this Standard. Neither Annex is considered part of this Standard. Copyright Telecommunications Industry Association Provided by IHS under license with EIANot for ResaleNo r

25、eproduction or networking permitted without license from IHS-,-,-BLANK PAGE Copyright Telecommunications Industry Association Provided by IHS under license with EIANot for ResaleNo reproduction or networking permitted without license from IHS-,-,-TINEIA-422-B ELECTRICAL CHARACTERISTICS OF BALANCED V

26、OLTAGE DIGITAL INTERFACE CIRCUITS CONTENTS Page SCOPE 1 . DEFINITIONS 2 APPLICABILITY . 2 ELECTRICAL CHARACTERISTICS 5 Generator Characteristics 5 Generator Output Impedance 6 Open Circuit Measurements . 7 Test Termination Measurements 7 Short-circuit Measurement 8 Power-off Measurement . 8 Output S

27、ignal Waveform 8 . . Load Charactenstcs 10 Input Current-Voltage Measurements . 10 Input Sensitivity Measurements . 10 Input Balance Measurements . 13 Cable Termination . 13 Multiple Receiver Operation 14 Failsafe Operation 15 Total Load Limit 16 Interconnecting Cable Characteristics 16 ENVIRONMENTA

28、L CONSTRAINTS . 17 CIRCUIT PROTECTION 17 OPTIONAL GROUNDING ARRANGEMENTS . 18 Signal Common 18 Configuration “A“ . 19 Configuration “B“ 19 iii Copyright Telecommunications Industry Association Provided by IHS under license with EIANot for ResaleNo reproduction or networking permitted without license

29、 from IHS-,-,-Contents Page 7.2 Shield Ground 19 ANNEX A (informative) 20 A . 1 Interconnecting Cable and Termination 20 A.l.l Cable Length with Resistive Termination (Option 1) 20 A.1.2 Cable Termination 22 A.2 Codirectional and Contradirectional Timing Information . 23 ANNEX B (informative) . 24 B

30、 . 1 Compatibility with Other Interface Standards . 24 8.2 Related TlAlEIA Standards 25 Copyright Telecommunications Industry Association Provided by IHS under license with EIANot for ResaleNo reproduction or networking permitted without license from IHS-,-,-1 SCOPE This Standard specifies the elect

31、rical characteristics of the balanced voltage digital interface circuit, normally implemented in integrated circuit technology, that may be employed when specified for the interchange of serial binary signals between Data Terminal Equipment (DTE) and Data Circuit-Terminating Equipment (DCE) or in an

32、y point-to-point interconnection of serial binary signals between digital equipment. This Standard is compatible with ITU-T (Formally CCITT) Recommendation v.11. The interface circuit includes a generator connected by a balanced interconnecting cable to a load consisting of a receiver or receivers a

33、nd a termination. The electrical characteristics of the circuit are specified in terms of required voltage, current, and resistance values obtained from direct measurements of the generator and receiver components at the interface points. The logic function of the generator and the receiver is not d

34、efined by this Standard, as it is application dependent. The receiver specification for the balanced interface is identical to that specified for the unbalanced interface circuit in TIA/EIA-423-B. Minimum performance requirements for the interconnecting cable are furnished. Guidance is given in Anne

35、x A.l with respect to limitations on data signal rate imposed by the parameters of the cable length, balance, and termination, for individual installations. The parameter values specified for the balanced generator and load components of the interface are designed such that balanced interface circui

36、ts may be used within the same interconnection as unbalanced interface circuits specified by TINEiA-423-B. For example, the balanced circuits may be used for data and timing while the unbalanced circuits may be used for low speed control functions. It is intended that this Standard will be reference

37、d by other standards that specify the complete DTEIDCE interface (e.g., connector, pin assignments, function) for applications where the electrical characteristics of a balanced voltage digital circuit are required. This Standard does not specify other characteristics of the DTVDCE interface (such a

38、s signal quality and timing, etc.) essential for proper operation across the interface. When this Standard is referenced by other standards or specifications, it should be noted that certain options are available. The preparer of those standards and specifications must determine and specify those op

39、tional features that are required for that application. Copyright Telecommunications Industry Association Provided by IHS under license with EIANot for ResaleNo reproduction or networking permitted without license from IHS-,-,-2 DEFINITIONS In this Standard, the term: data signaling rate, expressed

40、in the units bit such as, in biphase encoded systems where the data signaling rate is twice the data transfer rate. star () represents the opposite input condition for a parameter. For example, the symbol Q represents the receiver output state for one input condition, while Q represents the output s

41、tate for the opposite input state. 3 APPLICABILITY The provisions of this Standard may be applied to the circuits employed at the interface between equipments where information being conveyed is in the form of binary signals at the dc baseband level. This Standard shall be referenced by the specific

42、ations and specific interface standards applying these electrical characteristics. Typical points of applicability for this Standard are depicted in figure 1. Copyright Telecommunications Industry Association Provided by IHS under license with EIANot for ResaleNo reproduction or networking permitted

43、 without license from IHS-,-,-Legend: DTE = Data Terminal Equipment = Interface Generator DCE = Data Circuit-Terminating Equipment , = Interface Receiver + = Telecommunications Channel - = Balanced Interface Ciait Figure 1 - Applications of balanced voltage digital interface circuit The balanced vol

44、tage digital interface circuit will normally be utilized on data and timing, or control circuits where the data signaling rate is up to 10 MbiUs. Balanced voltage digital interface devices meeting the electrical characteristics of this Standard need not operate over the entire data signaling rate ra

45、nge specified. They may be designed to operate over a narrower ranges to satisfy more economically specific applications, particularly at the lower data signaling rates. While the balanced interface is intended for use at the higher data signaling rates, it may (in preference to the unbalanced inter

46、face circuit) generally be required where any of the following conditions prevail: a. The interconnecting cable is too long for effective unbalanced operation. b. The interconnecting cable is exposed to extraneous noise sources that may cause an unwanted voltage in excess of *1V measured differentia

47、lly between the signal conductor and circuit common at the load end of the cable with a 50 R resistor substituted for the generator. c. It is necessary to minimize interference with other signals. d. Inversion of the signals may be required; e.g., plus MARK to minus MARK may be obtained by inverting

48、 the cable pair. Copyright Telecommunications Industry Association Provided by IHS under license with EIANot for ResaleNo reproduction or networking permitted without license from IHS-,-,-While a restriction of maximum cable length in not specified, guidelines are given with respect to conservative operating distances as a function of data signaling rate (see Annex A). In general, these conservative values may be greatly exceeded where the installation is engineered to ensure that noise and ground potential values are held within specified limits. Copyright Telecommunications Industry Associa