ANSI VITA 46.1-2007 VMEbus Signal Mapping for VITA 46《VITA 46用VME总线信号绘图》.pdf

1、ANSI/VITA 46.1-207 American National Standard for VMEbus Signal Maping on VPX Secretariat VMEbus International Trade Asociation Approved October 2007 American National Standards Institute, Inc. VMEbus International Trade Asociation PO Box 19658, Fountain Hills, AZ 85269 PH: 480-837-7486, FAX: Contac

2、t VITA Office E-mail: , URL: http:/ (This page left blank intentionally.)ANSI/VITA 46.1-2007 American National Standard for VMEbus Signal Maping on VPX Secretariat VMEbus International Trade Asociation Approved October 2007 American National Standards Institute, Inc. Abstract This standard defines a

3、 signal mapping for the VMEbus on ANSI/VITA 46.0, VPX Baseline Standard. American National Standard Aproval of an American National Standard requires verification by ANSI that the requirements for due proces, consensus, and other criteria for aproval have ben met by the standards developer. Consensu

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12、erica - R1.0, ISBN 1-85731-45-0 ANSI/VITA 46.1, VMEbus Signal Maping on VPX Table of Contents 1 Introduction 9 1.1 Objective 9 1.2 Overview 10 1.3 Terminology 10 1.3.1 Standard Key Words 11 1.3.2 VITA 46 Definitions 12 1.4 References 13 2 Plug-in Module Requirements 14 2.1 3U Boards Minimum Features

13、 14 2.2 6U A24:D16 Boards Minimum Features 15 2.3 6U A32:D32 Boards Minimum Features 15 2.4 Connector Pin Mapping 16 2.4.1 P0 - Connector Pin Mappings 16 2.4.2 P1 - Connector Pin appings 16 2.4.3 P2 - Connector Pin Mappings 17 2.4.4 P3 - Connector Pin appings 20 2.4.5 P4 - Connector Pin Mappings 22

14、2.4.6 P5 - Connector Pin appings 24 2.4.7 P6 - Connector Pin Mappings 26 3 Backplane Requirements 27 3.1 Homogenous Backplane Requirements 27 3.1.1 Common Requirements 27 3.1.2 3U Backplanes Minimum Features 27 3.1.3 6U Backplanes inimum Features 28 3.1.4 Homogenous Backplane naming convention 28 3.

15、2 Hybrid Backplane Requirements 29 3.2.1 Hybrid Backplane Naming Convention 30 ANSI/VITA 46.1, VMEbus Signal Maping on VPX Tables Table 2 - 1 Plug-in Module P2 Mapping17 Table 2 - 2 Backplane J2 Mapping18 Table 2 - 3 Plug-in Module P3 Mapping20 Table 2 - 4 Backplane J3 Mapping21 Table 2 - 5 Plug-in

16、Module P4 Mapping22 Table 2 - 6 Backplane J4 Mapping23 Table 2 - 7 Plug-in Module P5 Mapping24 Table 2 - 8 Backplane J5 Mapping25 Figures Figure 2-1 V46.1 3U-Slot.14 Figure 2-2 V46.1 6U-slot.15 Figure 3-1 6U Hybrid Backplane29 Figure 3-2 3U Hybrid Backplane29 Apendix Appendix A Mapping of Plug-in Mo

17、dule Connector to Backplane Connector32 ANSI/VITA 46.1, VMEbus Signal Maping on VPX Working Group At the time this standard was competed, working group membership included: Name Company Randy Banton Mercury Rodger Bird Boeing Ken Boyete Critia Gorky Chin Curtis-Wright Controls David Compston Radston

18、e Stewart Dewar Curtis-Wright Controls Gerard Drewek General Dynamics C4 Systems Chris Eckert SBS Technologies Greg Grifith Tyco Bil Hanna Boeing Jing Kwok Curtis-Wright Controls Tony Lavely Mercury Andreas Lenkisch Schroff Michael Munroe Bustronic Corp. Elwood Parsons Foxconn Bob Paterson Tyco Jim

19、Robles Boeing Greg Rocco Mercury John Rynearson VITA Ivan Straznicky Curtis-Wright Controls Bob Sullivan Hybricon Bruce Thomas Curtis-Wright Controls Lary Thompson NSWC, Crane Division John Wemekamp Curtis-Wright Controls Randy hite Curtis-right Controls The following people were members of the ANSI

20、 VITA baloting group and voted in the balot. Their participation in the ANSI proces is acknowledged and greatly appreciated. Name Company Aaron Kaiway Spectrum Signal Procesing Andrew Reddig TEK Microsystems, Incorporated Bob Paterson Tyco Bob Sullivan Hybricon Bruce Thomas Curtis Wright Controls Em

21、bedded Computing Chris Eckert GE FANUC Embedded Systems David Compston GE FANUC Elwood Parsons Foxconn Ernie Domitrovits Curtis Wright Controls Embedded Computing Gerard Drewek General Dynamics ANSI/VITA 46.1, VMEbus Signal Maping on VPX Gorky Chin Curtis-Wright Controls Embedded Computing Greg Grif

22、ith Tyco Hermann Stras Technology Consulting Jing Kwok Curtis-Wright Controls Embedded Computing John Rynearson VITA Masayuki Mochida KRocky ichael Hasenfratz Northrop Gruman Michael Munroe Elma Bustronic Corp ike acpherson Curtis-Wright Controls Embedded Computing Randy White Curtis-right Controls

23、Embedded Computing Stewart Dewar Curtis Wright Coments, Corections, or Aditions Comments, corrections, or additions to this standard should be forwarded to the Technical Director of VITA. VSO and Other Standards Information about other standards being developed by VSO as wel as Product Directories,

24、VME Handbooks, and general information about the embedded market is available from the VITA office listed on the front cover. ANSI/VITA 46.1, VMEbus Signal Maping on VPX 1 Introduction The embedded computing industry serving markets needing ruggedized products requires data plane interconnect techno

25、logies which more closely follow the industry state of the art than those currently available. Switched serial technologies are available which provide significant benefits over currently deployed interconnect technologies. The benefits of switched serial interconnect technologies over paralel multi

26、-drop buses include but are not limited to: Higher transaction bandwidth Higher aggregate bandwidth Lower link latency Les contention for the interconnect medium Increased scalability Les routing real estate consumed The VITA 46 standard is a proposal for standardization of switched serial interconn

27、ects for VMEbus applications, with specific concern taken to alow deployment in ruggedized environments. There are many candidate technologies for switched serial interconnects. These include without limitation: Ethernet through 10 GBit, Fibre Channel, InfiniBand, Serial RapidIO, PCI Expres and othe

28、rs. Each technology has its pros and cons, and the market wil determine which ones wil ultimately survive. The data plane defines a “playing field” on which users may implement their prefered serial interconnect. The VITA 46 base standard defines physical features of VITA 46 components. “Dot” standa

29、rds further define additional sets of protocol layer standards that define specific serial or paralel interconnects used in a system implementation. This standard, VITA 46.1 is one of the “dot” standards within the VITA 46 family of standards. It defines the mapping of VMEbus signals to the standard

30、. 1.1 Objective The objective of this standard is to supplement the VITA 46 base standard with the definition for the VMEbus signals as mapped to a VITA 46 connector. ANSI/VITA 46.1, VMEbus Signal Maping on VPX 1.2 Overview The VITA 46 base standard defines physical features of VITA 46 components. “

31、Dot” standards further define additional sets of protocol layer standards that define specific serial or paralel interconnects used in a system implementation. VITA 46.1 is one of the standards within the VITA 46 family of standards. Refer to VITA 46 for a list of other dot standards. The VITA 46.0

32、base standard includes features drawn from IEE1101.1 and IEE1101.2 (for air cooled and conduction cooled modules, respectively). These are evident in the mechanical drawings. The VITA 46 base standard defines physical features that enable high-speed communication in a VPX system. These features incl

33、ude: a 6U by 160mm by 4HP Eurocard format board with high speed diferential connectors, a 6U by 160mm by 4HP Eurocard format board with a combination of high speed diferential and single-ended connectors, and the backplane/chasis infrastructure needed to support these features. The base standard als

34、o defines similar physical features for 3U by 160mm by 4HP Eurocard format, providing the same two types of connector options discussed above for 6U modules. Many mechanical features caled for in the base standard wil be compatible with the requirements of other standards, such as VITA 48. The VITA

35、46 base standard also defines alignment and keying features used to protect the connector system. The VITA 46 base standard does not addres the possible serial fabric configurations available in systems that utilize the standard. While the base standard does not addres the use of ANSI/VITA 1.1 or VI

36、TA 41 modules, or modules which are constructed to the mechanical requirements of VITA 48, chasis and backplanes can be constructed which provide compatibility with modules built to these standards. The dot standards alow the use of the single-ended connector alocation for paralel busses, such as VM

37、E or PCI, completing the compatibility betwen the older standards and this one. This document defines the pin mapping for the VMEbus on a VITA 46 module and backplane. 1.3 Terminology ANSI/VITA 46.1, VMEbus Signal Maping on VPX 1.3.1 Standard Key Words To avoid confusion and to make very clear what

38、the requirements for compliance are, many of the paragraphs in this standard are labeled with keywords that indicate the type of information they contain. These keywords are listed below: Rule Recommendation Suggestion Permision Observation Any text not labeled with one of these keywords should be i

39、nterpreted as descriptive in nature. These wil be writen in either a descriptive or a narative style. The keywords are used as folows: Rule .: Rules form the basic framework of this standard. They are sometimes expresed in text form and sometimes in the form of figures, tables or drawings. Al rules

40、shal be followed to ensure compatibility betwen board and backplane designs. Al rules use the “shal“ or “shal not“ words to emphasize the importance of the rule. The “shal“ or “shal not“ words are reserved exclusively for stating rules in this standard and are not used for any other purpose. Recomme

41、ndation .: Wherever a recommendation appears, designers would be wise to take the advice given. Doing otherwise might result in poor performance or awkward problems. Recommendations found in this standard are based on experience and are provided to designers to speed their traversal of the learning

42、curve. Al recommendations use the “should“ or “should not“ words to emphasize the importance of the recommendation. The “should“ or “should not“ words are reserved exclusively for stating recommendations in this standard and are not used for any other purpose. Suggestion .: A suggestion contains adv

43、ice, which is helpful but not vital. The reader is encouraged to consider the advice before discarding it. ANSI/VITA 46.1, VMEbus Signal Maping on VPX Some design decisions that need to be made are dificult until experience has been gained. Suggestions are included to help a designer who has not yet

44、 gained this experience. Permision .: In some cases a rule does not specificaly prohibit a certain design approach, but the reader might be left wondering whether that approach might violate the spirit of the rule or whether it might lead to some subtle problem. Permisions reasure the reader that a

45、certain approach is aceptable and wil cause no problems. Al permisions use the “may“ words to emphasize the importance of the permision. The lower-case “may“ words are reserved exclusively for stating permisions in this standard and are not used for any other purpose. Observation .: Observations do

46、not offer any specific advice. They usualy follow naturaly from what has just been discussed. They spel out the implications of certain rules and bring atention to things that might otherwise be overlooked. They also give the rationale behind certain rules so that the reader understands why the rule

47、 must be followed. 1.3.2 VITA 46 Definitions The following terms are used within the body of the standard. In this context, they have the following meanings: Ground Unles otherwise specified the term Ground means logic ground or signal ground, not safety ground. Also refered to as RF Ground. Se Safe

48、ty Ground and RF Ground. MultiGig 7-Row connector A family of connectors, or their equivalent, used in VITA 46 systems for high speed interconnections. Se the base standard for part numbers. RF Ground - A distributed low impedance common reference betwen plug-in module circuitry/shields and other el

49、ectrical equipment (rack, other modules, and power sources). Safety Ground - Plug-in module features that ensure hazardous voltages are not present on acesible hardware under single fault conditions. VME Board A board that complies with the ANSI/VITA 1.1, VME64 Extensions standard. Vs Notation representing Prime Power from the system to the plug-in module. ANSI/VITA 46.1, VMEbus Signal Maping on VPX 1.4 References The following publications may be used in conjunction with this standard. Permision 1-1: The following documents, of the e