ASTM F1662-2004 Standard Test Method for Verifying the Specified Dielectric Withstand Voltage and Determining the Dielectric Breakdown Voltage of a Membrane Switch《薄膜开关的规定的介质抗电强度的验.pdf

1、Designation: F 1662 04Standard Test Method forVerifying the Specified Dielectric Withstand Voltage andDetermining the Dielectric Breakdown Voltage of aMembrane Switch1This standard is issued under the fixed designation F 1662; the number immediately following the designation indicates the year ofori

2、ginal adoption or, in the case of revision, the year of last revision. A number in parentheses indicates the year of last reapproval. Asuperscript epsilon (e) indicates an editorial change since the last revision or reapproval.1. Scope1.1 This test method covers the verification of a specifieddielec

3、tric withstand voltage or dielectric breakdown voltage ofa membrane switch.2. Referenced Documents2.1 ASTM Standards:2F 1680 Test Method for Determining Circuit Resistance of aMembrane SwitchF 1663 Test Method for Determining the Capacitance of aMembrane Switch3. Terminology3.1 Definitions:3.1.1 die

4、lectric withstand voltagea voltage, above ratedvoltage, applied for a specific time between mutually insulatedtest points or between an insulated test point and ground, whichresults in no visual change or specified leakage current.3.1.2 dielectric breakdown voltagethe voltage at which adisruptive di

5、scharge or excessive leakage current occurs.3.1.3 disruptive dischargeflashover (surface discharge),spark over (air discharge), or breakdown (puncture discharge).3.1.4 leakage currentcurrent between mutually insulatedtest points when a voltage is applied.3.1.5 membrane switcha momentary switching de

6、vice inwhich at least one contact is on, or made of, a flexiblesubstrate.3.1.6 test pointstwo preselected mutually insulated loca-tions on switch assembly.4. Significance and Use4.1 Dielectric withstand voltage testing is useful for designverification, quality control of materials, and workmanship.4

7、.2 This test method is used to verify that the membraneswitch can operate safely at its rated voltage, and withstandmomentary overpotentials due to switching, surges and othersimilar electrical phenomena.4.3 Specific areas of testing are, but not limited to:4.3.1 Conductor/dielectric/conductor cross

8、ing point,4.3.2 Close proximity of conductors, and4.3.3 Any other conductive surface such as shielding ormetal backing panel.4.4 Dielectric withstand voltage testing may be destructiveand units that have been tested should be considered unreliablefor future use.5. Interferences5.1 The following para

9、meters may affect the results of thistest:5.1.1 Humidity,5.1.2 Contamination,5.1.3 Barometric pressure, and5.1.4 Temperature.6. Apparatus6.1 Electric Device, suitable to provide a controlled dcvoltage, leakage current measurement.7. Procedure7.1 Dielectric Withstand Test Method:7.1.1 Measure and rec

10、ord the following characteristics priorto performing test:7.1.1.1 Open and closed circuit resistance of the test pointsin accordance with Test Method F 1680.7.1.1.2 Capacitance of the test point in accordance withF 1663.7.1.2 Connect two test points on the switch assembly, eachto a separate polarity

11、, on the voltage source.7.1.3 Select test voltage from Table 1.1This test method is under the jurisdiction of ASTM Committee F01 onElectronics and is the direct responsibility of Subcommittee F01.18 on MembraneSwitches.Current edition approved May 1, 2004. Published June 2004. Originallyapproved in

12、1995. Last previous edition approved in 2003 as F 1662-03.2For referenced ASTM standards, visit the ASTM website, www.astm.org, orcontact ASTM Customer Service at serviceastm.org. For Annual Book of ASTMStandards volume information, refer to the standards Document Summary page onthe ASTM website.1Co

13、pyright ASTM International, 100 Barr Harbor Drive, PO Box C700, West Conshohocken, PA 19428-2959, United States.7.1.4 Apply the test voltage from zero to specified value asuniformly as possible, at a rate of approximately12 of the testvoltage per second (V/s), unless otherwise specified. Forexample,

14、 Level 2 in Table 1, the ramp rate is 250 V/s for a testvoltage of 500 V dc.7.1.5 Apply test voltage to switch assembly for 60 s.7.1.6 Record visual changes or leakage current, or both, ifany.7.1.7 Dissipate all charges to ground using appropriatemethods prior to continuing test to next test voltage

15、 (repeat7.1.3 to 7.1.7 as needed).7.1.8 Repeat measurements recorded in 7.1.1.7.2 Dielectric Breakdown Method:7.2.1 Connect two test points on the switch assembly, eachto a separate polarity, on the voltage source.7.2.2 Apply the voltage incrementally from zero to break-down as uniformly as possible

16、, at a rate of 250 V/s unlessotherwise specified.7.2.2.1 Apply test voltage to switch assembly for 60 s ateach incremental test voltage.7.2.3 Record visual changes and magnitude of breakdownvoltage, if any.7.2.4 Dissipate all charges to ground using appropriatemethods prior to continuing test to add

17、itional test points (repeat7.2.1 to 7.2.4).8. Report8.1 Report the following information:8.1.1 Temperature,8.1.2 Relative humidity,8.1.3 Barometric pressure,8.1.4 Specified dielectric withstand voltage (pass or fail),8.1.5 Circuit resistance pre and post (Dielectric WithstandTest),8.1.6 Capacitance

18、pre and post (Dielectric Withstand Test),8.1.7 Delectric breakdown voltage,8.1.8 Actual applied voltage or failure voltage,8.1.9 Duration of applied voltage,8.1.10 Description of test equipment,8.1.11 Voltage ramp rate,8.1.12 Part number or description of switch, or both,8.1.13 Description of test p

19、oints,8.1.14 Date of test,8.1.15 Description of visual change (if applicable),9. Precision and Bias9.1 The precision and bias of this test method are underinvestigation.10. Keywords10.1 dielectric withstand voltage; dielectric breakdown volt-age; membrane switchASTM International takes no position r

20、especting the validity of any patent rights asserted in connection with any item mentionedin this standard. Users of this standard are expressly advised that determination of the validity of any such patent rights, and the riskof infringement of such rights, are entirely their own responsibility.Thi

21、s standard is subject to revision at any time by the responsible technical committee and must be reviewed every five years andif not revised, either reapproved or withdrawn. Your comments are invited either for revision of this standard or for additional standardsand should be addressed to ASTM Inte

22、rnational Headquarters. Your comments will receive careful consideration at a meeting of theresponsible technical committee, which you may attend. If you feel that your comments have not received a fair hearing you shouldmake your views known to the ASTM Committee on Standards, at the address shown

23、below.This standard is copyrighted by ASTM International, 100 Barr Harbor Drive, PO Box C700, West Conshohocken, PA 19428-2959,United States. Individual reprints (single or multiple copies) of this standard may be obtained by contacting ASTM at the aboveaddress or at 610-832-9585 (phone), 610-832-9555 (fax), or serviceastm.org (e-mail); or through the ASTM website(www.astm.org).TABLE 1 Test VoltageATest Voltage (dc) Ramp Rate (V/s)Level 1 250 125Level 2 500 250Level 3 1000 500Level 4 As specified As specifiedAAll dwell times at maximum dc voltage = 60 s.F 1662 042