1、Designation: F 615M 95 (Reapproved 2008)Standard Practice forDetermining Safe Current Pulse-Operating Regions forMetallization on Semiconductor Components (Metric)1This standard is issued under the fixed designation F 615M; the number immediately following the designation indicates the year oforigin
2、al adoption or, in the case of revision, the year of last revision. A number in parentheses indicates the year of last reapproval. Asuperscript epsilon () indicates an editorial change since the last revision or reapproval.1. Scope1.1 This practice covers procedures for determining operat-ing region
3、s that are safe from metallization burnout induced bycurrent pulses of less than 1-s duration.NOTE 1In this practice, “metallization” refers to metallic layers onsemiconductor components such as interconnect patterns on integratedcircuits. The principles of the practice may, however, be extended ton
4、early any current-carrying path. The term “burnout” refers to eitherfusing or vaporization.1.2 This practice is based on the application of unipolarrectangular current test pulses. An extrapolation technique isspecified for mapping safe operating regions in the pulse-amplitude versus pulse-duration
5、plane.Aprocedure is providedin Appendix X2 to relate safe operating regions establishedfrom rectangular pulse data to safe operating regions forarbitrary pulse shapes.1.3 This practice is not intended to apply to metallizationdamage mechanisms other than fusing or vaporization inducedby current puls
6、es and, in particular, is not intended to apply tolong-term mechanisms, such as metal migration.1.4 This practice is not intended to determine the nature ofany defect causing failure.1.5 This standard does not purport to address all of thesafety concerns, if any, associated with its use. It is there
7、sponsibility of the user of this standard to establish appro-priate safety and health practices and determine the applica-bility of regulatory limitations prior to use.2. Terminology2.1 Definitions of Terms Specific to This Standard:2.1.1 failurea change in the measured resistance of610 % DR/R or as
8、 agreed upon by the parties to the test.3. Summary of Practice3.1 Specimens are selected from the population being evalu-ated.3.2 The d-c resistance of each specimen is measured.3.3 Each specimen is subjected to stress from rectangularcurrent pulses varying in amplitude and duration according toa pr
9、edetermined schedule of pulse width and amplitudes.3.4 A second d-c resistance measurement is made on eachspecimen after each pulse, and it is characterized as havingfailed or survived.3.5 The number, x, of specimens surviving and the totalnumber, n, of specimens tested at each pulse width andamplit
10、ude are analyzed statistically to determine the burnoutlevel at each test pulse width for the desired burnout survivalprobability and confidence level.3.6 A point corresponding to the burnout level (at thedesired probability and confidence level) is plotted for each ofthe test pulse duration values
11、in the pulse-amplitude, pulse-duration plane. Based on these points, an extrapolation tech-nique is used to plot the boundary of the safe operating region.3.7 The following items are not specified by the practice andare subject to agreement by the parties to the test:3.7.1 The procedure by which the
12、 specimens are to beselected.3.7.2 Test patterns that will be representative of adjacentmetallization on a die or wafer (5.3).3.7.3 The schedule of pulse amplitudes and durations to beapplied to the test samples (9.8).1This practice is under the jurisdiction of ASTM Committee F01 on Electronicsand i
13、s the direct responsibility of Subcommittee F01.11 on Nuclear and SpaceRadiation Effects.Current edition approved June 15, 2008. Published July 2008. Originallyapproved in 1995. Last previous edition approved in 2002 as F 615M-95(2002).1Copyright ASTM International, 100 Barr Harbor Drive, PO Box C70
14、0, West Conshohocken, PA 19428-2959, United States.3.7.4 The level of probability and confidence to be used incalculations to establish the boundary of the safe operatingregion (10.1).3.7.5 The amount of change of resistance that will define thecriterion for failure.3.7.6 The statistical model to be
15、 used to determine theburnout probability at a desired stress level.3.7.7 The form and content of the report.4. Significance and Use4.1 Solid-state electronic devices subjected to stresses fromexcessive current pulses sometimes fail because a portion ofthe metallization fuses or vaporizes (suffers b
16、urnout). Burnoutsusceptibility can vary significantly from component to com-ponent on a given wafer, regardless of design. This practiceprovides a procedure for establishing the limits of pulse currentoverstress within which the metallization of a given deviceshould survive.4.2 This practice can be
17、used as a destructive test in alot-sampling program to determine the boundaries of the safeoperating region having desired survival probabilities andstatistical confidence levels when appropriate sample quantitiesand statistical analyses are used.NOTE 2The practice may be extended to infer the survi
18、vability ofuntested metallization adjacent to the specimen metallization on asemiconductor die or wafer if care is taken that appropriate similaritiesexist in the design and fabrication variables.5. Interferences5.1 The level at which failure of metallization subjected topulsed-current overstress oc
19、curs may be dependent on thetemperature experienced by the semiconductor device. Ifsignificant differences in ambient temperature or heat sinking,or both, exist between one test situation and another, the resultsmay not be representative.NOTE 3See Appendix X1 for a discussion of factors related tome
20、tallization heat sinking.5.2 If probes are used to contact the metallization specimen,suitable precautions must be taken or the results may bemisleading. The probes must not be allowed to come intocontact with the area of metallization being characterized.5.2.1 The use of Kelvin probe connections to
21、 make theresistance measurements is usually required to prevent contactresistance (at the current injection point) from interfering withthe measurement.5.2.2 Probe contacts with excessive contact resistance maycause damage at the point of contact. Such damage caninterfere with the measurement.5.3 If
22、 the test is used to infer the survivability of metalliza-tion on a wafer or die, the results could be misleading unlesssuch factors as the following are identical: (1) metallizationdesign geometry, (2) oxide step geometry, and (3) orientationof the metallization paths and oxide steps to the metalli
23、zationsource during deposition.NOTE 4The design and fabrication factors listed in 5.3 have beenshown to be important for systems of aluminum metallization depositedon SiO2/Si substrates. They are given as examples and are not intended tobe all inclusive or necessarily to apply to all metallization s
24、ystems towhich this practice may be applied.NOTE 5Variations in oxide step geometry must be expected (seeX1.4.2).5.4 A step-stress pulsing schedule is not recommended. Ifsuch a schedule is used so that each specimen is subjected tosuccessive pulses of increasing amplitude until failure occurs,the re
25、sults could be misleading. It is possible that a pulse of theproper level can cause melting at a defect site without causingan open circuit; the molten metal may become redistributed sothat the defect appears cured and will lead to failure onsuccessive pulses.6. Apparatus6.1 Current-Pulse GeneratorA
26、 source of rectangular cur-rent pulses capable of meeting the following requirements:6.1.1 Risetime and falltime less than 10 % of the pulsewidth(full width at half maximum amplitude (FWHM),6.1.2 Impedance high enough with respect to the specimenmetallization so that the pulse amplitude remains cons
27、tant towithin 65 % between the end of the rise and beginning of thefall,6.1.3 Jitter in the pulse amplitude and width less than6 5%,6.1.4 Current amplitude and pulsewidth capability to pro-vide pulses as agreed upon by the parties to the test, and6.1.5 Single-pulse capability.NOTE 6Refer to Appendix
28、 X2 for information relating a rectangularpulse to an arbitrary pulse structure.6.2 Pulse-Monitoring Equipment, as follows:6.2.1 Voltage-Monitoring Kelvin Probe, for use in the circuitof Fig. 1, with risetime less than or equal to 5 % of thepulsewidth of the shortest pulse to be applied, and shuntca
29、pacitance sufficiently low so that the pulse shape is notdistorted more than specified in 6.1:6.2.2 Voltage-Monitoring Resistor (R, Fig. 1), with suffi-ciently low inductance, resistance, and shunt capacitance sothat the generated pulse is not distorted more than specified in6.1 and the value of the
30、 resistance is known within 61%.6.2.3 Current Probe, for use in the circuit of Fig. 2, withrisetime less than or equal to 5 % of the pulsewidth of theshortest pulse to be applied, with an ampere-second productsufficient to ensure nonsaturation for the amplitudes anddurations of the pulses to be used
31、 and accurate within 65%.6.3 Pulse-Recording Equipment, transient digitizer, oscillo-scope with camera, storage oscilloscope, or other pulse record-ing means having a risetime less than 5 % of the width of theshortest test pulse used and capable of recording individual testpulses.FIG. 1 Pulsing Circ
32、uit Using Resistor Voltage Drop to MonitorCurrent Through SpecimenF 615M 95 (2008)26.4 Test Fixture, providing means for the current pulse to betransmitted through the metallization specimen as well asthrough an equivalent resistance (see 9.5) without distortion ofthe pulse shape beyond that specifi
33、ed in 6.1. The test fixturemust also provide a means for connecting the metallizationspecimen to the resistance-measuring equipment (see 6.5). Thetest fixture will contact the specimen through either standardcomponent package leads or wafer probes. More than one testfixture may be used.6.5 Resistanc
34、e-Measuring EquipmentA curve tracer,ohmmeter, or other means to be used for evaluating the d-cresistance and continuity of the current path on the specimen.The current through the specimen during this measurementshould be minimized (less than 10 % of the d-c current ratingof the specimen).6.6 Miscel
35、laneous Circuit Components, to be used as re-quired in each of the test circuits (see Fig. 1 or Fig. 2). Theswitches, leads, and connections shall be of a quality usedcustomarily in electronic circuit testing.6.7 Resistors, as required, to match the d-c resistance of theunstressed specimen to within
36、 65%.7. Sampling7.1 The procedure by which the sample is to be taken andthe number of specimens for each test condition are notspecified by this practice and are to be agreed upon by theparties to the test.8. Test Specimen8.1 The specimen may be an integrated circuit or a specialtest structure for t
37、he evaluation of a design or process,depending on the purpose for which the measurements are tobe used.9. Procedure9.1 Assemble the pulsing circuit shown in either Fig. 1 orFig. 2, so that a specimen can be connected via a suitable testfixture into the test circuit.9.2 Turn on all equipment, and all
38、ow the apparatus to warmup in accordance with the manufacturers instructions.9.3 Connect the specimen to a suitable test fixture tomeasure the resistance of the specimen. If probes are used tocontact the specimen, see 5.2 for precautions.NOTE 7Appropriate handling precautions must be taken to preven
39、telectrostatic damage.9.4 Measure and record the specimen resistance, in ohms orcontinuity, as required.9.5 Connect an equivalent resistance into the pulse testingcircuit and, by applying pulses through this resistor, establishand record the pulser settings required to generate the pulseamplitudes t
40、o be applied to the specimen and the appropriatesettings for the pulse-monitoring equipment.9.6 Connect the specimen into the pulsing circuit.9.7 Set the current pulse generator and pulse monitoringequipment for a pulse of the designated amplitude and durationin accordance with the information recor
41、ded in 9.5.9.8 Apply a single pulse of the scheduled amplitude andduration to the specimen.9.9 Measure and record the specimen resistance (see 9.3 and9.4).9.10 Compare the value recorded in 9.9 with that recordedin 9.4. Characterize the specimen as failed if the resistance ofthe specimen has increas
42、ed by the amount agreed upon by theparties to the test. Otherwise, characterize the specimen assurvived. Record the characterization.9.11 Repeat 9.3 through 9.10 for each specimen in thesample at each of the scheduled pulse amplitudes and dura-tions, and record the number failing, xtI, and the numbe
43、r tested,ntI, at each pulse amplitude and duration.10. Calculation and Interpretation of Results10.1 Determine the safe operating region for general pulseduration, t, as indicated by Fig. 3. For each data point (t, I), asafe operating region includes all points falling below the curveIs(t) as follow
44、s:Ist! 5 Ittt, t$ twhere:t = test pulse width.10.2 If more than one data point (t, It) has been established,the upper bound of the safe operating region is defined by thesmallest value of Is(t)atanyt as defined by all data points.NOTE 8See Appendix X2 for a method of extending these results toarbitr
45、ary pulse shape.11. Report11.1 The contents of the test report will vary depending onthe purpose of the test. The specific format and content for theFIG. 2 Pulsing Circuit Using Current Probe to Monitor CurrentThrough SpecimenNOTE 1The safe operating region is that region of the l, t plane belowthe
46、solid boundary line.FIG. 3 Example of a Safe Operating RegionF 615M 95 (2008)3report (including the specific format in which the safe-operating area data is presented) are to be agreed upon by theparties to the test prior to the start of the test program.12. Keywords12.1 current pulse; current pulse
47、 burnout; metallizationburnout; safe current pulse; semiconductor burnoutAPPENDIXES(Nonmandatory Information)X1. METALLIZATION BURNOUT MECHANISMSX1.1 ScopeX1.1.1 This appendix describes the mechanisms involved inmetallization burnout, as addressed in the practice. This prac-tice deals with burnout f
48、ailures that occur as the result ofcurrent pulses of less than 1-s duration.X1.1.2 When metal interconnections on semiconductorcomponents (semiconductor metallization) are damaged bycurrent pulses of such duration, the damage is generally a resultof resistive heating in the metallization (often at d
49、efect sites),which causes the metallization to melt, vaporize, or both.Semiconductor metallization can also burn out as a secondaryresult of heating in the underlying semiconductor material.This practice and the following discussion are aimed atmechanisms associated with resistive heating in the metalliza-tion. The practice is intended to define safe operating regions inwhich such failures will not occur and is not intended todetermine the nature of any defect causing failure.X1.2 Equations of Resistive HeatingX1.2.1 When an electrically resistive material is subjected
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