BS CECC 90203-1985 Specification for harmonized system of quality assessment for electronic components - Blank detail specification integrated analogue switching circuits《电子元器件用质量评.pdf

1、BRITISH STANDARD BS CECC 90203:1985 Specification for Harmonized system of quality assessment for electronic components Blankdetail specification Integrated analogue switching circuitsBSCECC90203:1985 BSI10-1999 ISBN 0 580 35567 5 Amendments issued since publication Amd. No. Date CommentsBSCECC90203

2、:1985 BSI 10-1999 i Contents Page National foreword ii Foreword ii 1 Front page 1 2 Ratings (Limiting values) 3 3 Recommended conditions of use and associated characteristics 3 4 Test conditions and inspection requirements 4BSCECC90203:1985 ii BSI 10-1999 National foreword This British Standard has

3、been prepared under the direction of the Electronic Components Standard Committee. It is identical with CENELEC Electronic Components Committee (CECC) 90203:1985 “Harmonized system of quality assessment for electronic components. Blank detail specification: Integrated analogue switching circuits.” T

4、erminology and conventions. The text of the CECC specification has been approved as suitable for publication as a British Standard without deviation. Some terminology and certain conventions are not identical with those used in British Standards; attention is drawn especially to the following. The c

5、omma has been used as a decimal marker. In British Standards it is current practice to use a full point on the baseline as the decimal marker. Cross-references. The British Standard which implements CECC00100 is BS9000 “General requirements for a system for electronic components of assessed quality”

6、 Part2:1983 “Specification for national implementation of CECC basic rules and rules of procedure”. Scope. This standard lists the ratings, characteristics and inspection requirements which shall be included as mandatory requirements in accordance with BS CECC90000 in any detail specification for th

7、ese devices. Detail specification layout. The front page layout of detail specifications released to BS CECC family or blank detail specifications will be in accordance with BS9000 Circular Letter No.15. A British Standard does not purport to include all the necessary provisions of a contract. Users

8、 of British Standards are responsible for their correct application. Compliance with a British Standard does not of itself confer immunity from legal obligations. International Standard Corresponding British Standard CECC90000:1982 BS CECC90000:1982 Harmonized system of quality assessment for electr

9、onic components: Generic specification: Monolithic integrated circuits (Identical) CECC90200:1983 BS CECC90200:1983 Harmonized system of quality assessment for electronic components: Sectional specification: Analogue monolithic integrated circuits (Identical) Summary of pages This document comprises

10、 a front cover, an inside front cover, pagesi andii, theCECC title page, page ii, pages1 to 11 and a back cover. This standard has been updated (see copyright date) and may have had amendments incorporated. This will be indicated in the amendment table on the inside front cover.BSCECC90203:1985 ii B

11、SI 10-1999 Foreword The CENELEC Electronic Components Committee (CECC) is composed of those member countries of theEuropean Committee for Electrotechnical Standardization (CENELEC) who wish to take part in a harmonized System for electronic components of assessed quality. The object of the System is

12、 to facilitate international trade by the harmonization of the specifications and quality assessment procedures for electronic components, and by the grant of an internationally recognized Mark, or Certificate, of Conformity. The components produced under the System are thereby accepted by all membe

13、r countries without further testing. This specification has been formally approved by the CECC, and has been prepared for those countries taking part in the System who wish to issue national harmonized specifications for INTEGRATED ANALOGUE SWITCHING CIRCUITS. It should be read in conjunction with t

14、he current regulations for the CECC System. At the date of printing of this specification the member countries of the CECC are Austria, Belgium, Denmark, Finland, France, Germany, Ireland, Italy, the Netherlands, Norway, Portugal, Spain, Sweden, Switzerland, and the UnitedKingdom. Preface This blank

15、 detail specification (BDS) was prepared by CECC WG9 “INTEGRATED CIRCUITS”. It is based, wherever possible, on the Publications of the International Electrotechnical Commission and in particular on IEC147: Essential ratings and characteristics of semiconductor devices and general principles of measu

16、ring methods. The text of this BDS was circulated to the CECC for voting in the document indicated below and was ratified by the President of the CECC for printing is a CECC Specification. It is recognized that the layout proposed cannot apply to all detail specifications based on this document. For

17、 example when several similar devices are covered by the same detail specification, it may be convenient to give the limiting values in a table. Notice In accordance with the decision of the CECC Management Committee this specification is published initially in English and French. The German text wi

18、ll follow as soon as it has been prepared. Documents Date of voting Report on the voting CECC (Secretariat)1405 August1983 CECC (Secretariat)1513BSCECC90203:1985 BSI 10-1999 1 1 Front Page The front page of the DS shall be laid out as shown on the following page. The numbers between square brackets

19、correspond to the following indications which shall be given: Identification of the component and supplementary information: Description of the materials for the package (for example, glass, ceramic, silicone) and information relating to the mounting (welding, soldering), lead material and finish. I

20、nside the sketch of the package, the terminal connections to the inputs, outputs or other important points of the circuit shall be identified. This can be shown by a functional block diagram. Description of the numbering of the terminals with the identification of pin number1. Marking on the device

21、in accordance with the GS (see2.5 of CECC90000). Identification of the DS and of the component: 1 The name of the National Standards Organization under whose authority the DS is published and, if applicable, the organization from whom the DS is available. 2 The CECC Symbol and the CECC number allott

22、ed to the DS by the CECC General Secretariat. 3 The number and issue number of the CECC generic or sectional specification as relevant; also national reference if different. 4 If different from the CECC number, the national number of the DS, date of issue and any further information required by the

23、national system, together with any amendment numbers. 5 Type number, a short description of the type by: function (for example single pole, double throw switch) number of independent circuits per package number and kind of inputs and outputs material and type of construction (silicon, monolithic, mu

24、ltichip, bipolar, MOS) performance, for example low resistance, high speed, low power consumption electrostatic sensitivity (where appropriate). 6 Information on typical construction (if applicable) For5 and6 the text to be given in the DS should be suitable for an entry in CECC00200 or CECC00300. 7

25、 An outline drawing with main dimensions which are of importance for interchangeability, and/or reference to the appropriate national or international document for outlines. Alternatively, this drawing may be given in an appendix to the DS. 8 Quality assessment level(s) 9 Reference data giving infor

26、mation on the most important properties of the component, which allow comparison between the various component types intended for the same, or for similar, applications.BSCECC90203:1985 2 BSI 10-1999 Layout for front page of detail specification BSCECC90203:1985 BSI 10-1999 3 2 Ratings (limiting val

27、ues) (Not for inspection purposes) These apply over the operating temperature range, unless otherwise stated (see SS90200). 3 Recommended conditions of use and associated characteristics (Notforinspection purpose) The following characteristics shall apply over the full ambient operating temperature

28、range unless otherwise specified. Where the stated performance of the circuit varies over the ambient operating temperature range the values of the input and output voltages and their associated currents shall be stated at25 C and at the extremes of the operating temperature range. Where it is neces

29、sary to use external elements to ensure stable operation of the switch, the values of the characteristics specified refer to the switch with such elements connected. 2.1 Maximum (and where appropriate minimum) value of voltage between the reference terminal and each other terminal. 2.2 Any other lim

30、iting value(s) of voltage between any specified terminals as appropriate. 2.3 Maximum continuous output current I O 2.4 Maximum continuous internal power dissipation with reference to a derating curve or factor related to the reference point temperature or ambient temperature, if appropriate maximum

31、 power dissipation per switch P D 2.5 Maximum pulsed analogue current I peak 2.6 Maximum and minimum ambient or reference point operating temperature T amb 2.7 Maximum and minimum storage temperature T stg 2.8 Any specific mechanical or environmental ratings pecullar to the device 2.9 Any interdepen

32、dence of limiting conditions 2.10 Minimum value of short circuit time, where appropriate t OS Characteristics Symbol Method (See SS902004.1.3) 3.1 Input voltage(s) V I , V I(V S ) 3.2 Output voltage V O , V o(V D ) 3.3 Output current I O , I o(I D ) 3.4 Low level control input current I IL 3.5 High

33、level control input current I IH 3.6 Power supply currents (static conditions) I S(I CC , I DDI EE , I GNDI REF ) 3.7 Leakage current I l(OFF) , (I S(OFF) ) I O(OFF) , (I D(OFF) ) I lO(ON) , (I DS(ON) ) 3.8 Switch-ON resistance R (ON) , (R DS(ON) ) S-02 3.9 OFF-STATE switch Insulation (if applicable

34、) a (OFF) S-03 3.10 Harmonic distorsion (if applicable) D S-04 3.11 Crosstalk attenuation between any two channels a ct S-05 (where appropriate) 3.12 Feedthrough between control input and analogue output %V O S-06 3.13 Turn-ON time t (ON) S-07 3.14 Turn-OFF time t (OFF) S-07BSCECC90203:1985 4 BSI 10

35、-1999 4 Test conditions and inspection requirements These are given in the following tables, where the values and exact test conditions to be used shall be specified as required in the detail specification relevant to a given type, in line with the indications given in CECC90200 for the relevant tes

36、t. NOTE 1All tests are performed at T amb .=25 5 C, unless otherwise prescribed. NOTE 2In the tables the paragraph numbers refer to the generic or sectional specifications with the following code: External elements necessary to ensure stable operation shall be specified and shall be connected for al

37、l electrical tests. 4.1 Explanation of quality assessment levels R, T and V See S2/5.7.1. 4.2 Key of abbreviations See S2/5.7.2. Characteristics Symbol Method (See SS902004.1.3) 3.15 Transition time (if applicable) t T S-07 3.16 Propagation time (If applicable) t P S-07 3.17 MAKE-BEFORE-BREAK time (

38、where appropriate) t MBB S-08 3.18 BREAK-BEFORE-MAKE time (where appropriate) T BBM S-08 (SeeSS90200,4.1.1) 3.19 Cut-off frequency (if applicable) f a , f b A-10 The following additional information shall be given as design data. 3.20 A graph, or graphs showing switching times against V oand tempera

39、ture. 3.21 A graph, or graphs showing a normalised supply current I Sagainst the switching frequency. 3.22 A graph showing R (ON)versus analogue input voltage V i(if applicable) 3.23 A schematic diagram of the device shall be given, in the case of complex devices, a schematic for one typical channel

40、 may be given. G: Generic specification: Monolithic integrated circuits (CECC90000, issue2,) S1: Sectional specification: Digital monolithic integrated circuits (CECC90100, issue2) S2: Sectional specification: Analogue integrated monolithic circuits (CECC90200, issue1) Example: S2/4.2.2 = 4.2.2 of C

41、ECC90200. or S2/S-07=electrical test method n7 for an analogue switchBSCECC90203:1985 BSI 10-1999 5 Examination or test D ND Conditions of test Limits to be specified Inspection requirements Group A inspection: The following electrical inspection requirements shall be given. Additional characteristi

42、cs to be inspected may be given for specific circuit(s) in accordance with3 of this specification Assessment levels R T V IL AQL IL AQL IL AQL Sub-group A1 ND I 1,5 I 1,5 I 1,5 Visual examination G/4.2.2 See G/4.2.2 None Sub-group A2 ND II 0,15 II 0,25 II 0,25 Verification of the function Method S2/

43、S-01 Supply voltages and/or currents=specified values All input signals and resultant output levels as well as combinations necessary to verify the functional operation of the device shall be specified Loading conditions shall be specified Each switch shall be tested in turn S2/4.1.3 Sub-group A3 ND

44、 II 0,65 II 0,65 II 0,65 Static characteristics at25 C Low level control input current I IL Method S1/4.1.2 (3) Supply voltages as specified Control input voltage =V ILA Each control input shall be tested in turn I ILA High level control input current I IH Method S1/4.1.2 (4) Supply voltages as spec

45、ified Control input voltage= V IHB Each control input shall be tested in turn I IHA Positive supply current I S (1) (or I CC ) (if applicable) Method S1/4.1.6(1) Supply voltages as specified Control input voltages as specified I S(1)A (or I CCA )BSCECC90203:1985 6 BSI 10-1999Examination or test D ND

46、 Conditions of test Limits to be specified Inspection requirements Assessment levels R T V IL AQL IL AQL IL AQL Sub-group A3 Negative supply current I S (2) (or I EE ) (if applicable) Method S1/4.1.6 (1) Supply voltages as specified Control input voltages as specified I S(2)A (or I EEA ) Logic suppl

47、y current I S(3) (or I L ) (if applicable) Method S1/4.1.6 (1) Supply voltages as specified Control input voltages as specified I S(3)A (or I ILA ) Reference or ground supply current I S(4) (or I REFor I GND (where appropriate) Method S1/4.1.6(1) Supply voltages as specified Control input voltages a

48、s specified I S(4)A (or I REFA ) or I GNDA Switch input (source) (OFF) leakage current I l(OFF)(or I S(OFF) ) Method S1/4.1.8 Supply voltages as specified Analogue voltage(s) as specified The sequence and combination of control input signals necessary to turn OFF the measured channel shall be specif

49、ied Each switch shall be tested in turn I l(OFF)A (or I S(OFF)A ) Switch output (drain) (OFF) leakage current I O(OFF)(or I D(OFF) ) Method S1/4.1.8 Supply voltages as specified Analogue voltage(s) as specified The sequence and combination of control input signals necessary to turn OFF the measured channel shall be specified Each switch shall be tested in turn I O(OFF)A (or I D(OFF)A )BSCECC90203:1985 BSI 10-1999 7Examination or test D ND Conditions of test Limits to be specified Inspection requirements Assessment levels R T V