BS CECC 90302-1986 Specification for harmonized system of quality assessment for electronic components - Blank detail specification integrated voltage comparators《电子元器件质量评估协调体系规范 空.pdf

1、BRITISH STANDARD BS CECC 90302:1986 Incorporating Amendment No. 1 Specification for Harmonized system of quality assessment for electronic components Blank detail specification Integrated voltage comparatorsBSCECC90302:1986 BSI 10-1999 ISBN 0 580 35659 0 Amendments issued since publication Amd. No.

2、Date of issue Comments 8296 August 1994 Indicated by a sideline in the marginBSCECC90302:1986 BSI 10-1999 i Contents Page National foreword ii Foreword iii Text of CECC 90302 1BSCECC90302:1986 ii BSI 10-1999 National foreword This British Standard has been prepared under the direction of the Electro

3、nic Components Standards Committee. It is identical with CENELEC Electronic Components Committee (CECC)90302:1986 “Harmonized system of quality assessment for electronic components. Blank detail specification: Integrated voltage comparators as amended by Amendment No.1 published in1994. Terminology

4、and conventions. The text of the CECC specification has been approved as suitable for publication as a British Standard without deviation. Some terminology and certain conventions are not identical with those used in British Standards; attention is drawn especially to the following. The comma has be

5、en used as a decimal marker. In British Standards it is currently practice to use a full point on the baseline as the decimal marker. Cross-references. The British Standard which implements CECC00100 is BS9000 “General requirements for a system for electronic components of assessed quality” Part2 “S

6、pecification for national implementation of CECC basic rules and rules of procedure”. The Technical Committee has reviewed the provisions of IEC147 to which reference is made in the text, and has decided that they are acceptable for use in conjunction with this standard. A related British Standard f

7、or IEC147 is BS9300 “Semiconductor devices of assessed quality: generic data and methods of test”. Scope. This standard lists the ratings, characteristics and inspection requirements which shall be included as mandatory requirements in accordance with BSCECC90300 in any detail specification for thes

8、e devices. Detail specification layout. The front page layout of detail specifications released to BSCECC family or blank detail specifications will be in accordance with BS9000 Circular Letter No.15. A British Standard does not purport to include all the necessary provisions of a contract. Users of

9、 British Standards are responsible for their correct application. Compliance with a British Standard does not of itself confer immunity from legal obligations. International Standards Corresponding British Standards CECC 90000:1982 BS CECC 90000:1982 Harmonized system of quality assessment for elect

10、ronic components. Generic specification: Monolithic integrated circuits (Identical) CECC 90300:1985 BS CECC 90300:1985 Harmonized system of quality assessment for electronic components. Sectional specification: Interface monolithic integrated circuits (Identical) Summary of pages This document compr

11、ises a front cover, an inside front cover, pages i and ii, theCECC title page, pages ii to iv, pages 1 to 10 and abackcover. This standard has been updated (see copyright date) and may have had amendments incorporated. This will be indicated in the amendment table on the inside front cover.BSCECC903

12、02:1986 ii BSI 10-1999 Contents Page Foreword iii 1 Front page 1 2 Ratings (Limiting values) 3 3 Recommended conditions of use and associated characteristics 3 4 Test conditions and inspection requirements 5BSCECC90302:1986 BSI 10-1999 iii Foreword The CENELEC Electronic Components Committee (CECC)

13、is composed of those member countries of the European Committee for Electrotechnical Standardization (CENELEC) who wish to take part in a harmonized System for electronic components of assessed quality. The object of the System is to facilitate international trade by the harmonization of the specifi

14、cations and quality assessment procedures for electronic components, and by the grant of an internationally recognized Mark, or Certificate, of Conformity. The components produced under the System are thereby accepted by all member countries without further testing. This document has been formally a

15、pproved by the CECC, and has been prepared for those countries taking part in the System who wish to issue national harmonized specifications for INTEGRATED VOLTAGE COMPARATORS. It should be read in conjunction with the current regulations for the CECC System. At the date of printing of this documen

16、t the member countries of the CECC are Austria, Belgium, Denmark, Finland, France, Germany, Ireland, Italy, the Netherlands, Norway, Portugal, Spain, Sweden, Switzerland, and the UnitedKingdom. Preface This blank detail specification (BDS) was prepared by CECCWG9 “Integrated circuits”. It is based,

17、wherever possible, on the Publications of the International Electrotechnical Commission and in particular on IEC147: Essential ratings and characteristics of semiconductor devices and general principles of measuring methods. The text of this BDS was circulated to the CECC for voting in the document

18、indicated below and ratified by the President of the CECC for printing as a CECC specification. It is recognized that the layout proposed cannot be applied to all detail specifications based on this document. For instance, it may be preferable to indicate the limiting values in the form of a table w

19、hen several similar devices appear in the same detail specification. In accordance with the decision of the CECC Management Committee this specification is published initially in English and French. The German text will follow as soon as it has been prepared. Document Date of Voting Report on the Vo

20、ting CECC(Secretariat) 1573 October 1984 CECC(Secretariat) 1679iv blankBSCECC90302:1986 BSI 10-1999 1 1 Front page The front page of the DS shall be laid out as shown on the following page. The numbers between square brackets correspond to the following indications which should be given: Identificat

21、ion of the DS and of the component: 1 The name of the National Standards Organization under whose authority the DS is published and, if applicable, the organization from whom the DS is available. 2 The CECC Symbol and the CECC number allotted to the DS by the CECC General Secretariat. 3 The number a

22、nd issue number of the CECC generic or sectional specification as relevant; also national reference if different. 4 If different from the CECC number, the national number of the DS, date of issue and any further information required by the national system, together with any amendment numbers. 5 Type

23、 number, a short description of the type by: function (for example voltage comparator with strobe) number of independent circuits per package number and kind of inputs and outputs material and type of construction (silicon, monolithic, multichip, bipolar, MOS) performance, for example high output po

24、wer, high speed, low power consumption electrostatic sensitivity (where applicable). 6 Information on typical construction (where applicable) For 5 and 6 the text to be given in the DS should be suitable for an entry in CECC00200 (QPL) and CECC00300 (Library List). 7 An outline drawing with main dim

25、ensions which are of importance for interchangeability, and/or reference to the appropriate national or international document for outlines. Alternatively, this drawing may be given in an appendix to the DS. 8 Quality assessment level(s) 9 Reference data giving information on the most important prop

26、erties of the component, which allow comparison between the various component types intended for the same, or for similar, applications. Identification of the component and supplementary information: Description of the materials for the package (for example, glass, ceramic, metal, plastic) and infor

27、mation relating to the mounting (welding, soldering), lead material and finish. Inside the sketch of the package, the terminal connections to the inputs, outputs or other important points of the circuit shall be identified. This can be shown by a functional block diagram. Description of the numberin

28、g of the terminals with the identification of pin number1. Marking on the device in accordance with the GS (see2.5 of CECC90000).BSCECC90302:1986 2 BSI 10-1999 Layout for front page of detail specificationBSCECC90302:1986 BSI 10-1999 3 2 Ratings (Limiting values) (Not for inspection purposes) Those

29、apply over the operating temperature range, unless otherwise stated (see SS90300). 2.1 Maximum (and where appropriate minimum) value of voltage between the reference terminal and each other terminal. 2.2 Any other limiting value(s) of voltage between any specified terminals as appropriate. 3 Recomme

30、nded conditions of use and associated characteristics (Not for inspection purposes) The following characteristics shall apply over the full ambient operating temperature range unless otherwise specified. Where the stated performance of the circuit varies over the ambient operating temperature range

31、the values of the input and output voltages and their associated currents shall be stated at25 C and at the extremes of the operating temperature range. Where it is necessary to use external elements to ensure stable operation of the comparator, the values of the characteristics specified refer to t

32、he comparator with such elements connected. 2.3 Maximum continuous output current I O 2.4 Maximum continuous internal power dissipation with reference to a derating curve or factor related to the reference point temperature or ambient temperature P D 2.5 Common mode and differential mode input volta

33、ges V IC , V ID 2.6 Maximum and minimum ambient or reference point operating temperature T amb 2.7 Maximum and minimum storage temperature T stg 2.8 Any specific mechanical or environmental ratings peculiar to the device 2.9 Any interdependence of limiting conditions 2.10Maximum value of output shor

34、t-circuit current and duration, where appropriate I OS , t OS Characteristic Symbol Method (See SS 90300 4.1) General characteristics Power supply currents I S A01 Input characteristics High level input voltage (strobe input, where appropriate) V IH D13 Low level input voltage (strobe input, where a

35、ppropriate) V IL D13 High level input current (strobe input, where appropriate) I IH D13 Low level input current (strobe input, where appropriate) I IL D13 Input impedance (where appropriate) Z I A02 Input off-set voltage (where appropriate) V IO under consideration Input off-set current (where appr

36、opriate) I IO I02 Input bias current I IB I02 Input off-set voltage temperature coefficient (where appropriate) ! VIO under consideration Output characteristics High level output voltage V OH D12 Low level output voltage V OL D12BSCECC90302:1986 4 BSI 10-1999 High level output current (where appropr

37、iate) I OH D12 Low level output current (where appropriate) I OL D12 Off-state (Z state) output current (where appropriate) I OZ D12 Output short circuit current (where appropriate) I OS D15 Output impedance (where appropriate) Z o A03 Transfer characteristics Differential mode voltage amplification

38、 (where appropriate) A VD under consideration Strobe propagation time for L level to H level output transition (whereappropriate) t PLH D05, D06 or D14 Strobe propagation time for H level to L level output transition (whereappropriate) t PHL D05, D06 or D14 Strobe propagation time for L level to Z s

39、tate output transition (whereappropriate) t PLZ D05, D06 or D14 Strobe propagation time for H level to Z state output transition (whereappropriate) t PHZ D05, D06 or D14 Strobe propagation time for Z state to L level output transition (whereappropriate) t PZL D05, D06 or D14 Strobe propagation time

40、for Z state to H level output transition (whereappropriate) t PZH D05, D06 or D14 Output L level to H level transition time (where appropriate) t TLH D07 or D08 Output H level to L level transition time (where appropriate) t THL D07 or D08 Output L level to Z state transition time (where appropriate

41、) t TLZ D07 or D08 Output H level to Z state transition time (where appropriate) t THZ D07 or D08 Output Z state to L level transition time (where appropriate) t TZL D07 or D08 Output Z state to H level transition time (where appropriate) t TZH D07 or D08 Delay time (where appropriate) t d A14 Rise

42、time (where appropriate) t r A14 Fall time (where appropriate) t f A14 Total response time (where appropriate) t tot A14 Common mode input voltage range V IC I01 Common mode input triggering voltage (where appropriate) V ICT I01 Differential mode input overload recovery time (where appropriate) t or

43、d I03 Common mode input overload recovery time (where appropriate) t orc I03 Differential input voltage range V ID I04 Differential input threshold voltage (where appropriate) V IDT I06 Common mode rejection ratio (where appropriate) k CMR under consideration Supply voltages rejection ratio (where a

44、ppropriate) k SVR under consideration Characteristic Symbol Method (See SS 90300 4.1)BSCECC90302:1986 BSI 10-1999 5 4 Test conditions and inspection requirements See 3.6 of CECC 90000 with the following special requirements: The values and exact test conditions to be used shall be specified as requi

45、red in the detail specification relevant to a given type, in line with the indications given in CECC90300 for the relevant test. External elements necessary to ensure stable operation shall be specified and shall be connected for all electrical tests. Unless otherwise specified, all clause numbers r

46、efer to CECC90000. All the measurement method references are to 4.1 of CECC90300. Examination or test D ND Conditions of test Limits to be specified Group A Inspection Sub-Group A2 Verification of the function at 25 C ND Input offset voltage (where appropriate) Method I-07 See relevant DS V IOA Diff

47、erential mode voltage amplification (where appropriate) Method I-05 See relevant DS A VDB Differential input threshold voltage (where appropriate) Method I-06 See relevant DS V IDTA , V IDTB Sub-Group A3 Static characteristics at25 C ND (1) Main characteristics Power supply current(s) Method A-01 Se

48、e relevant DS I SA High level input voltage (where appropriate) Method D-13 See relevant DS V IHB Low level input voltage (where appropriate) Method D-13 See relevant DS V ILA High level input current (where appropriate) Method D-13 See relevant DS I IHA Low level input current (where appropriate) M

49、ethod D-13 See relevant DS I ILA High level output voltage Method D-12 See relevant DS V OHB Low level output voltage Method D-12 See relevant DS V OLABSCECC90302:1986 6 BSI 10-1999 Examination or test D ND Conditions of test Limits to be specified Sub-Group A3 High level output current (where appropriate) Method D-12 See relevant DS I OHA , I OHB Low level output current (where appropriate) Method D-12 See relevant DS I OLA , I OLB Off state (Z state) output current (wh