BS EN 190101-1990 Specification for harmonized system of quality assessment for electronic components - Family specification digital integrated TTL circuits series 54 64 74 84《电子元器.pdf

1、BRITISH STANDARD BS EN 190101:1994 Incorporating Amendment Nos. 1 and 2 Specification for Harmonized system of quality assessment for electronic components Family specification Digital integrated TTL circuits Series 54, 64, 74, 84 The European Standard EN 190101:1994 has the status of a British Stan

2、dardBSEN190101:1994 BSI 12-1999 ISBN 0 580 35961 1 Amendments issued since publication Amd. No. Date of issue Comments 8115 February 1994 8378 September 1994 Indicated by a sideline in the marginBSEN190101:1994 BSI 12-1999 i Contents Page National foreword ii Foreword 2 Foreword iii Text of CECC 901

3、01 2BSEN190101:1994 ii BSI 12-1999 National foreword This British Standard has been prepared under the direction of the Electronic Components Standards Policy Committee. It is identical with CENELEC Electronic Components Committee CECC 90101:1988 “Harmonized system of quality assessment for electron

4、ic components. Family specification: Digital integrated TTL circuits: Series 54, 64, 74, 84”. This standard is a harmonized specification within the CECC System. BSCECC90101:1980 remains valid for existing qualification approvals until further notice. In 1994 the CENELEC Electronic Components Commit

5、tee (CECC) accepted CECC 90101:1988 with Amendment 1 as European Standard EN 190101:1994. Cross-references. The British Standard which implements CECC 00100 is BS9000 General requirements for a system for electronic components of assessed quality Part 2:1983 Specification for national implementation

6、 of CECC basic rules and rules of procedures. The Technical Committee has reviewed the provisions of IEC 747, IEC 748 and IEC 749, to which reference is made in the text, and has decided that they are acceptable for use in conjunction with this standard. Scope. This standard lists the ratings, chara

7、cteristics and inspection requirements which shall be included as mandatory requirements in accordance with BS CECC 90100 in any detail specification for these devices. Detail specification layout. The page 1 of detail specifications released to BS CECC family or blank detail specification will be i

8、n accordance with BS 9000 Circular Letter No. 15. A British Standard does not purport to include all the necessary provisions of a contract. Users of British Standards are responsible for their correct application. Compliance with a British Standard does not of itself confer immunity from legal obli

9、gations. International Standards a Corresponding British Standards IEC 68-2-30:1980 BS 2011 Environmental testing Part 2.1Db:1981 Test Db and guidance: Damp heat, cyclic (12 + 12 hour cycle) (Identical) CECC 90000:1985 BS CECC 90000:1985 Harmonized system of quality assessment for electronic compone

10、nts. Generic specification: Monolithic integrated circuits (Identical) CECC 90100:1986 BS CECC 90100:1986 Harmonized system of quality assessment for electronic components: Sectional specification: Digital monolithic integrated circuits (Identical) a Undated in text. Summary of pages This document c

11、omprises a front cover, an inside front cover, pages i and ii, theEN title page, page 2, theCECC title page, pages ii to iv, pages 1 to 6 and abackcover. This standard has been updated (see copyright date) and may have had amendments incorporated. This will be indicated in the amendment table on the

12、 inside front cover.EUROPEAN STANDARD NORME EUROPENNE EUROPISCHE NORM EN 190101 May 1994 UDC Supersedes CECC 90101 Issue 2:1988 Descriptors: Quality, electronic components, digital integrated TTL circuits English version Family Specification: Digital Integrated TTL Circuits Series 54, 64, 74, 84 Spc

13、ification de famille: Circuits intgrs digitaux TTL Sries 54, 64, 74, 84 Familienspezifikation: Digitale integrierte TTL-Schaltungen Serien 54, 64, 74, 84 This European Standard was approved by the CENELEC Electronic Components Committee (CECC) on 30 April 1994. CENELEC members are bound to comply wi

14、th CEN/CENELEC Internal Regulations which stipulate the conditions for giving this European Standard the status of a national standard without any alteration. Up-to-date lists and bibliographical references concerning such national standards may be obtained on application to the General Secretariat

15、of the CECC or to any CENELEC member. This European Standard exists in three official versions (English, French, German). A version in any other language made by translation under the responsibility of a CENELEC member into its own language and notified to the CECC General Secretariat has the same s

16、tatus as the official versions. CENELEC members are the national electrotechnical committees of Austria, Belgium, Denmark, Finland, France, Germany, Greece, Iceland, Ireland, Italy, Luxembourg, Netherlands, Norway, Portugal, Spain, Sweden, Switzerland, and United Kingdom. The membership of the CECC

17、is identical, with the exception of the national electrotechnical committees of Greece, Iceland and Luxembourg. CECC European Committee for Electrotechnical Standardization Comit Europen de Normalisation Electrotechnique Europisches Komitee fr Elektrotechnische Normung Central Secretariat: rue de St

18、assart 35, B-1050 Brussels 1994 Copyright reserved to CENELEC members Ref. No. EN 190101:1994 EEN190101:1994 BSI 12-1999 2 Foreword The CENELEC Electronic Components Committee (CECC) is composed of those member countries of the European Committee for Electrotechnical Standardization (CENELEC) who wi

19、sh to take part in a harmonized System for electronic components of assessed quality. The object of the System is to facilitate international trade by the harmonization of the specifications and quality assessment procedures for electronic components, and by the grant of an internationally recognize

20、d Mark, or Certificate, of Conformity. The components produced under the System are thereby acceptable in all member countries without further testing. This European Standard was prepared by CECCWG 9, “Integrated Circuits”. The text of the draft based on document CECC90101 Issue 2:1988 (with A1) was

21、 submitted to the formal vote for conversion to a European Standard; together with the voting report, circulated as document CECC(Secretariat)3534 it was approved by CECC as EN 190101 on30April1994. The following dates were fixed: latest date of announcementofthe EN atnational level (doa) 1994-09-01

22、 latest date of publication ofanidentical national standard a (dop) 1995-03-01 latest date of withdrawal ofconflicting national standards a (dow)1996-03-01 a National Standard (excluding National implementation of IECQ Specifications)EN190101:1994 ii BSI 12-1999 Contents Page Foreword iii 1 Limiting

23、 conditions of use for the family 2 2 Recommended operating conditions and associated characteristics for the family 2 3 Test methods and procedures 3 4 Inspection requirements 6 Figure 1 Diagram for switching parameters 3 Figure 2 Signal waveform at the input of the component under test 3EN190101:1

24、994 BSI 12-1999 iii Foreword The CENELEC Electronic Components Committee (CECC) is composed of those member countries of the European Committee for Electrotechnical Standardization (CENELEC) who wish to take part in a harmonized System for electronic components of assessed quality. The object of the

25、 System is to facilitate international trade by the harmonization of the specifications and quality assessment procedures for electronic components, and by the grant of an internationally recognized Mark, or Certificate, of Conformity. The components produced under the System are thereby accepted by

26、 all member countries without further testing. This specification has been formally approved by the CECC, and has been prepared for those countries taking part in the System who wish to issue national harmonized specifications for TTL STANDARD DIGITAL INTEGRATED CIRCUITS. It should be read in conjun

27、ction with the current regulations for the CECC System. Preface This Family Specification was prepared by CECC WG9 “INTEGRATED CIRCUITS”. It is based, wherever possible, on the Publications of the International Electrotechnical Commission and in particular on IEC 747: Semiconductor devices: Discrete

28、 devices and integrated circuits, IEC 748: Semiconductor devices: Integrated circuits, IEC 749: Semiconductor devices: Mechanical and climatic test methods. It contains general information on TTL Standard digital integrated circuits and defines the common characteristics for this family of integrate

29、d circuits. Together with the device type detail specification (DS) of a component usually prepared nationally, this family specification forms a complete detail specification. The text of this second Issue consists of the text of CECC 90101 Issue 1 (1979) amended in accordance with the ratified new

30、 material introduced by the following document. In accordance with the decision of the CECC Management Committee this specification is published initially in French and English. The German text will follow as soon as it has been prepared. Effective date This second Issue of CECC 90101 shall become e

31、ffective for all new qualification approvals on 15 june 1988. Issue 1 will continue to remain effective to cover all past approvals. Document Date of Voting Report on the Voting CECC(Secretariat)2095 July 1987 CECC(Secretariat)2163iv blankEN190101:1994 BSI 12-1999 1EN190101:1994 2 BSI 12-1999 1 Limi

32、ting conditions of use for the family (Not for inspection purpose) 1.1 Maximum continuous supply voltage 1.2 Maximum input voltages 1.2.1 Max. input voltage 1.2.2 Max. input voltage between multiple emitter transistor inputs V II : + 5,5 V 1.3 Minimum and maximum operating ambient temperatures 1.4 M

33、inimum and maximum storage temperatures 2 Recommended operating conditions and associated characteristics for the family (Not for inspection purpose) (See also relevant DS) These conditions apply to the total operating temperature range, unless otherwise prescribed. 2.1 Positive supply voltage 2.2 M

34、ost negative low level input voltage at an input current I IK= 12 mA V IKB : 1,5 V 2.3 Minimum low level input voltage V ILB : 0 V 2.4 Maximum low level input voltage V ILA : 0,8 V 2.5 Minimum high level input voltage V IHB : 2 V 2.6 Maximum high level input voltage V IHA : 5,5 V 2.7 Most positive l

35、ow level output voltage at an output current of 1,6 mA the higher fanout (unless otherwise prescribed in the DS) V OLA : 0,4 V 2.8 Most negative high level output voltage at an output current of 40 4A the higher fanout V OHB : 2,4 V 2.9 Most positive high level output voltage 2.10 DC noise margin at

36、 low level (V ILA V OLA ) V NL : 0,4 V V CC : 0,5 V + 7,0 V V I : 0,5 V + 5,5 V T amb ( C) 54 64 74 84 min. 55 40 0 25 max. + 125 + 85 + 70 + 85 T stg :65 C min. (unless otherwise specified in the DS) + 150 C max. V CC : 4,5 to 5,5 V (54) 4,75 to 5,25 V (64, 74, 84) V OHA : 5,5 V (54) 5,25 V (64, 74

37、, 84) EN190101:1994 BSI 12-1999 3 2.11 DC noise margin at high level (V OHB V IHB ) V NH : 0,4 V 3 Test methods and procedures 3.1 Dynamic characteristics Unless otherwise prescribed in the relevant DS, the following dynamic measurement conditions are applicable. 3.1.1 General diagram Measurements o

38、f dynamic characteristics are performed in accordance with the general diagram of Figure 1. 3.1.2 Pulse generator and driving circuit The following conditions shall be met: output impedance of pulse generator: 50 7 10 % impedance of the driving circuit cable from the generator, including the test eq

39、uipment: 50 7 10 % Signal applied to the inputs of the component under test (see Figure 2). Low level input voltage: 0 V 0,1 V High level input voltage: 3 V 0,2 V Inputs (according to the test to be performed, see relevant DS) Z L= Load circuit: according to the output configuration givenin the DS,

40、the load circuit diagramA,B or C shown below (see3.1.4)is applicable. NOTE 1The inductances of the connections and of the components used, and the impedance of the continuous sources shall be so low as to make the error negligible. NOTE 2One or more pulse generators may be used according to the meas

41、urement to be performed. Figure 1 Diagram for switching parameters Figure 2 Signal waveform at the input of the component under testEN190101:1994 4 BSI 12-1999 Rise time of the input signal: t r= 7 ns 1 ns (measured from 10 % to 90 % of the step amplitude) Fall time of the input signal: t f= 7 ns 1

42、ns (measured from 90 % to 10 % of the step amplitude) Pulse width: t W= 0,5 4s Pulse repetition frequency: u 1 MHz 3.1.3 Component under test load circuit: (see 3.1.4) untested input(s) of the component under test are biased according to the characteristics to be tested (see DS) power supply V CC= 5

43、 V for multiple devices the inputs of circuit(s) not under test shall be left unconnected reference point for time measurements shall be taken at the voltage of 1,5 V 3.1.4 Load circuit in accordance with Figure 1 (see 3.1.1) capacitances and resistances include probe and jig capacitance and resista

44、nce the DS prescribes the load circuit(s) A Load circuit for totem pole outputs B Load circuit for open-collector outputs Diodes: 1 N 3064 or 1 N 916 (or equivalent) R Land C Lare prescribed in the DS. Standard outputs Buffers outputs No active load circuit is specified for this output configuration

45、 R 1(7) C 1(pF) 400 15 110 15 NOTER 1and C 1may be different from values given in the above table. In this case see DS.EN190101:1994 BSI 12-1999 5 C Load circuit for three-state outputs3.2 Conditions for the electrical endurance tests See SS/4.2.2. Unless otherwise specified in the relevant DS, the

46、inputs are biased for the highest I CC . Maximum output loading capability is applied (I OHor I OLaccording to high or low level conditions). If the temperature limits of the device are exceeded, the DS shall prescribe the relevant test conditions (seeSS/4.2). Standard outputs Buffer outputs PARAMET

47、ER S 1 S 2 R L (7) C L (pF) R L (7) C L (pF) t PHL C C 400 50 110 50 t PLH C C 400 50 110 50 t PZL C O 400 50 110 50 O: Open t PZH O C 400 50 110 50 C: Closed t PLZ C C 400 5 110 5 t PHZ C C 400 5 110 5 NOTER Land C Lvalues may be different from the values given above. In this case see DS.EN190101:1

48、994 6 BSI 12-1999 4 Inspection requirements See 3.6 of CECC 90000 with the following special requirements: Examination or test D ND Conditions of test Limits to be specified Group A Inspection Sub-Group A5 Dynamic characteristics at 25 C See FS/3.1 ND See FS/3.1 and relevant DS See relevant DS Group

49、 B Inspection Sub-Group B5 Electrical endurance 168 h See GS/note 11 See SS/4.2 ND T amb= 125 C See SS/4.2.2 and FS/3.2 End point tests: See GS/note 10 Electrical tests: Sub-Groups A2 and A3 As for Sub-Groups A2 and A3 As for Sub-Groups A2 and A3 Group C Inspection Sub-Group C8 Electrical endurance 2 000 h See SS/4.2 ND T amb= 125 C See SS/4.2.2 and FS/3.2 End point tests: See GS/note 10 Electrical tests: Sub-Groups A2 and A3 As for Sub-Groups A2 and A3 As for Sub-G