BS EN 190107-1987 Specification for harmonized system of quality assessment for electronic components - Family specification - TTL FAST digital integrated circuits series 54 F 74 F.pdf

1、BRITISH STANDARD BS EN 190107:1994 Incorporating Amendment Nos.1 and2 Specification for Harmonized system ofquality assessment for electronic components Familyspecification TTL FAST digital integrated circuits Series54F,74F The European Standard EN190107:1994 has the status of a British StandardBSEN

2、190107:1994 BSI 10-1999 ISBN 0 580 35611 6 Amendments issued since publication Amd. No. Date of issue Comments 8119 February 1994 8371 September 1994 Indicated by a sideline in the marginBSEN190107:1994 BSI 10-1999 i Contents Page National foreword ii Foreword 2 Foreword ii Text of CECC190107 1BSEN1

3、90107:1994 ii BSI 10-1999 National foreword This British Standard has been prepared under the direction of the Electronic Components Standards Committee. It is identical with CENELEC Electronic Components Committee (CECC)90107:1987 “Harmonized system of quality assessment for electronic components.

4、Family specification: TTL FAST digital integrated circuits.” In 1994 the CENELEC Electronic Components Committee (CECC) accepted CECC90107:1987 with Amendment1 as European Standard EN190107:1994. This standard is a harmonized specification within the CECC System. This standard supersedes BS CECC9010

5、7:1984 which is withdrawn. Terminology and conventions. The text of the CECC specification has been approved as suitable for publication as a British Standard without deviation. Some terminology and certain conventions are not identical with those used in British Standards; attention is drawn especi

6、ally to the following. The comma has been used as a decimal marker. In British Standards it is current practice to use a full point on the baseline as the decimal marker. Cross-references. The British Standard which implements CECC00100 is BS9000 “General requirements for a system for electronic com

7、ponents of assessed quality” Part2:1983 “Specification for national implementation of CECC basic rules and rules of procedure”. The Technical Committee has reviewed the provisions of IEC747, IEC748 and IEC749 to which reference is made in the text, and has decided that they are acceptable for use in

8、 conjunction with this standard. Scope. This standard lists the ratings, characteristics and inspection requirements which shall be included as mandatory requirements in accordance with BS CECC90100 in any detail specification for these devices. Detail specification layout. The front page layout of

9、detail specifications released to BS CECC family or blank detail specifications will be in accordance with BS9000 Circular Letter No.15. A British Standard does not purport to include all the necessary provisions of a contract. Users of British Standards are responsible for their correct application

10、. Compliance with a British Standard does not of itself confer immunity from legal obligations. International Standards a Corresponding British Standards IEC68-2-30:1980 BS2011 Basic environmental testing procedures Part2.1Db:1981 Test Db and guidance. Damp heat cyclic(12+12hour cycle) (Identical) C

11、ECC90000:1985 BS CECC90000:1985 Harmonized system of quality assessment for electronic components. Generic specification: monolithic integrated circuits (Identical) CECC90100:1986 BS CECC90100:1986 Harmonized system of quality assessment for electronic components. Sectional specification: digital mo

12、nolithic integrated circuits (Identical) a Undated in text. Summary of pages This document comprises a front cover, an inside front cover, pagesi andii, theEN title page, page2, the CECC title page, page ii, pages 1 to6 and aback cover. This standard has been updated (see copyright date) and may hav

13、e had amendments incorporated. This will be indicated in the amendment table on the inside front cover.EUROPEAN STANDARD NORME EUROPENNE EUROPISCHE NORM EN190107 May 1994 UDC Supersedes CECC90107 Issue2:1987 Descriptors: Quality, electronic components, TTL FAST digital integrated circuits English ve

14、rsion Family Specification: TTL FAST Digital Integrated Circuits Series54F,74F Spcification de famille: Circuits intgrs logiques TTL FAST Sries54F,74F Familienspezifikation: Digitale integrierte TTL FAST-Schaltungen Serien54F,74F This European Standard was approved by the CENELEC Electronic Componen

15、ts Committee (CECC) on 30 April 1994. CENELEC members are bound to comply with CEN/CENELEC Internal Regulations which stipulate the conditions for giving this European Standard the status of a national standard without any alteration. Up-to-date lists and bibliographical references concerning such n

16、ational standards may be obtained on application to the General Secretariat of the CECC or to any CENELEC member. This European Standard exists in three official versions (English, French, German). A version in any other language made by translation under the responsibility of a CENELEC member into

17、its own language and notified to the CECC General Secretariat has the same status as the official versions. CENELEC members are the national electrotechnical committees of Austria, Belgium, Denmark, Finland, France, Germany, Greece, Iceland, Ireland, Italy, Luxembourg, Netherlands, Norway, Portugal,

18、 Spain, Sweden, Switzerland, and UnitedKingdom. The membership of the CECC is identical, with the exception of the national electrotechnical committees of Greece, Iceland and Luxembourg. CECC European Committee for Electrotechnical Standardization Comit Europen de Normalisation Electrotechnique Euro

19、pisches Komitee fr Elektrotechnische Normung Central Secretariat: rue de Stassart 35, B-1050 Brussels 1994 Copyright reserved to CENELEC members Ref.No.EN190107:1994EEN190107:1994 BSI 10-1999 2 Foreword The CENELEC Electronic Components Committee (CECC) is composed of those member countries of the E

20、uropean Committee for Electrotechnical Standardization (CENELEC) who wish to take part in a harmonized System for electronic components of assessed quality. The object of the System is to facilitate international trade by the harmonization of the specifications and quality assessment procedures for

21、electronic components, and by the grant of an internationally recognized Mark, or Certificate, of Conformity. The components produced under the System are thereby acceptable in all member countries without further testing. This European Standard was prepared by CECCWG9, “Integrated Circuits”. The te

22、xt of the draft based on document CECC90107 Issue2:1987 (withA1) was submittedto the formal vote for conversion to aEuropeanStandard; together with the votingreport, circulated as document CECC(Secretariat)3537 it was approved by CECC as EN190107 on30April1994. The following dates were fixed: Conten

23、ts Page Foreword 2 1 Limiting conditions of use for the family 2 2 Recommended operating conditions and associated characteristics for the family 2 3 Test methods and procedures 3 4 Inspection requirements 6 Figure 1 Diagram for switching parameters 4 Figure 2 Signal waveform at the input of the com

24、ponent under test 4 latest date of announcement of the EN at national level (doa) 1994-09-01 latest date of publication ofan identical national standard a (dop) 1995-03-01 latest date of withdrawal ofconflicting national standards a (dow) 1996-03-01 a National Standard (excluding National implementa

25、tion of IECQ Specifications)EN190107:1994 ii BSI 10-1999 Foreword The CENELEC Electronic Components Committee (CECC) is composed of those member countries of the European Committee for Electrotechnical Standardization (CENELEC) who wish to take part in a harmonized System for electronic components o

26、f assessed quality. The object of the System is to facilitate international trade by the harmonization of the specifications and quality assessment procedures for electronic components, and by the grant of an internationally recognized Mark, or Certificate, of Conformity. The components produced und

27、er the System are thereby accepted by all member countries without further testing. This specification has been formally approved by the CECC, and has been prepared for those countries taking part in the System who wish to issue national harmonized specifications for TTL FAST DIGITAL INTEGRATED CIRC

28、UITS. It should be read in conjunction with the current regulations for the CECC System. At the date of printing of this specification the member countries of the CECC are Austria, Belgium, Denmark, Finland, France, Germany, Ireland, Italy, the Netherlands, Norway, Portugal, Spain, Sweden, Switzerla

29、nd, and the UnitedKingdom. Preface This Family Detail Specification was prepared by CECC WG9 “Integrated Circuits”. It is based, wherever possible, on the Publications of the International Electrotechnical Commission and in particular on IEC747: Semiconductor devices: Discrete devices and integrated

30、 circuits, IEC748: Semiconductor devices:Integrated circuits, IEC749: Semiconductor devices: Mechanical and climatic test methods. It contains general information on TTL FAST digital integrated circuits and defines the common characteristics for this family of integrated circuits. Together with the

31、device type detail specification (DS) of a component usually prepared nationally, this family detail specification forms a complete detail specification. The text of this second Issue consists of the text of CECC90107 Issue1 (1984) amended in accordance with the ratified new material introduced by t

32、he following document. In accordance with the decision of the CECC Management Committee this specification is published initially in French and English. The German text will follow as soon as it has been prepared. Effective date This second Issue of CECC90107 shall become effective for all new quali

33、fication approvals on1 April1987. Issue1 will continue to remain effective to cover all past approvals. Document Date of Voting Report on the Voting CECC (Secretariat) 1969 September 1986 CECC (Secretariat)2011EN190107:1994 BSI 10-1999 1EN190107:1994 2 BSI 10-1999 1 Limiting conditions of use for th

34、e family (Not for inspection purposes) 1.1 Maximum continuous supply voltage 1.2 Maximum input voltage 1.2.1 Max. input voltage 1.3 Minimum and maximum operating ambient temperatures 1.4 Minimum and maximum storage temperatures 2 Recommended operating conditions and associated characteristics for th

35、e family (Not for inspection purposes) (See also relevant DS) These conditions apply to the total operating temperature range, unless otherwise prescribed. 2.1 Positive supply voltage V CC :4,5 to5,5V 2.2 Most negative low level input voltage at an input current I lK =18mA V IKB :1,2V 2.3 Minimum lo

36、w level input voltage V ILB :0V 2.4 Maximum low level input voltage V ILA :0,8V 2.5 Minimum high level input voltage V IHB :2V 2.6 Maximum high level input voltage 2.7 Load factors 2.7.1 Unit load current 1) At low level voltage:1,6mA 2) At high level voltage:40A V CC : 0,5V +7,0V V I : 0,5V (See DS

37、) +7,0V T amb ( C) 54F 74F min. max. 55 +125 0 +70 T stg : 65 C min. (unless otherwise specified in the DS) +150 C max. V IHA : 5,5V (for inputs which are I/O ports) 7,0V (all others) EN190107:1994 BSI 10-1999 3 2.7.2 Input load factor (fan-in) 2.7.3 Output loading capability (fan-out) 2.8 Most posi

38、tive low level output voltage at an output current of1,6mA the higher output loading capability (unless otherwise prescribed in the DS) 2.9 Most negative high level output voltage at an output current of40A the higher output loading capability 2.10 Moat positive high level output voltage V OHA :5,5V

39、 2.11 DC noise margin at low level (V ILA V OLA ) 2.12 DC noise margin at high level (V OHB V IHB ) 3 Test methods and procedures 3.1 Dynamic characteristic Unless otherwise prescribed in the relevant DS, the following dynamic measurement condition are applicable. 3.1.1 General diagram Measurement o

40、f dynamic characteristics are performed in accordance with the general diagram of Figure 1. 1) At low level input voltage (see DS for the relevant input) 2) At high level input voltage 1) At low level output voltage (see DS for the relevant output) 2) At high level output voltage V OLA : 0,5V 0,55V

41、(buffer outputs) V OHB : 2,5 V (standard outputs) 2,4 V (buffer outputs) 2 V (bus driver outputs) V NL : 0,3V 0,25V (buffer and bus driver outputs) V NH : 0,5 V (standard outputs) 0,4 V (buffer outputs) 0 V (bus driver outputs) EN190107:1994 4 BSI 10-1999 3.1.2 Pulse generator and driving circuit Th

42、e following conditions shall be met: output impedance of pulse generator:507 10% impedance of the driving circuit cable from the generator, including the test equipment:507 10% Signal applied to the inputs of the component under test (see Figure 2). Low level input voltage:0V 0,1V High level input v

43、oltage:3V 0,2V Rise time of the input signal: t r =2,5ns 0.2ns (measured from10% to90% of the step amplitude) Fall time of the input signal: t f =2,5ns 0,2ns (measured from90% to10% of the step amplitude) Pulse width: t w =0.5s Pulse repetition frequency:u1MHz 3.1.3 Component under test load circuit

44、: (see3.1.4) unused input(s) of the component under test are biased according to the characteristics to be tested (seeDS) input (according to the test to be performed, see relevant DS) Z L= Load circuit: according to the output configuration given in the DS, theload circuit diagram A, B or Cshown be

45、low (see 3.1.4) is applicable. NOTE 1The inductances of the connections and of the components used, and the impedance of the continuous sources shall be so low as to make the error negligible. NOTE 2One or more pulse generators can be used according to the measurement to be performed. Figure 1 Diagr

46、am for switching parameters Figure 2 Signal waveform at the input of the component under testEN190107:1994 BSI 10-1999 5 power supply V CC =4,5V to5,5V for multiple devices the inputs of circuit(s) not under test shall be connected to V IH reference point for time measurements shell be taken at the

47、voltage of1,5V 3.1.4 Load circuit in accordance with Figure 1 (see3.1.1) the capacitor and the resistors include probe and jig capacitance and resistance the DS prescribes the load circuit(s) A Load circuit for totem pole outputs B Load circuit for open-collector outputs Not applicable to FAST Famil

48、y C Load circuit for three-state outputs 3.2 Conditions for the electrical endurance tests See SS/4.2.2. Unless otherwise specified in the relevant DS, the inputs are biased for the highest I CC . Maximum output loading capability is applied (I OHor I OLaccording to high or low level conditions). If

49、 the temperature limits of the device are exceeded, the DS shall prescribe the relevant test conditions (seeSS/4.2). 3.3 Conditions for transient energy rating test See GS/4.5.9. Number of cycles of operation:5discharges both directions NOTER 1and C 1values can be different from the values given above. In this case see DS. Parameter S t PHL O t PLH O t PZL C t PZH O O: Open t PLZ C C: Closed t PHZ O NOTER 1 , R 2and C 1values can be different from the values given abov