BS EN 60424-3-2016 Ferrite cores Guidelines on the limits of surface irregularities ETD-cores EER-cores EC-cores and E-cores《铁氧体磁芯 表面缺陷限值指南 ETD芯、EER芯、EC芯和E芯》.pdf

1、BSI Standards PublicationFerrite cores Guidelines on the limits of surface irregularitiesPart 3: ETD-cores, EER-cores, EC-cores and E-coresBS EN 60424-3:2016National forewordThis British Standard is the UK implementation of EN 60424-3:2016. It isidentical to IEC 60424-3:2015. It supersedes BS EN 604

2、24-3:1999 which iswithdrawn.The UK participation in its preparation was entrusted to TechnicalCommittee EPL/51, Transformers, inductors, magnetic components and ferrite materials.A list of organizations represented on this committee can be obtained onrequest to its secretary.This publication does no

3、t purport to include all the necessary provisions ofa contract. Users are responsible for its correct application. The British Standards Institution 2016.Published by BSI Standards Limited 2016ISBN 978 0 580 82413 5ICS 29.100.10Compliance with a British Standard cannot confer immunity fromlegal obli

4、gations.This British Standard was published under the authority of theStandards Policy and Strategy Committee on 31 March 2016.Amendments/corrigenda issued since publicationDate Text affectedBRITISH STANDARDBS EN 60424-3:2016EUROPEAN STANDARD NORME EUROPENNE EUROPISCHE NORM EN 60424-3 February 2016

5、ICS 29.100.10 Supersedes EN 60424-3:1999 English Version Ferrite cores - Guidelines on the limits of surface irregularities - Part 3: ETD-cores, EER-cores, EC-cores and E-cores (IEC 60424-3:2015) Noyaux ferrites - Lignes directrices relatives aux limites des irrgularits de surface - Partie 3: Noyaux

6、 ETD, EER, EC et E (IEC 60424-3:2015) Ferritkerne - Leitfaden fr Grenzwerte von sichtbaren Beschdigungen der Kernoberflche - Teil 3: ETD-Kerne, EER-Kerne, EC-Kerne und E-Kerne (IEC 60424-3:2015) This European Standard was approved by CENELEC on 2015-11-26. CENELEC members are bound to comply with th

7、e CEN/CENELEC Internal Regulations which stipulate the conditions for giving this European Standard the status of a national standard without any alteration. Up-to-date lists and bibliographical references concerning such national standards may be obtained on application to the CEN-CENELEC Managemen

8、t Centre or to any CENELEC member. This European Standard exists in three official versions (English, French, German). A version in any other language made by translation under the responsibility of a CENELEC member into its own language and notified to the CEN-CENELEC Management Centre has the same

9、 status as the official versions. CENELEC members are the national electrotechnical committees of Austria, Belgium, Bulgaria, Croatia, Cyprus, the Czech Republic, Denmark, Estonia, Finland, Former Yugoslav Republic of Macedonia, France, Germany, Greece, Hungary, Iceland, Ireland, Italy, Latvia, Lith

10、uania, Luxembourg, Malta, the Netherlands, Norway, Poland, Portugal, Romania, Slovakia, Slovenia, Spain, Sweden, Switzerland, Turkey and the United Kingdom. European Committee for Electrotechnical Standardization Comit Europen de Normalisation Electrotechnique Europisches Komitee fr Elektrotechnisch

11、e Normung CEN-CENELEC Management Centre: Avenue Marnix 17, B-1000 Brussels 2016 CENELEC All rights of exploitation in any form and by any means reserved worldwide for CENELEC Members. Ref. No. EN 60424-3:2016 E BS EN 60424-3:2016EN 60424-3:2016 2 European foreword The text of document 51/1099/FDIS,

12、future edition 2 of IEC 60424-3, prepared by IEC/TC 51 “Magnetic components and ferrite materials“ was submitted to the IEC-CENELEC parallel vote and approved by CENELEC as EN 60424-3:2016. The following dates are fixed: latest date by which the document has to be implemented at national level by pu

13、blication of an identical national standard or by endorsement (dop) 2016-08-26 latest date by which the national standards conflicting with the document have to be withdrawn (dow) 2018-11-26 This document supersedes EN 60424-3:1999. Attention is drawn to the possibility that some of the elements of

14、this document may be the subject of patent rights. CENELEC and/or CEN shall not be held responsible for identifying any or all such patent rights. Endorsement notice The text of the International Standard IEC 60424-3:2015 was approved by CENELEC as a European Standard without any modification. BS EN

15、 60424-3:2016EN 60424-3:2016 3 Annex ZA (normative) Normative references to international publications with their corresponding European publications The following documents, in whole or in part, are normatively referenced in this document and are indispensable for its application. For dated referen

16、ces, only the edition cited applies. For undated references, the latest edition of the referenced document (including any amendments) applies. NOTE 1 When an International Publication has been modified by common modifications, indicated by (mod), the relevant EN/HD applies. NOTE 2 Up-to-date informa

17、tion on the latest versions of the European Standards listed in this annex is available here: www.cenelec.eu Publication Year Title EN/HD Year IEC 60424-1 2015 Ferrite cores - Guidelines on the limits of surface irregularities - Part 1: General Specification EN 60424-1 1)- IEC 60647 - Dimensions for

18、 magnetic oxide cores intended for use in power supplies (EC-cores) - - IEC 61185 - Ferrite cores (ETD-cores) intended for use in power supply applications - Dimensions EN 61185 - IEC 62317-7 - Ferrite cores - Dimensions - Part 7: EER-cores EN 62317-7 - IEC 62317-8 - Ferrite cores - Dimensions - Par

19、t 8: E-cores EN 62317-8 - 1)To be published. BS EN 60424-3:2016 2 IEC 60424-3:2015 IEC 2015 CONTENTS FOREWORD . 3 1 Scope 5 2 Normative references 5 3 Terms and definitions 5 4 Limits of surface irregularities 6 4.1 Chips and ragged edges . 6 4.1.1 General . 6 4.1.2 Chips and ragged edges on the mat

20、ing surfaces 6 4.1.3 Chips and ragged edges on other surfaces 6 4.2 Cracks 11 4.3 Flash 11 4.4 Pull-outs . 11 4.5 Crystallites 14 4.6 Pores 14 Figure 1 Chip location for ETD-cores, EER-cores and EC-cores 9 Figure 2 Chip location for E-cores 9 Figure 3 Cracks and pull-out location for ETD-cores, EER-

21、cores and EC-cores . 12 Figure 4 Cracks and pull-out location for E-cores . 13 Figure 5 Crystallites location for ETD-cores, EER-cores and EC-cores 14 Figure 6 Crystallites location for E-cores 14 Figure 7 Pores location for ETD-cores, EER-cores and EC-cores 15 Figure 8 Pores location for E-cores 15

22、 Table 1 Allowable areas of chips for ETD-cores in mm2. 6 Table 2 Allowable areas of chips for EER-cores in mm2. 7 Table 3 Allowable areas of chips for EC-cores in mm2. 7 Table 4 Allowable areas of chips for E-cores in mm2. 8 Table 5 Area and length reference for visual inspection . 10 Table 6 Limit

23、s for cracks 13 BS EN 60424-3:2016IEC 60424-3:2015 IEC 2015 3 INTERNATIONAL ELECTROTECHNICAL COMMISSION _ FERRITE CORES GUIDELINES ON THE LIMITS OF SURFACE IRREGULARITIES Part 3: ETD-cores, EER-cores, EC-cores and E-cores FOREWORD 1) The International Electrotechnical Commission (IEC) is a worldwide

24、 organization for standardization comprising all national electrotechnical committees (IEC National Committees). The object of IEC is to promote international co-operation on all questions concerning standardization in the electrical and electronic fields. To this end and in addition to other activi

25、ties, IEC publishes International Standards, Technical Specifications, Technical Reports, Publicly Available Specifications (PAS) and Guides (hereafter referred to as “IEC Publication(s)”). Their preparation is entrusted to technical committees; any IEC National Committee interested in the subject d

26、ealt with may participate in this preparatory work. International, governmental and non-governmental organizations liaising with the IEC also participate in this preparation. IEC collaborates closely with the International Organization for Standardization (ISO) in accordance with conditions determin

27、ed by agreement between the two organizations. 2) The formal decisions or agreements of IEC on technical matters express, as nearly as possible, an international consensus of opinion on the relevant subjects since each technical committee has representation from all interested IEC National Committee

28、s. 3) IEC Publications have the form of recommendations for international use and are accepted by IEC National Committees in that sense. While all reasonable efforts are made to ensure that the technical content of IEC Publications is accurate, IEC cannot be held responsible for the way in which the

29、y are used or for any misinterpretation by any end user. 4) In order to promote international uniformity, IEC National Committees undertake to apply IEC Publications transparently to the maximum extent possible in their national and regional publications. Any divergence between any IEC Publication a

30、nd the corresponding national or regional publication shall be clearly indicated in the latter. 5) IEC itself does not provide any attestation of conformity. Independent certification bodies provide conformity assessment services and, in some areas, access to IEC marks of conformity. IEC is not resp

31、onsible for any services carried out by independent certification bodies. 6) All users should ensure that they have the latest edition of this publication. 7) No liability shall attach to IEC or its directors, employees, servants or agents including individual experts and members of its technical co

32、mmittees and IEC National Committees for any personal injury, property damage or other damage of any nature whatsoever, whether direct or indirect, or for costs (including legal fees) and expenses arising out of the publication, use of, or reliance upon, this IEC Publication or any other IEC Publica

33、tions. 8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is indispensable for the correct application of this publication. 9) Attention is drawn to the possibility that some of the elements of this IEC Publication may be the subject of pa

34、tent rights. IEC shall not be held responsible for identifying any or all such patent rights. International Standard IEC 60424-3 has been prepared IEC technical committee 51: Magnetic components and ferrite materials. This second edition cancels and replaces the first edition published in 1999. This

35、 edition constitutes a technical revision. This edition includes the following significant technical changes with respect to the previous edition: a) addition of allowable areas of chips for EC-cores in Table 3, b) addition of crystallites in 4.5 and pores in 4.6. BS EN 60424-3:2016 4 IEC 60424-3:20

36、15 IEC 2015 The text of this standard is based on the following documents: FDIS Report on voting 51/1099/FDIS 51/1114/RVD Full information on the voting for the approval of this standard can be found in the report on voting indicated in the above table. This publication has been drafted in accordanc

37、e with the ISO/IEC Directives, Part 2. A list of all parts in the IEC 60424 series, published under the general title Ferrite cores Guidelines on the limits of surface irregularities, can be found on the IEC website. Future standards in this series will carry the new general title as cited above. Ti

38、tles of existing standards in this series will be updated at the time of the next edition. The committee has decided that the contents of this publication will remain unchanged until the stability date indicated on the IEC website under “http:/webstore.iec.ch“ in the data related to the specific pub

39、lication. At this date, the publication will be reconfirmed, withdrawn, replaced by a revised edition, or amended. BS EN 60424-3:2016IEC 60424-3:2015 IEC 2015 5 FERRITE CORES GUIDELINES ON THE LIMITS OF SURFACE IRREGULARITIES Part 3: ETD-cores, EER-cores, EC-cores and E-cores 1 Scope This part of IE

40、C 60424 gives guidelines on allowable limits of surface irregularities applicable to ETD-cores, EER-cores, EC-cores and E-cores in accordance with the relevant general specification. This standard is a specification useful in the negotiations between ferrite core manufacturers and customers about su

41、rface irregularities. 2 Normative references The following documents, in whole or in part, are normatively referenced in this document and are indispensable for its application. For dated references, only the edition cited applies. For undated references, the latest edition of the referenced documen

42、t (including any amendments) applies. IEC 60424-11, Ferrite cores Guidelines on the limits of surface irregularities Part 1: General specification IEC 60647, Dimensions for magnetic oxide cores intended for use in power supplies (EC-cores) IEC 61185, Ferrite cores (ETD-cores) intended for use in pow

43、er supply applications Dimensions IEC 62317-7, Ferrite cores Dimensions Part 7: EER-cores IEC 62317-8, Ferrite cores Dimensions Part 8: E-cores 3 Terms and definitions For the purposes of this document, the following terms and definitions apply. 3.1 pore hole left on the surface of cores after sinte

44、ring and surface finishing 3.2 crystallite grain of abnormal size distinguishable on the surface, often with sparkling facets 1To be published. BS EN 60424-3:2016 6 IEC 60424-3:2015 IEC 2015 4 Limits of surface irregularities 4.1 Chips and ragged edges 4.1.1 General Chips and ragged edges are define

45、d in IEC 60424-1. 4.1.2 Chips and ragged edges on the mating surfaces The areas of the chips located on the mating surfaces (chip1 and chip1 irregularities of Figures 1 and 2) shall not exceed the following limits: the cumulative area of the chips shall be less than 6 % of the mating surface (whethe

46、r gapped or ungapped) of the centre leg; the total length of the ragged edges shall be less than 25 % of the perimeter of the relevant surface. 4.1.3 Chips and ragged edges on other surfaces The allowable areas of chips are doubled as compared to the limits for the mating surface (see Table 1 for ET

47、D-cores, Table 2 for EER-cores, Table 3 for EC-cores and Table 4 for E-cores). The rule for ragged edges is the same as for the mating surface. The allowable areas of chips for a given core are summarized in Tables 1, 2, 3 and 4. The core sizes given in Tables 1 and 2 correspond to the cores defined

48、 in IEC 61185, IEC 62317-7, IEC 60647 and IEC 62317-8. Table 1 Allowable areas of chips for ETD-cores in mm2Core size Mating surfaces Other surfaces ETD19 2,5 5 ETD24 3,5 7 ETD29 4 8 ETD34 6 12,5 ETD39 8 15 ETD44 10 20 ETD49 12,5 25 ETD54 17,5 35 ETD59 25 45 BS EN 60424-3:2016IEC 60424-3:2015 IEC 20

49、15 7 Table 2 Allowable areas of chips for EER-cores in mm2Core size Mating surfaces Other surfaces EER25,5 2,5 5 EER28 4 8 EER28L 4 8 EER35 6 12,5 EER39 7 15 EER40 8 15 EER42 10 20 EER49 12.5 25 Table 3 Allowable areas of chips for EC-cores in mm2Core size Mating surfaces Other surfaces EC35 4 8 EC41 6 12,5 EC52 8 15 EC70 12,5 25 EC90 25 50 EC120 25 50 BS EN 60424-3:2016 8 IEC 60424-3:2015 IEC 2015 Table 4 Allowable are