ImageVerifierCode 换一换
格式:PDF , 页数:88 ,大小:736.56KB ,
资源ID:578048      下载积分:10000 积分
快捷下载
登录下载
邮箱/手机:
温馨提示:
快捷下载时,用户名和密码都是您填写的邮箱或者手机号,方便查询和重复下载(系统自动生成)。 如填写123,账号就是123,密码也是123。
特别说明:
请自助下载,系统不会自动发送文件的哦; 如果您已付费,想二次下载,请登录后访问:我的下载记录
支付方式: 支付宝扫码支付 微信扫码支付   
验证码:   换一换

加入VIP,免费下载
 

温馨提示:由于个人手机设置不同,如果发现不能下载,请复制以下地址【http://www.mydoc123.com/d-578048.html】到电脑端继续下载(重复下载不扣费)。

已注册用户请登录:
账号:
密码:
验证码:   换一换
  忘记密码?
三方登录: 微信登录  

下载须知

1: 本站所有资源如无特殊说明,都需要本地电脑安装OFFICE2007和PDF阅读器。
2: 试题试卷类文档,如果标题没有明确说明有答案则都视为没有答案,请知晓。
3: 文件的所有权益归上传用户所有。
4. 未经权益所有人同意不得将文件中的内容挪作商业或盈利用途。
5. 本站仅提供交流平台,并不能对任何下载内容负责。
6. 下载文件中如有侵权或不适当内容,请与我们联系,我们立即纠正。
7. 本站不保证下载资源的准确性、安全性和完整性, 同时也不承担用户因使用这些下载资源对自己和他人造成任何形式的伤害或损失。

版权提示 | 免责声明

本文(BS EN 62014-1-2004 Electronic design automation libraries - Input Output buffer information specifications (IBIS version 3 2)《电子设计自动化程序库 输入 输出缓存信息规范(IBIS 3 2版)》.pdf)为本站会员(deputyduring120)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

BS EN 62014-1-2004 Electronic design automation libraries - Input Output buffer information specifications (IBIS version 3 2)《电子设计自动化程序库 输入 输出缓存信息规范(IBIS 3 2版)》.pdf

1、BRITISH STANDARD BS EN 62014-1:2002 Electronic design automation libraries Part 1: Input/Output buffer information specifications (IBIS version 3.2) (IEC 62014-1:2001) The European Standard EN 62014-1:2002 has the status of a British Standard ICS 25.040 BS EN 62014-1:2002 This British Standard was p

2、ublished under the authority of the Standards Policy and Strategy Committee on 24 February 2004 BSI 24 February 2004 ISBN 0 580 43463 X National foreword This British Standard is the official English language version of EN 62014-1:2002. It is identical with IEC 62014-1:2001. The UK participation in

3、its preparation was entrusted to Technical Committee GEL/93, Design automation, which has the responsibility to: A list of organizations represented on this committee can be obtained on request to its secretary. Cross-references The British Standards which implement international or European publica

4、tions referred to in this document may be found in the BSI Catalogue under the section entitled “International Standards Correspondence Index”, or by using the “Search” facility of the BSI Electronic Catalogue or of British Standards Online. This publication does not purport to include all the neces

5、sary provisions of a contract. Users are responsible for its correct application. Compliance with a British Standard does not of itself confer immunity from legal obligations. aid enquirers to understand the text; present to the responsible international/European committee any enquiries on the inter

6、pretation, or proposals for change, and keep the UK interests informed; monitor related international and European developments and promulgate them in the UK. Summary of pages This document comprises a front cover, an inside front cover, the EN title page, pages 2 to 84, an inside back cover and a b

7、ack cover. The BSI copyright notice displayed in this document indicates when the document was last issued. Amendments issued since publication Amd. No. Date CommentsEUROPEAN STANDARD EN 62014-1 NORME EUROPENNE EUROPISCHE NORM January 2002 CENELEC European Committee for Electrotechnical Standardizat

8、ion Comit Europen de Normalisation Electrotechnique Europisches Komitee fr Elektrotechnische Normung Central Secretariat: rue de Stassart 35, B - 1050 Brussels 2002 CENELEC - All rights of exploitation in any form and by any means reserved worldwide for CENELEC members. Ref. No. EN 62014-1:2002 E IC

9、S 25.040 English version Electronic design automation libraries Part 1: Input/Output buffer information specifications (IBIS version 3.2) (IEC 62014-1:2001) Automatisation de la conception - Bibliothques Partie 1: Spcifications des informations en entre/sortie des circuits tampon (IBIS version 3.2)

10、(CEI 62014-1:2001) Bibliotheken fr die Entwurfsautomatisierung Teil 1: Spezifikation von Eigenschaften von I/O Buffern (IBIS Version 3.2) (IEC 62014-1:2001) This European Standard was approved by CENELEC on 2001-07-01. CENELEC members are bound to comply with the CEN/CENELEC Internal Regulations whi

11、ch stipulate the conditions for giving this European Standard the status of a national standard without any alteration. Up-to-date lists and bibliographical references concerning such national standards may be obtained on application to the Central Secretariat or to any CENELEC member. This European

12、 Standard exists in two official versions (English, French). A version in any other language made by translation under the responsibility of a CENELEC member into its own language and notified to the Central Secretariat has the same status as the official versions. CENELEC members are the national e

13、lectrotechnical committees of Austria, Belgium, Czech Republic, Denmark, Finland, France, Germany, Greece, Iceland, Ireland, Italy, Luxembourg, Malta, Netherlands, Norway, Portugal, Spain, Sweden, Switzerland and United Kingdom.EN 62014-1:2002 - 2 - Foreword The text of document 93/129/FDIS, future

14、edition 1 of IEC 62014-1, prepared by IEC TC 93, Design automation, was submitted to the IEC-CENELEC parallel vote and was approved by CENELEC as EN 62014-1 on 2001-07-01. The following dates were fixed: latest date by which the EN has to be implemented at national level by publication of an identic

15、al national standard or by endorsement (dop) 2002-07-01 latest date by which the national standards conflicting with the EN have to be withdrawn (dow) 2004-07-01 _ Endorsement notice The text of the International Standard IEC 62014-1:2001 was approved by CENELEC as a European Standard without any mo

16、dification. _ Page2 EN620141:2002 2 -410261 CEI:)E(1002 CONTENTS Page ROFEROWD .3 INTRODUCTION.4 Scope and object.6 Section 1: General introduction .7 Section 2: Statement of intent8 Section 3: General syntax rules and guidelines. 10 Section 4: File header information. 12 Section 5: Component descri

17、ption 14 Section 6: Model statement 23 Section 6a: Add submodel description . 49 Section 7: Package modeling . 59 Section 8: Electrical board description. 71 Section 9: Notes on data derivation method . 79 Page3 EN620141:2002-41026 1 CEI:1002 5 INTRODUCTION Background of IBIS IBIS was first develope

18、d at Intel Corporation and has been expanded to its current form (Version 3.2) through the cooperative efforts of additional analog simulator vendors, computer manufacturers, IC vendors, commercial users, and universities. In May 1993, the group formed itself into the IBIS Open Forum, an open, volun

19、tary, cooperative association. In March 1995, the group affiliated with the EIA (now the Electronic Industries Alliance) as the EIA IBIS Open Forum. The Forum has been and continues to meet via teleconference approximately every third week to propose updates to the IBIS standard, to help new partici

20、pants, and to advance the standard. The Forum also meets in person about four times a year to exchange ideas and conduct official business. Most of the Forum activities are handled through e-mail discussions using a reflector “ibiseda.org.“ A users group reflector “ibis-userseda.org“ is also support

21、ed for users of IBIS. One can get more information on subscribing to the reflectors and to other ongoing Forum activities through the official web page: “http:/www.eigroup.org/ibis/ibis.htm“. The process of making changes and improvements to IBIS is through a “BIRD“ (Buffer Issue Resolution Document

22、) process involving approval by the Forum voting members. Over the years the Forum has grown to over thirty voting members (requiring a modest yearly fee for administrative support), but the Forum also maintains an open, public communications policy and welcomes all interested participants regardles

23、s of membership status. Through official EIA and ANSI (American National Standards Institution) public letter ballot processes, IBIS Version 2.1 was ratified as ANSI/EIA-656 in December 13, 1995. Version 1.1 of IBIS focused on TTL and CMOS logic components. Although never officially ratified as a na

24、tional standard, IBIS Version 1.1 served as a basis for advances in Version 2.1 to increase its accuracy and number of device types that are supported. Version 2.1 contains the following advances: Controlled slew rate devices ECL and PECL technologies Independent control over power rails so RS232 an

25、d other types of devices with multiple rails can be modeled Differential drivers and devices Open-drain I/O devices such as open drain and open collector devices Expanded package model definitions to include coupling between pins. The Forum also voluntarily funded a parser development activity throu

26、gh the sale of source code licenses of “ibischk2“ and has made executables of the parser code freely and publicly available to enable IBIS model checking. Industrial advances associated with new semiconductor topologies, package design and measurement needs kept the Forum busy proposing new capabili

27、ties, eventually leading to IBIS Version 3.2. Again through official EIA and ANSI public letter ballot processes, IBIS Version 3.2 was ratified as ANSI/EIA-656-A on September 21, 1999. Its advances include the following: Series and series switch models Multi-stage driver capability for phased stages

28、 Page4 EN620141:2002 6 -410261 CEI:)E(1002 Submodel capability supporting dynamic clamps and bus hold functions for active and dynamic terminations More specification values for overshoot and pulse immunity Uncoupled packages with sections and forks Uncoupled advanced packages known as electrical bo

29、ard descriptions with sections, forks and on- board components. IBIS Version 3.2 has complied with an original Forum objective that all subsequent versions of IBIS be backward compatible with previous versions. The Forum funded through voluntary source code license purchases the corresponding “ibisc

30、hk3“ parser and has made its executables freely available. The IBIS Standard has achieved wide spread national and international support and recognition as indicated by over 40 semiconductor vendors providing IBIS models freely from their web sites. Many more IBIS models and libraries are available

31、from commercial vendors and directly through IC vendor sales organizations. While IBIS models can be of value in all phases of a design and analysis process, they are particularly suitable for printed circuit board design tools used in conjunction with the corresponding physical and mechanical data

32、bases describing the boards. Future IBIS Directions Technology continues to advance, forcing more stringent electrical requirements and newer ways of doing things. The Forum is keeping up with such advances. However, its strategy has shifted. Up to now the Forum has been adding to the existing fixed

33、-format IBIS document. Such a process is slow and subject to unexpected interactions with existing capability. The newer approach is to create a compatible macro-language that allows more rapid reconfiguration and response to changing needs. While the Forum has not yet ratified any of these approach

34、es, it is pursuing these projects: A macro-language that fully supports IBIS Version 3.2 but can also support more advanced features and nodal component structures A separate Connector Specification with advanced coupled stages to support key component used to connect printed circuit boards (and pos

35、sibly be used for more advanced package models) Some further advances in specification details beyond IBIS Version 3.2. These projects advance the capability of IBIS in a manner that supports the existing IBIS Version 3.2 functionality, but also allows for much more rapid implementation of new requi

36、rements. References ANSI/EIA-656: IBIS Version 2.1 released December 13, 1995 ANSI/EIA-656-A: IBIS Version 3.2 released September 21, 1999 Page5 EN620141:2002-41026 1 CEI:1002 7 ELECTRONIC DESIGN AUTOMATION LIBRARIES Part 1: Input/output buffer information specifications ( IBIS version 3.2 ) Scope a

37、nd object This standard gives specifications for electronic behavioral of digital integrated circuit input/ output analog characteristics. It specifies a consistent software-parsable format for essential behavioral information. The goal of this standard is to support all simulators of all degrees of

38、 sophistication. Page6 EN620141:2002 - 8 - 62014-1 IEC:2001(E) | Section 1 | | G E N E R A L I N T R O D U C T I O N | |= |= | | This section gives a general overview of the remainder of this document. | | Sections 2 and 3 contain general information about the IBIS versions and | the general rules a

39、nd guidelines. Several progressions of IBIS documents | are referenced in Section 2 and in the discussion below. They are IBIS | Version 1.1 (ratified August, 1993), IBIS Version 2.1 (ratified as | ANSI/EIA-656 in December, 1995), and IBIS Version 3.2 (this document | ratified in August, 1999). | |

40、The functionality of IBIS follows in Sections 4 through 8. Sections 4 | through 6 describe the format of the core functionality of IBIS Version 1.1 | and the extensions in later versions. The data in these sections are | contained in .ibs files. Section 7 describes the package model format of | IBIS

41、 Version 2.1 and a subsequent extension. Package models can be | formatted within .ibs files or can be formatted (along with the Section 4 | file header keywords) as .pkg files. Section 8 contains the Electrical | Board Description format of IBIS Version 3.2. Along with Section 4 header | informatio

42、n, electrical board descriptions must be described in separate | .ebd files. | | Section 9 contains some notes regarding the extraction conditions and data | requirements for IBIS files. This section focuses on implementation | conditions based on measurement or simulation for gathering the IBIS | c

43、ompliant data. | |= Page7 EN620141:2002 |= | Section 2 | | S T A T E M E N T O F I N T E N T | |= |= | | In order to enable an industry standard method to electronically transport | IBIS Modeling Data between semiconductor vendors, simulation vendors, and | end customers, this template is proposed.

44、The intention of this template is | to specify a consistent format that can be parsed by software, allowing | simulation vendors to derive models compatible with their own products. | | One goal of this template is to represent the current state of IBIS data, | while allowing a growth path to more c

45、omplex models / methods (when deemed | appropriate). This would be accomplished by a revision of the base | template, and possibly the addition of new keywords or categories. | | Another goal of this template is to ensure that it is simple enough for | semiconductor vendors and customers to use and

46、modify, while ensuring that | it is rigid enough for simulation vendors to write reliable parsers. | | Finally, this template is meant to contain a complete description of the I/O | elements on an entire component. Consequently, several models will need to | be defined in each file, as well as a tab

47、le that equates the appropriate | buffer to the correct pin and signal name. | | Version 3.2 of this electronic template was finalized by an industry-wide | group of experts representing various companies and interests. Regular | “EIA IBIS Open Forum“ meetings were held to accomplish this task. | | Commitment to Backward Compatibility. Version 1.0 is the first valid IBIS | ASCII file format. It represents the minimum amount of I/O buffer | information required to create an accurate IBIS model of common CMOS and | bipolar I/O structures. F

copyright@ 2008-2019 麦多课文库(www.mydoc123.com)网站版权所有
备案/许可证编号:苏ICP备17064731号-1