BS IEC 62014-5-2015 Quality of Electronic and Software Intellectual Property Used in System and System on Chip (SoC) Designs《系统和片上系统 (SoC) 设计使用电子和软件知识产权的质量》.pdf

1、BSI Standards PublicationQuality of Electronic and Software Intellectual PropertyUsed in System and System on Chip (SoC) DesignsBS IEC 62014-5:2015National forewordThis British Standard is the UK implementation of IEC 62014-5:2015.The UK participation in its preparation was entrusted to TechnicalCom

2、mittee EPL/501, Electronic Assembly Technology.A list of organizations represented on this committee can be obtained onrequest to its secretary.This publication does not purport to include all the necessary provisions ofa contract. Users are responsible for its correct application. The British Stand

3、ards Institution 2015.Published by BSI Standards Limited 2015ISBN 978 0 580 89379 7ICS 25.040Compliance with a British Standard cannot confer immunity fromlegal obligations.This British Standard was published under the authority of theStandards Policy and Strategy Committee on 30 April 2015.Amendmen

4、ts/corrigenda issued since publicationDate Text affectedBRITISH STANDARDBS IEC 62014-5:2015IEC 62014-5 Edition 1.0 2015-03 INTERNATIONAL STANDARD Quality of Electronic and Software Intellectual Property Used in System and System on Chip (SoC) Designs INTERNATIONAL ELECTROTECHNICAL COMMISSION ICS 25.

5、040 ISBN 978-2-83222-386-4 Warning! Make sure that you obtained this publication from an authorized distributor. IEEE Std 1734-2011 Registered trademark of the International Electrotechnical Commission BS IEC 62014-5:2015Contents 1. Overview 1 1.1 Scope . 1 1.2 Purpose 1 1.3 Design environment. 2 1.

6、4 QIP-compliant enabled implementations. 2 1.5 Conventions used. 3 1.6 Use of color in this standard 6 1.7 Contents of this standard . 6 2. Normative references 7 3. Definitions, acronyms, and abbreviations 7 3.1 Definitions . 7 3.2 Acronyms and abbreviations . 8 4. Interoperability use model 8 4.1

7、Roles and responsibilities 9 4.2 IP exchange flows 9 5. QIP schema structures 10 5.1 QIP schema structure for golden XML 10 5.2 QIP schema structure for the answer XML . 14 5.3 Tooling requirements for operating on golden XML. 16 5.4 Relationship between golden XML and completed XML . 20 5.5 User ex

8、tensions 21 6. Compatibility with VSIA QIP 22 Annex A (informative) Bibliography . 24 Annex B (normative) Semantic consistency rules 25Annex C (informative) IEEE List of Participants .32viii Copyright 2011 IEEE. All rights reserved. Published by IEC under license from IEEE. 2011 IEEE. All rights res

9、erved. IEC 62014-5 IEEE Std 1734-2011iBS IEC 62014-5:2015Published by IEC under license from IEEE. 2011 IEEE. All rights reserved. IEC 62014-5 IEEE Std 1734-2011 iiBS IEC 62014-5:2015Published by IEC under license from IEEE. 2011 IEEE. All rights reserved. QUALITY OF ELECTRONIC AND SOFTWARE INTELLEC

10、TUAL PROPERTY USED IN SYSTEM AND SYSTEM ON CHIP (SOC) DESIGNS FOREWORD 1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising all national electrotechnical committees (IEC National Committees). The object of IEC is to promote international c

11、o-operation on all questions concerning standardization in the electrical and electronic fields. To this end and in addition to other activities, IEC publishes International Standards, Technical Specifications, Technical Reports, Publicly Available Specifications (PAS) and Guides (hereafter referred

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19、easonable efforts are made to ensure that the technical content of IEC/IEEE Publications is accurate, IEC or IEEE cannot be held responsible for the way in which they are used or for any misinterpretation by any end user. 4) In order to promote international uniformity, IEC National Committees under

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24、ance upon, this IEC/IEEE Publication or any other IEC or IEEE Publications. 8) Attention is drawn to the normative references cited in this publication. Use of the referenced publications is indispensable for the correct application of this publication. 9) Attention is drawn to the possibility that

25、implementation of this IEC/IEEE Publication may require use of material covered by patent rights. By publication of this standard, no position is taken with respect to the existence or validity of any patent rights in connection therewith. IEC or IEEE shall not be held responsible for identifying Es

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27、easonable or non-discriminatory. Users of this standard are expressly advised that determination of the validity of any patent rights, and the risk of infringement of such rights, is entirely their own responsibility. IEC 62014-5 IEEE Std 1734-2011iiiBS IEC 62014-5:2015Published by IEC under license

28、 from IEEE. 2011 IEEE. All rights reserved. International Standard IEC 62014-5/ IEEE Std 1734-2011 has been processed through IEC technical committee 91: Electronics assembly technology, under the IEC/IEEE Dual Logo Agreement. The text of this standard is based on the following documents: IEEE Std F

29、DIS Report on voting 1734 (2011) 91/1208/FDIS 91/1227/RVD Full information on the voting for the approval of this standard can be found in the report on voting indicated in the above table. The IEC Technical Committee and IEEE Technical Committee have decided that the contents of this publication wi

30、ll remain unchanged until the stability date indicated on the IEC web site under “http:/webstore.iec.ch“ in the data related to the specific publication. At this date, the publication will be reconfirmed, withdrawn, replaced by a revised edition, or amended. IEC 62014-5 IEEE Std 1734-2011 ivBS IEC 6

31、2014-5:2015IEEE Std 1734-2011 IEEE Standard for Quality of Electronic and Software Intellectual Property Used in System and System on Chip (SoC) Designs Sponsor Design Automation Standards Committee of the IEEE Computer Society Approved 16 June 2011 IEEE-SA Standards Board Published by IEC under lic

32、ense from IEEE. 2011 IEEE. All rights reserved. IEC 62014-5 IEEE Std 1734-2011vBS IEC 62014-5:2015This standard contains material originally published by the VSI Alliance and currently available in the public domain (http:/vsi.org/). Acknowledgment is made to the VSI Alliance, who developed the VSIA

33、-QIP v4.0 spreadsheet and macros, and the QIP Metric Users Guide Version 4.0 document from which some material in this standard was derived. Abstract: A standard XML format for representing electronic design intellectual property (IP) quality information, based on an information model for IP quality

34、 measurement, is defined. It includes a schema and the terms that are relevant for measuring IP quality, including the software that executes on the system. The schema and information model can be focused to represent particular categories of interest to IP users. In the context of this document, th

35、e term IP shall be used to mean electronic design intellectual property. Electronic design intellectual property is a term used in the electronic design community to refer to a reusable collection of design specifications that represent the behavior, properties, and/or representation of the design i

36、n various media. Keywords: AMS, analog and mixed signal, design environment, EDA, electronic design automation, electronic system level, ESL, IEEE 1734, implementation constraints, MEMS, microelectromechanical systems, QIP, Quality IP metrics, register transfer logic, RTL, SCRs, semantic consistency

37、 rules, use models, verification IP, VIP, XML design meta data, XML schema g120Verilog is a registered trademark of Cadence Design Systems, Inc. in the United States and/or other jurisdictions. W3C is a registered trademark of the World Wide Web Consortium (registered in numerous countries). Marks o

38、f W3C are registered and held by its host institutions: Massachusetts Institute of Technology (MIT), European Research Consortium for Information and Mathematics (ERCIM), and Keio University, Japan. Published by IEC under license from IEEE. 2011 IEEE. All rights reserved. IEC 62014-5 IEEE Std 1734-2

39、011 viBS IEC 62014-5:2015IEEE Introduction This introduction is not part of IEEE Std 1734-2011, IEEE Standard for Quality of Electronic and Software Intellectual Property Used in System and System on Chip (SoC) Designs. The purpose of this standard is to provide a unified view of quality measures fo

40、r electronic design intellectual property (IP) to facilitate the use and integration of IP used in electronic system design. These quality measures can be evaluated in the context of the end application to help determine suitability and plan mitigation measures for potential integration gaps. This c

41、an enable the continuous improvement of IP used for system design and verification by providing a mechanism for qualitative comparison between such IP. The standard IP quality measures and characteristic exchange format defined can be incorporated into a variety of electronic design automation (EDA)

42、 tools. The goal of this specification is to specify a quality standard metric that will account for the variances in designing, verifying and testing the IP, which will result in fair quality assessment, reducing the risk of schedule slip or mask spins due to faulty IP. The working group consisted

43、of electronic system, IP provider, semiconductor, and EDA companies, and used the VSI Alliance Quality IP (QIP) metric as a baseline for the metrics. The data specified by the standard is extensible in locations specified in the schema. This structure can be used as the basis of both manual and auto

44、matic methodologies. This standardization project provides electronic design and SoC engineers with a well-defined standard that meets their requirements in evaluating and validating IP and enables a step function increase in their productivity. This project also provides the EDA industry with a sta

45、ndard to which they can adhere and that they can support in order to deliver their solutions in this area. Notice to users Laws and regulations Users of these documents should consult all applicable laws and regulations. Compliance with the provisions of this standard does not imply compliance to an

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48、ing practices and methods. By making this document available for use and adoption by public authorities and private users, the IEEE does not waive any rights in copyright to this document. iv Copyright 2011 IEEE. All rights reserved. Published by IEC under license from IEEE. 2011 IEEE. All rights re

49、served. IEC 62014-5 IEEE Std 1734-2011viiBS IEC 62014-5:2015v Copyright 2011 IEEE. All rights reserved. Updating of IEEE documents Users of IEEE standards should be aware that these documents may be superseded at any time by the issuance of new editions or may be amended from time to time through the issuance of amendments, corrigenda, or errata. An official IEEE document at any point in time consists of the current edition of the document together with any amendments, corrigenda, or errata then in effect. In order to determine whether a given do