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本文(CEPT T CD 02-04 E-1986 Engineering Requirements for a Synchronous Digital Multiplexer for Use with Non Envelope Structured Data《与无封套结构数据一起使用的的同步数字复用器工程要求》.pdf)为本站会员(orderah291)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

CEPT T CD 02-04 E-1986 Engineering Requirements for a Synchronous Digital Multiplexer for Use with Non Envelope Structured Data《与无封套结构数据一起使用的的同步数字复用器工程要求》.pdf

1、CEPT T/CD*02-04*E b 232b414 0003523 9 Page 1 TCD02-04E Recommendation T/CD 02-04 (Odense 1986) ENGINEERING REQUIREMENTS FOR A SYNCHRONOUS DIGITAL MULTIPLEXER FOR USE WlTH NON ENVELOPE STRUCTURED DATA Recommendation proposed by Working T/WG 10 “Data communications” (CD) Text of the Recommendation ado

2、pted by the “Telecommtmications” Commission: “The Conference of European Post and Telecommunications Administrations, considering - that working group CD has studied under the auspices of Question CD 1 the harmonization of Data Circuit Terminating Equipment, recommends - that the attached specificat

3、ion of engineering requirements for a synchronous digital multiplexer for use with non envelope structured data as contained in Annex 1 to this Recommendation should be taken into account by all CEPT Administrations when the implementation of a relevant piece of equipment is being planned by Adminis

4、- trations.” a Administrations are free to stipulate additional requirements, and also which of the optional requirements, if any, are to be provided. Note 1. It should be noted that this Recommendation may be revised from time to time. Edition of April 15, 1987 , CEPT T/CD*02-04*E 6 23261134 000352

5、2 O W T/CD 02-04 E Page 2 Annex 1 SECIION I. PARAMETERS REQUIRED FOR INTERWORKING 1-1. 1-2. 1-3. 1-3.1. I-3,l. 1 , 1-3.1.2. 1-3.1.3. 1-3.1.4. 1-3.1.5. GROSS BIT RATE The aggregate bit stream shall have a gross bit rate of 64 kbit/s. TRIBUTARY CHANNEL BITRATES The following tributary channel bitrates

6、 are supported: - 2.4 kbit/s - 4.8 kbitls - 9.6 kbit/s - 19.2 kbit/s Other bitrates are not excluded. MULTIPLEX SCHEME The multiplex scheme is shown in Figure 1-1 (T/CD 02-04). The frame length is 640 bit. The frame duration is 10 ms. Tributary channel data is grouped in octets and appears in slots

7、A, through F,. Slots S, contain synchronisation octets. Slots T, contain service octets. 4 160 bits = 20 octets Figure 1-1 (T/CD 02-04). Multiplex scheme. Data Octets One frame contains 72 data octets. Thus the multiplex stream can support 24 channels of 2.4 kbit/s, or 12 channels of 4.8 kbit/s, or

8、6 channels of 9.6 kbit/s, or 3 channels of 19.2 kbit/s, or combinations thereof. The allocation of individual octets to a tributary channel is detailed below. 2.4 kbitls 2.4 kbit/s tributary channels employ 1 out of 24 data octets. A 2.4 kbit/s channel will thus be allocated to all slots with the sa

9、me identifier, i.e. identification letter and identification digit (e.g. Al). 4.8 kbitls 4.8 kbit/s tributary channels employ 1 out of 12 data octets. A 4.8 kbit/s channel will thus be allocated to all slots with the same identification letter in the range A-F and two different identification digits

10、 1 and 3 or 2 and 4 (e.g. B1 and B3). 9.6 kbitls 9.6 kbit/s tributary channels employ 1 out of 6 data octets. A 9.6 kbit/s channel will thus be allocated to all slots with the same identification letter in the range A-F and four different identification digits 1, 2, 3 and 4 (e.g. D1, D2, D3 and D4).

11、 19.2 kbitls 19.2 kbit/s tributary channels employ 1 out of 3 data octets. A 19.2 kbit/s channel will thus be allocated to slots with two different identification letters from the range A-F: A and D or B and E or C and F, and four different identification digits 1, 2, 3 and 4 (e.g. C1, FI, C2, F2, C

12、3, F3, C4 and F4). Other bitrates For other bitrates no allocation of octets to a tributary channel is specified. From the scheme in Figure 1 (T/CD 02-04) it can be derived that any bitrate n times 2.4 kbit/s where n is 1 through 24 can be supported. O r -. - Edition of April 15, 1987 CEPT T/CD*02-0

13、4*E 6 2326434 0003523 2 T/CD 02-04 E Page 3 1-3.2. Synchronisation Octets One frame contains 4 synchronisation octets. These contain xed bit patterns as follows: S1 = 27 = 00100111 S2 = 1B = 00011011 S3 = 05 = 00000101 s4 = 35 = 00110101 Note. Coding of the synchronisation octets is such that they d

14、o not overlap; Le. when in random data one of the synchronisation octets is simulated, no other simulation will occur for 125 ps being the nominal duration of one octet. 1-3.3. Service octets Use of these octets is to be defined. Possible applications are: - use for exchange of information between t

15、he multiplexers concerning tributary channel allocation, - transfer of status information 01.24 105-109 signalling or X.24 C-I signalling) per tributary channel; - justification. routing, maintenance etc.; 1-4. FRAME SYNCHRONISATION Frame synchronisation is obtained by the receiving multiplexer duri

16、ng normal operation. No interaction between multiplexers at both ends of the link is required for this purpose. Edition of April 15, 1987 CEPT T/CD*02-04*E b M 2326414 0003524 4 M T/CD 02-04 E Page 4 SECTION II. EQUIPMENT SPECIFICATION 11-1. SYSTEM LAYOUT The basic multiplexer consists of two differ

17、ent units, tributary channel units (TCUs) and multiplexing units (MUS). See Figure 1 (T/CD 02-04). Several units of each type constitute a physical multiplexer configura- tion. The minimum configuration is one MU and one TCU. Specific configurations may be tailored by Administrations depending on th

18、e application and can be changed when so required. Note. Other units may be specified in future. All units are connected via a bus in accordance with the CEPT BUS SPECIFICATION T/CD 02-06. Structure 2 of this specification is recommended. The basic function of each unit is to receive data from the e

19、xternal interface (tributary channel or aggregate channel), arrange these data into octets, apply these octets together with adequate address information to the bus and vice versa. There shall be no limitation to the possibility to transmit data via the bus to any other unit. The internal address op

20、tion of the structure 2 bus is used to identify physical channels in TCUs or logical channels in MUS. Address information is derived from instructions received from the maintenance system as described in chapter 11-5. BUS BUS BUS Figure 11-1 (T/CD 02-04). System layout. 11-2. TRIBUTARY CHANNEL UNIT

21、The tributary channel unit (TCU) may support one or more tributary channels. If the unit supports more than one tributary channel, the channel data rates may be: - identical - independent within the set 2.4-19.2 kbit/s - independent within a subset The TCU will collect data from the tributary channe

22、l interfaces, arrange these data into octets and apply these octets together with address information (destination address, consisting of unit address and internal address) to the bus with minimal delay. Data octets received from the bus will be buffered prior to being transferred to the tributary c

23、hannel interface in order to allow for the correction of system jitter. A maximum delay of 8 octets is recommended for rates until 9.6 kbitls. Buffer size for- 19.2 kbit/s is for further study. For 2.4 kbit/s a smaller buffer may be advisable. Channels (= bus internal addresses) are numbered with ev

24、en numbers starting with 2. Internal address O is reserved for maintenance purposes (ref. chapter 11-5.). Maintenance functions of the TCU are described in chapter 11-5. .- Edition of April IS, 1987 11-3. 11-3.1. 11-3.2. 11-3.2. T/CD 02-04 E Page 5 MULTIPLEXING U“ General The multiplexing unit (MU)

25、will support one 64 kbit/s channel. The MU will collect data octets from the incoming 64 kbit/s line, Synchronisation octets will be used for framing purposes as described in chapter 11-3.2. Service octets will be used for maintenance purposes as described in chapter 11-5. Data octets will be applie

26、d to the bus with minimal delay together with address information (destination address, consisting of unit address and internal address). Data octets received from the bus will be buffered prior to being transferred to the 64 kbit/s channel interface in order to allow for the correction of system ji

27、tter. Buffering may be employed on a per channel basis or via a common buffer for all channels. Recommended delay is between 5 and 15 ms. Logical channels (= bus internal addresses) are numbered with even numbers starting with 2. Internal address O is reserved for maintenance purposes (ref. chapter

28、11-5.). Allocations of time slots to logical channels is described in chapter 11-5. Maintenance functions of the MU are described in chapter 11-5. Timing functions of the MU are described in chapter 11-6. Frame alignment - The frame synchronisation method should be insensitive as far as possible to

29、bit errors, error bursts, and - When a slip occurs in the transmission equipment, a fast frame alignment recovery must be possible. . General requirements short bursts of AIS generated by transmission equipment. 11-3.2.2. Framtig method performance - The frame alignment recovery time after a slip, i

30、n the absence of bit errors and with random data in - A random error ratio of 1 in lop4 shall not cause any frame alignment recovery action. - When the unit loses synchronisation, e.g. due to the synchronisation pattern no longer being present in the incoming bit stream, the unit will enter the loss

31、 of synchronisation state after 50 ms (minimum) to 100 ms (maximum). all channels, should be less than 160 octets (2 frames) with 95% probability. 11-3.3. Consequent action in case of loss of synchronisation When the MU is in the loss of synchronisation state it should transmit to the bus at least 2

32、4 octets containing all logical ones in all logical channels that are active. After that, the MU will continue to send these octets or cease sending octets in logical channels completely. Indication of this state to the maintenance system is described in chapter 11-5. 11-4. INTERFACES Three differen

33、t interfaces may be identified in the multiplexer, i.e. the tributary channel interface, the 64 kbit/s channel interface and the bus interface. 11-4.1. Tributary channel interface Three different types of interface are envisaged. modem recommendation. DTE-DCE interface. 11-4.1.1. If the tributary ch

34、annel modem is integrated in the TCU, the interface will comply with the respective 11-4.1.2. If the tributary channel modem is not integrated in the TCU. the interface towards the modem is a “normal“ Edition of April 15, 1987 CEQT T/CD*02-04*E 8b 232b414 0003526 T/CD 02-04 E Page 6 The following ci

35、rcuits are considered to be essential: 102 (a, b, c) 103 Transmit Data to DCE 104 Receive Data from DCE 109 Received Line Signal Detector from DCE 113 Transmitter Signal Element Timing (DTE source) to DCE 115 Receiver Signal Element Timing (DCE source) from DCE 141 Local Loopback to DCE Electrical c

36、haracteristics may be V.28 or other, depending on the nature of the modem. simulates a DCE. Details of this interface are under study. The 64 kbit/s channel interface The interface towards the 64 kbit/s channel will be in accordance with CCITT Recommendation G.703 paragraph 1. Additionally interface

37、s according to CCITT Recommendations V.35 and/or V.36 may be required. 11-4.3. The bus interface The bus interface is in accordance with the CEPT BUS SPECIFICATION T/CD 02-06, structure 2 with some limitations: - The Central Controller will issue BUS REQUEST STROBES while polling all units present o

38、r poten- tially present in the system, When the polled unit responds via the BUS SEIZED line, the Central Controller will issue an ADDRESS STROBE, followed by an INTERNAL ADDRESS STROBE, followed by a DATA STROBE, followed by a bus release action. - Only write actions are envisaged. Thus the Central

39、 Controller will keep the WRITE line permanently in the active state. - The duration of a complete poll is equal to or greater than 1 ps. The following additional circuits are used: Name Abbreviation Direction UNIT ADDRESS UA7-UA0 to unit 256 kHz CLOCK 256 kHz to unit 19.2 kHz CLOCK 19.2 kHz to unit

40、 CLOCK SYNCHRONISATION cs from unit (MU only) The UNIT ADDRESS lines contain the 6 bit address of the unit (see chapter 11-9.). The 256 kHz CLOCK line contains a 256 kHz clock signal (see chapter 11-6.). The 19.2 kHz CLOCK line contains a 19.2 kHz clock signal (see chapter 11-6.). The CLOCK SYNCHRON

41、ISATION line contains a signal derived from the incoming 64 kbit/s signal. Transitions in this signal occur at time intervals which are multiples of 1/256 ms. Signal Ground(s) 11-4.1.3. If the DTE is interfaced directly to the multiplexer, a V.24/V.28 interface is required in which the multiplexer 1

42、1-4.2. 11-5. MAINTENANCE 11-5.1. General The maintenance of the multiplexer is performed under control of a maintenance system. This system is not described in this specification, which is limited to maintenance functions to be performed by multiplexers and multiplexer components. 11-5.2. Informatio

43、n transfer The maintenance system issues instructions to units anywhere in the network. Units answer these instruc- tions with responses. The maintenance system can enter the multiplexer network at one or various locations via a dedicated channel in a TCU, which operates at a fixed data rate of 2,40

44、0 bit/s. Messages containing instructions or responses flow via buses (internal address O) and 64 kbit/s multiplexer channels (service octets) from maintenance system entrance to units and vice versa. Details on the protocol between the maintenance system and the TCU at its entrance point and betwee

45、n MUS (link layer protocol), the routing of messages through the network (network layer protocol) and the coding of instructions and responses are described in Appendix I. Edition of April 15, 1987 CEPT T/CD*OZ-Oq*E 6 2326434 0003527 T = 11-5.3. 11-5.4. O 11-5.5. 11-6. 11-7. T/CD 02-04 E Page 7 Conf

46、iguration Control Each unit is provided by the maintenance system with information concerning the configuration. In the case of MUS, for each logical channel the following information is provided: - whether or not the channel is active, - number of first time slot, - data rate, - destination address

47、 (unit address + internal address). In the case of TCUs, for each physical channel the following information is provided: - whether or not the channel is active, - data rate, - destination address (unit address + internal address). Alarms Units may detect alarm situations in the unit itself or in as

48、sociated equipment. This information is transferred to the maintenance system in responses. In the case of MUS, alarms comprise: - loss of synchronisation, - loss of incoming signal. In the case of TCUs alarms comprise: - loss of incoming carrier (for each channel separately). Testing Units can be i

49、nstructed to establish test loops in the lines they control. Loop control may be via circuits 140-142 when available. Alternatively, when these circuits are not available, the unit wiil take over the responsibility of the loop originating DCE and generate and monitor patterns according to CCITT Recommendation V.54. Loop tests may be either simple point to point (tributary channel, 64 kbit/s channel with two modems) or tandem with addressing capability (more complex 64 kbit/s channels). Which loop is applicable is derived from the instruction the unit receives.

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