DLA DSCC-VID-V62 03645 REV A-2009 MICROCIRCUIT DIGITAL ADVANCED HIGH SPEED CMOS QUADRUPLE 2-INPUT POSITIVE NOR GATE MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE APPROVED A Update boilerplate paragraphs to current requirements. - PHN 09-02-25 Charles F. Saffle Prepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV REV STATUS OF PAGES PAGE 1 2 3 4 5 6 7 8 9 10 PMIC N/A PREPARED BY Charles F. Saffle DE

2、FENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO 43218-3990 Original date of drawing CHECKED BY Charles F. Saffle APPROVED BY Charles F. Saffle TITLE MICROCIRCUIT, DIGITAL, ADVANCED HIGH SPEED CMOS, QUADRUPLE 2-INPUT POSITIVE NOR GATE, MONOLITHIC SILICON SIZE A CODE IDENT. NO. 16236 DWG NO. V62/03645 YY

3、-MM-DD 03-07-29 REV A PAGE 1 OF 10 AMSC N/A 5962-V045-09 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03645 REV A PAGE 2 1. SCOPE 1.1 Scope. This drawing docume

4、nts the general requirements of a high performance quadruple 2-input positive NOR gate microcircuit, with an operating temperature range of -55C to +125C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes a

5、n administrative control number for identifying the item on the engineering documentation: V62/03645 - 01 X E Drawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s). Device type Generic Circuit function 01 74AHC02-EP Quadruple 2-input positive NO

6、R gate 1.2.2 Case outlines. The case outlines are as specified herein. Outline letter Number of pins JEDEC PUB 95 Package style X 14 JEDEC MO-153 Plastic small-outline 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacturer: Finish

7、designator Material A Hot solder dip B Tin-lead plate C Gold plate D Palladium E Gold flash palladium Z Other Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03645

8、 REV A PAGE 3 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) . -0.5 V to +7.0 V Input voltage range (VI). -0.5 V to +7.0 V 2/ Output voltage range (VO) . -0.5 V to VCC+ 0.5 V 2/ Input clamp current (IIK) (VIVCC) 20 mA Continuous output current (IO) (VO= 0 to VCC) 25 mA Continuous curren

9、t through VCCor GND. 50 mA Package thermal impedance (JA). 113C/W 3/ Maximum junction temperature (TJ) 150C Storage temperature range (TSTG). -65C to +150C 1.4 Recommended operating conditions. 4/ 5/ Supply voltage range (VCC) . 2.0 V to 5.5 V Minimum high level input voltage (VIH): VCC= 2.0 V 1.5 V

10、 VCC= 3.0 V 2.1 V VCC= 5.5 V 3.85 V Maximum low level input voltage (VIL): VCC= 2.0 V 0.5 V VCC= 3.0 V 0.9 V VCC= 5.5 V 1.65 V Input voltage range (VI). 0.0 V to 5.5 V Output voltage range (VO) . 0.0 V to VCCMaximum high level output current (IOH): VCC= 2.0 V -50 A VCC= 3.3 V 0.3 V. -4.0 mA VCC= 5.0

11、 V 0.5 V. -8.0 mA Maximum low level output current (IOL): VCC= 2.0 V 50 A VCC= 3.3 V 0.3 V. 4.0 mA VCC= 5.0 V 0.5 V. 8.0 mA Maximum input transition rise or fall rate (t/v): VCC= 3.3 V 0.3 V. 100 ns/V VCC= 5.0 V 0.5 V. 20 ns/V Operating free-air temperature range (TA). -55C to +125C 1/ Stresses beyo

12、nd those listed under “absolute maximum rating” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximu

13、m-rated conditions for extended periods may affect device reliability. 2/ The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 3/ The package thermal impedance is calculated in accordance with JESD 51-7. 4/ Use of this product beyond the manufact

14、urers design rules or stated parameters is done at the users risk. The manufacturer and/or distributor maintain no responsibility or liability for product used beyond the stated limits. 5/ All unused inputs of the device must be held at VCCor GND to ensure proper device operation. Provided by IHSNot

15、 for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03645 REV A PAGE 4 2. APPLICABLE DOCUMENTS JEDEC PUB 95 - Registered and Standard Outlines for Semiconductor Devices JESD 51-7 - High

16、 Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages (Applications for copies should be addressed to the Electronic Industries Alliance, 2500 Wilson Boulevard, Arlington, VA 22201-3834 or online at http:/www.jedec.org) 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently a

17、nd legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code, or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturers part number and with items A and C

18、 (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions ar

19、e as specified herein. 3.5 Diagrams. 3.5.1 Case outlines. The case outlines shall be as shown in 1.2.2 and figure 1. 3.5.2 Truth table. The truth table shall be as shown in figure 2. 3.5.3 Logic diagram. The logic diagram shall be as shown in figure 3. 3.5.4 Terminal connections. The terminal connec

20、tions shall be as shown in figure 4. 3.5.5 Timing waveforms and test circuit. The timing waveforms and test circuit shall be as shown in figure 5. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A C

21、ODE IDENT NO. 16236 DWG NO. V62/03645 REV A PAGE 5 TABLE I. Electrical performance characteristics. 1/ Limits Test Symbol Conditions VCCTemperature, TADevice type Min Max Unit 2.0 V 1.9 3.0 V 2.9 IOH= -50 A 4.5 V 25C, -55C to 125C 4.4 25C 2.58 IOH = -4 mA 3.0 V -55C to 125C 2.48 25C 3.94 High level

22、output voltage VOHIOH= -8 mA 4.5 V -55C to 125C 01 3.80 V 2.0 V 0.1 3.0 V 0.1 IOL= 50 A 4.5 V 25C, -55C to 125C 0.1 25C 0.36 IOL = 4 mA 3.0 V -55C to 125C 0.5 25C 0.36 Low level output voltage VOLIOL= 8 mA 4.5 V -55C to 125C 01 0.5 V 25C 01 0.1 Input current II VI = 5.5 V or GND 0.0 V to 5.5 V -55C

23、to 125C 1.0 A 25C 01 2.0 Quiescent supply current ICCVI= VCCor GND IO= 0 A 5.5 V -55C to 125C 20.0 A Input capacitance CIVI= VCCor GND 5.0 V 25C 01 10 pF Power dissipation capacitance CpdNo load f = 1 MHz 5.0 V 25C 01 15 TYP pF Quiet output, maximum dynamic VOLVOL(P)2/ 5.0 V 25C 01 0.8 V Quiet outpu

24、t, minimum dynamic VOLVOL(V)2/ 5.0 V 25C 01 -0.8 V Quiet output, minimum dynamic VOHVOH(V)2/ 5.0 V 25C 01 4.9 V High level dynamic input voltage VIH(D)2/ 5.0 V 25C 01 3.5 V Low level dynamic input voltage VIL(D)2/ CL= 50 pF 5.0 V 25C 01 1.5 V See footnote at end of table. Provided by IHSNot for Resa

25、leNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03645 REV A PAGE 6 TABLE I. Electrical performance characteristics - Continued. 1/ Limits Test Symbol Conditions VCCTemperature, TADevice type

26、 Min Max Unit 25C 7.9 3.0 V and 3.6 V -55C to 125C 1.0 9.5 25C 5.5 CL= 15 pF See figure 5 4.5 V and 5.5 V -55C to 125C 01 1.0 6.5 25C 11.4 3.0 V and 3.6 V -55C to 125C 1.0 13.0 25C 7.5 Propagation delay time, A or B to Y tPLH, tPHLCL= 50 pF See figure 5 4.5 V and 5.5 V -55C to 125C 01 1.0 8.5 ns 1/

27、Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over the specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In the absence of specifi

28、c parametric testing, product performance is assured by characterization and/or design. 2/ Characteristics are for surface-mount packages only. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE

29、 IDENT NO. 16236 DWG NO. V62/03645 REV A PAGE 7 Case X Dimensions Millimeters Inches Millimeters Inches Symbol Min Max Min Max Symbol Min Max Min Max A - 1.20 - .047 E 4.30 4.50 .169 .177 A1 0.05 0.15 .002 .006 E1 6.20 6.60 .244 .260 b 0.19 0.30 .007 .012 e 0.65 NOM .026 NOM c 0.15 NOM .006 NOM L 0.

30、50 0.75 .020 .030 D 4.90 5.10 .193 .201 NOTES: 1. This drawing is subject to change without notice. 2. Body dimensions do not include mold flash or protrusion not to exceed 0.15 mm. 3. Falls within JEDEC MO-153. 4. All linear dimensions are shown in millimeters (inches). Inches equivalents are given

31、 for general information only. FIGURE 1. Case outlines. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03645 REV A PAGE 8 (each gate) Inputs A B Output Y H X L X

32、H L L L H X = Immaterial FIGURE 2. Truth table. FIGURE 3. Logic diagram. Device Type 01 Case outline X Terminal number Terminal symbol Terminal number Terminal symbol 1 1Y 8 3A 2 1A 9 3B 3 1B 10 3Y 4 2Y 11 4A 5 2A 12 4B 6 2B 13 4Y 7 GND 14 VCCFIGURE 4. Terminal connections. Provided by IHSNot for Re

33、saleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03645 REV A PAGE 9 NOTES: 1. CLincludes probe and jig capacitance. 2. Waveform 1 is for an output with internal conditions such that the out

34、put is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. 3. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, ZO= 50, tr 3 ns, tf 3 n

35、s. 4. The outputs are measured one at a time with one input transition per measurement. 5. All parameters and waveforms are not applicable to all devices. 6. For 3-state and Open Drain outputs tests: tPLH/tPHLS1 = Open tPLZ/tPZLS1 = VCCtPHZ/tPZHS1 = GND Open Drain S1 = VCCFIGURE 5. Timing waveforms

36、and test circuit. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03645 REV A PAGE 10 4. VERIFICATION 4.1 Product assurance requirements. The manufacturer is respo

37、nsible for performing all inspection and test requirements as indicated in their internal documentation. Such procedures should include proper handling of electrostatic sensitive devices, classification, packaging, and labeling of moisture sensitive devices, as applicable. 5. PREPARATION FOR DELIVER

38、Y 5.1 Packaging. Preservation, packaging, labeling, and marking shall be in accordance with the manufacturers standard commercial practices for electrostatic discharge sensitive devices. 6. NOTES 6.1 ESDS. Devices are electrostatic discharge sensitive and are classified as ESDS class 1 minimum. 6.2

39、Configuration control. The data contained herein is based on the salient characteristics of the device manufacturers data book. The device manufacturer reserves the right to make changes without notice. This drawing will be modified as changes are provided. 6.3 Suggested source(s) of supply. Identif

40、ication of the suggested source(s) of supply herein is not to be construed as a guarantee of present or continued availability as a source of supply for the item. Vendor item drawing administrative control number 1/ Device manufacturer CAGE code Vendor part number Top-Side Marking V62/03645-01XE 012

41、95 SN74AHC02MPWREP AHC02EP 1/ The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation. CAGE code Source of supply 01295 Texas Instruments, Inc. Semiconductor Group 8505 Forest lane P.O. Box 660199 Dallas, TX 75243 Point of contact: U.S. Highway 75 South P.O. Box 84, M/S 853 Sherman, TX 75090-9493 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-