DLA DSCC-VID-V62 03653 REV A-2009 MICROCIRCUIT DIGITAL ADVANCED HIGH SPEED CMOS QUADRUPLE 2-INPUT POSITIVE NAND GATE WITH TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE APPROVED A Update boilerplate paragraphs to current requirements. - PHN 09-05-27 Thomas M. Hess Prepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV A A A A A A A A A A PAGE 1 2 3 4 5 6 7 8 9 10 PMIC N/A PREPARED BY Cha

2、rles F. Saffle DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO 43218-3990 Original date of drawing CHECKED BY Charles F. Saffle TITLE MICROCIRCUIT, DIGITAL, ADVANCED HIGH SPEED CMOS, QUADRUPLE 2-INPUT POSITIVE NAND GATE WITH TTL COMPATIBLE INPUTS, MONOLITHIC SILICON YY-MM-DD 03-08-19 APPROVED BY Thom

3、as M. Hess SIZE A CODE IDENT. NO. 16236 DWG NO. V62/03653 REV A PAGE 1 OF 10 AMSC N/A 5962-V059-09 .Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03653 REV A PAG

4、E 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance quadruple 2-input positive NAND gate with TTL compatible inputs microcircuit, with an operating temperature range of -55C to +125C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturers P

5、IN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/03653 - 01 X E Drawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s). Device ty

6、pe Generic Circuit function 01 74AHCT00-EP Quadruple 2-input positive NAND gate with TTL compatible inputs 1.2.2 Case outlines. The case outlines are as specified herein. Outline letter Number of pins JEDEC PUB 95 Package style X 14 JEDEC MO-153 Plastic small-outline Y 14 JEDEC MS-012 Plastic small-

7、outline 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacturer: Finish designator Material A Hot solder dip B Tin-lead plate C Gold plate D Palladium E Gold flash palladium Z Other 1.3 Absolute maximum ratings. 1/ Supply voltage ra

8、nge (VCC) . -0.5 V to +7.0 V Input voltage range (VI) . -0.5 V to +7.0 V 2/ Output voltage range (VO) . -0.5 V to VCC+ 0.5 V 2/ Input clamp current (IIK) (VIVCC) 20 mA Continuous output current (IO) (VO= 0 to VCC) 25 mA Continuous current through VCCor GND 50 mA Package thermal impedance (JA): X pac

9、kage . 113C/W 3/ Y package . 86C/W 3/ Storage temperature range (TSTG) -65C to +150C 1/ Stresses beyond those listed under “absolute maximum rating” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond

10、 those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2/ The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 3/ The package the

11、rmal impedance is calculated in accordance with JESD 51-7. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03653 REV A PAGE 3 1.4 Recommended operating conditions.

12、 4/ 5/ Supply voltage range (VCC) . 4.5 V to 5.5 V Minimum high level input voltage (VIH) 2.0 V Maximum low level input voltage (VIL) . 0.8 V Input voltage range (VI) . 0.0 V to 5.5 V Output voltage range (VO) . 0.0 V to VCCMaximum high level output current (IOH) . -8.0 mA Maximum low level output c

13、urrent (IOL) . 8.0 mA Maximum input transition rise or fall rate (t/v) . 20 ns/V Operating free-air temperature range (TA) -55C to +125C 2. APPLICABLE DOCUMENTS JEDEC PUB 95 - Registered and Standard Outlines for Semiconductor Devices JESD 51-7 - High Effective Thermal Conductivity Test Board for Le

14、aded Surface Mount Packages (Applications for copies should be addressed to the Electronic Industries Alliance, 2500 Wilson Boulevard, Arlington, VA 22201-3834 or online at http:/www.jedec.org) 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part num

15、ber as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code, or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteri

16、stics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case o

17、utlines. The case outlines shall be as shown in 1.2.2 and figure 1. 3.5.2 Truth table. The truth table shall be as shown in figure 2. 3.5.3 Logic diagram. The logic diagram shall be as shown in figure 3. 3.5.4 Terminal connections. The terminal connections shall be as shown in figure 4. 3.5.5 Timing

18、 waveforms and test circuit. The timing waveforms and test circuit shall be as shown in figure 5. 4/ Use of this product beyond the manufacturers design rules or stated parameters is done at the users risk. The manufacturer and/or distributor maintain no responsibility or liability for product used

19、beyond the stated limits. 5/ All unused inputs of the device must be held at VCCor GND to ensure proper device operation Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO

20、. V62/03653 REV A PAGE 4 TABLE I. Electrical performance characteristics. 1/ Test Symbol Conditions VCCTemperature, TADevice type Limits Unit Min Max High level output voltage VOHIOH= -50 A 4.5 V 25C, -55C to 125C 01 4.4 V IOH= -8 mA 4.5 V 25C 3.94 -55C to 125C 3.80 Low level output voltage VOLIOL=

21、50 A 4.5 V 25C, -55C to 125C 01 0.1 V IOL= 8 mA 4.5 V 25C 0.36 -55C to 125C 0.44 Input current IIVI= 5.5 V or GND 0.0 V to 5.5 V 25C 01 0.1 A -55C to 125C 1.0 Quiescent supply current ICCVI= VCCor GND IO= 0 A 5.5 V 25C 01 2.0 A -55C to 125C 20.0 Quiescent supply current delta, TTL input levels ICC2/

22、 One input at 3.4 V. Other inputs at VCCor GND. 5.5 V 25C 01 1.35 mA -55C to 125C 1.5 Input capacitance CIVI= VCCor GND 5.0 V 25C 01 10 pF Power dissipation capacitance CpdNo load f = 1 MHz 5.0 V 25C 01 10.5 TYP pF Quiet output, maximum dynamic VOLVOL(P)3/ CL= 50 pF 5.0 V 25C 01 0.8 V Quiet output,

23、minimum dynamic VOLVOL(V)3/ 5.0 V 25C 01 -0.8 V Quiet output, minimum dynamic VOHVOH(V)3/ 5.0 V 25C 01 4.5 TYP V High level dynamic input voltage VIH(D)3/ 5.0 V 25C 01 2.0 V Low level dynamic input voltage VIL(D)3/ 5.0 V 25C 01 0.8 V See footnote at end of table. Provided by IHSNot for ResaleNo repr

24、oduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03653 REV A PAGE 5 TABLE I. Electrical performance characteristics - Continued. 1/ Test Symbol Conditions VCCTemperature, TADevice type Limits Unit Min

25、 Max Propagation delay time, A or B to Y tPLH, tPHLCL= 15 pF See figure 5 4.5 V and 5.5 V 25C 01 6.9 ns -55C to 125C 1.0 8.0 CL= 50 pF See figure 5 4.5 V and 5.5 V 25C 01 7.9 -55C to 125C 1.0 9.0 1/ Testing and other quality control techniques are used to the extent deemed necessary to assure produc

26、t performance over the specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In the absence of specific parametric testing, product performance is assured by characterization and/or design. 2/ This is th

27、e increase in supply current for each input at one of the specified TTL voltage levels, rather than 0 V or VCC. 3/ Characteristics are for surface-mount packages only. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS CO

28、LUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03653 REV A PAGE 6 Case X Dimensions Symbol Millimeters Inches Symbol Millimeters Inches Min Max Min Max Min Max Min Max A - 1.20 - .047 E 4.30 4.50 .169 .177 A1 0.05 0.15 .002 .006 E1 6.20 6.60 .244 .260 b 0.19 0.30 .007 .012 e 0.65 NOM .026 NOM

29、c 0.15 NOM .006 NOM L 0.50 0.75 .020 .030 D 4.90 5.10 .193 .201 NOTES: 1. This drawing is subject to change without notice. 2. Body dimensions do not include mold flash or protrusion not to exceed 0.15 mm. 3. Falls within JEDEC MO-153. 4. All linear dimensions are shown in millimeters (inches). Inch

30、es equivalents are given for general information only. FIGURE 1. Case outlines. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03653 REV A PAGE 7 Case Y Dimension

31、s Symbol Millimeters Inches Symbol Millimeters Inches Min Max Min Max Min Max Min Max A - 1.75 - .069 E 3.81 4.00 .150 .157 A1 0.10 0.25 .004 .010 E1 5.80 6.20 .228 .244 b 0.35 0.51 .014 .020 e 1.27 NOM .050 NOM c 0.20 NOM .008 NOM L 0.40 1.12 .016 .044 D 8.55 8.75 .337 .344 NOTES: 1. This drawing i

32、s subject to change without notice. 2. Body dimensions do not include mold flash or protrusion not to exceed 0.006 inches (0.15 mm). 3. Falls within JEDEC MS-012. 4. All linear dimensions are shown in inches (millimeters). Metric equivalents are given for general information only. FIGURE 1. Case out

33、lines - Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03653 REV A PAGE 8 (each gate) Inputs Output Y A B H H L L X H X L H X = Immaterial FIGURE 2. Tr

34、uth table. FIGURE 3. Logic diagram. Device type 01 Case outlines: X and Y Terminal number Terminal symbol Terminal number Terminal symbol 1 1A 8 3Y 2 1B 9 3A 3 1Y 10 3B 4 2A 11 4Y 5 2B 12 4A 6 2Y 13 4B 7 GND 14 VCCFIGURE 4. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networ

35、king permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03653 REV A PAGE 9 Notes: 1. CLincludes probe and jig capacitance. 2. Waveform 1 is for an output with internal conditions such that the output is low except when disabl

36、ed by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. 3. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, ZO= 50, tr 3 ns, tf 3 ns. 4. The outputs are measure

37、d one at a time with one input transition per measurement. 5. For 3-state and Open Drain outputs tests: tPLH/tPHLS1 = Open tPLZ/tPZLS1 = VCCtPHZ/tPZHS1 = GND Open Drain S1 = VCCFIGURE 5. Timing waveforms and test circuit. Provided by IHSNot for ResaleNo reproduction or networking permitted without l

38、icense from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03653 REV A PAGE 10 4. VERIFICATION 4.1 Product assurance requirements. The manufacturer is responsible for performing all inspection and test requirements as indicated in their internal docume

39、ntation. Such procedures should include proper handling of electrostatic sensitive devices, classification, packaging, and labeling of moisture sensitive devices, as applicable. 5. PREPARATION FOR DELIVERY 5.1 Packaging. Preservation, packaging, labeling, and marking shall be in accordance with the

40、manufacturers standard commercial practices for electrostatic discharge sensitive devices. 6. NOTES 6.1 ESDS. Devices are electrostatic discharge sensitive and are classified as ESDS class 1 minimum. 6.2 Configuration control. The data contained herein is based on the salient characteristics of the

41、device manufacturers data book. The device manufacturer reserves the right to make changes without notice. This drawing will be modified as changes are provided. 6.3 Suggested source(s) of supply. Identification of the suggested source(s) of supply herein is not to be construed as a guarantee of pre

42、sent or continued availability as a source of supply for the item. Vendor item drawing administrative control number 1/ Device manufacturer CAGE code Vendor part number Top-Side Marking V62/03653-01XE 01295 SN74AHCT00MPWREP AHT00EP V62/03653-01YE 01295 SN74AHCT00MDREP AHCT00MEP 1/ The vendor item dr

43、awing establishes an administrative control number for identifying the item on the engineering documentation. CAGE code Source of supply 01295 Texas Instruments, Inc. Semiconductor Group 8505 Forest lane P.O. Box 660199 Dallas, TX 75243 Point of contact: U.S. Highway 75 South P.O. Box 84, M/S 853 Sherman, TX 75090-9493 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-