DLA DSCC-VID-V62 03657 REV A-2009 MICROCIRCUIT DIGITAL ADVANCED HIGH SPEED CMOS OCTAL BUFFER DRIVER WITH THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE APPROVED A Update boilerplate paragraphs to current requirements. - PHN 09-06-24 Thomas M. Hess Prepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV A A A A A A A A A PAGE 1 2 3 4 5 6 7 8 9 PMIC N/A PREPARED BY Charles

2、F. Saffle DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO 43218-3990 Original date of drawing CHECKED BY Charles F. Saffle TITLE MICROCIRCUIT, DIGITAL, ADVANCED HIGH SPEED CMOS, OCTAL BUFFER/DRIVER WITH THREE-STATE OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON YY-MM-DD 03-09-02 APPROVED BY Thoma

3、s M. Hess SIZE A CODE IDENT. NO. 16236 DWG NO. V62/03657 REV A PAGE 1 OF 9 AMSC N/A 5962-V064-09 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03657 REV A PAGE 2

4、 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance octal buffer/driver with three-state outputs and TTL compatible inputs microcircuit, with an operating temperature range of -55C to +125C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacture

5、rs PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/03657 - 01 X E Drawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s). Devic

6、e type Generic Circuit function 01 74AHCT244-EP Octal buffer/driver with three-state outputs and TTL compatible inputs 1.2.2 Case outlines. The case outlines are as specified herein. Outline letter Number of pins JEDEC PUB 95 Package style X 20 JEDEC MO-153 Plastic small-outline Y 20 JEDEC MS-013 Pl

7、astic small-outline 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacturer: Finish designator Material A Hot solder dip B Tin-lead plate C Gold plate D Palladium E Gold flash palladium Z Other 1.3 Absolute maximum ratings. 1/ Suppl

8、y voltage range (VCC) . -0.5 V to +7.0 V Input voltage range (VI) . -0.5 V to +7.0 V 2/ Output voltage range (VO) . -0.5 V to VCC+ 0.5 V 2/ Input clamp current (IIK) (VIVCC) 20 mA Continuous output current (IO) (VO= 0 to VCC) 25 mA Continuous current through VCCor GND . 75 mA Package thermal impedan

9、ce (JA): X package . 83C/W 3/ Y package . 58C/W 3/ Storage temperature range (TSTG) . -65C to +150C 1/ Stresses beyond those listed under “absolute maximum rating” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other co

10、nditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2/ The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 3/

11、The package thermal impedance is calculated in accordance with JESD 51-7. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03657 REV A PAGE 3 1.4 Recommended operat

12、ing conditions. 4/ 5/ Supply voltage range (VCC) . 4.5 V to 5.5 V Minimum high level input voltage (VIH) 2.0 V Maximum low level input voltage (VIL) . 0.8 V Input voltage range (VI) . 0.0 V to 5.5 V Output voltage range (VO) . 0.0 V to VCCMaximum high level output current (IOH) . -8.0 mA Maximum low

13、 level output current (IOL) . 8.0 mA Operating free-air temperature range (TA) -55C to +125C 2. APPLICABLE DOCUMENTS JEDEC PUB 95 - Registered and Standard Outlines for Semiconductor Devices JESD 51-7 - High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages (Applications fo

14、r copies should be addressed to the Electronic Industries Alliance, 2500 Wilson Boulevard, Arlington, VA 22201-3834 or online at http:/www.jedec.org) 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A

15、. Manufacturers name, CAGE code, or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating

16、 conditions and electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outlines. The case outlines shall be as shown

17、 in 1.2.2 and figure 1. 3.5.2 Truth table. The truth table shall be as shown in figure 2. 3.5.3 Logic diagram. The logic diagram shall be as shown in figure 3. 3.5.4 Terminal connections. The terminal connections shall be as shown in figure 4. 3.5.5 Timing waveforms and test circuit. The timing wave

18、forms and test circuit shall be as shown in figure 5. 4/ All unused inputs of the device must be held at VCCor GND to ensure proper device operation. 5/ Use of this product beyond the manufacturers design rules or stated parameters is done at the users risk. The manufacturer and/or distributor maint

19、ain no responsibility or liability for product used beyond the stated limits. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03657 REV A PAGE 4 TABLE I. Electrica

20、l performance characteristics. 1/ Test Symbol Conditions VCCTemperature, TADevice type Limits Unit Min Max High level output voltage VOHIOH= -50 A 4.5 V 25C, -55C to 125C 01 4.4 V IOH= -8 mA 4.5 V 25C 3.94 -55C to 125C 3.80 Low level output voltage VOLIOL= 50 A 4.5 V 25C, -55C to 125C 01 0.1 V IOL=

21、8 mA 4.5 V 25C 0.36 -55C to 125C 0.44 3-state output current IOZVO= VCCor GND 5.5 V 25C 01 0.25 A -55C to 125C 2.5 Input current IIVI= 5.5 V or GND 0.0 V to 5.5 V 25C 01 0.1 A -55C to 125C 1.0 Quiescent supply current ICCVI= VCCor GND IO= 0 A 5.5 V 25C 01 4.0 A -55C to 125C 40.0 Quiescent supply cur

22、rent delta, TTL input levels ICC2/ One input at 3.4 V. Other inputs at VCC or GND 5.5 V 25C 01 1.35 mA -55C to 125C 1.5 Input capacitance CIVI= VCCor GND 5.0 V 25C 01 10 pF Output capacitance COVO= VCCor GND 5.0 V 25C 01 3 TYP pF Power dissipation capacitance CpdNo load, f = 1 MHz 5.0 V 25C 01 8.2 T

23、YP pF Quiet output, minimum dynamic VOHVOH(V)CL= 50 pF 3/ 5.0 V 25C 01 4.1 TYP V High level dynamic input voltage VIH(D)5.0 V 25C 01 2.0 V Low level dynamic input voltage VIL(D)5.0 V 25C 01 0.8 V Propagation delay time, A or B to Y tPLH, tPHLCL= 15 pF See figure 5 4.5 V and 5.5 V 25C 01 7.4 ns -55C

24、to 125C 1.0 8.5 4.5 V and 5.5 V 25C 8.4 -55C to 125C 1.0 9.5 Propagation delay time, OE to Y tPZH, tPZL4.5 V and 5.5 V 25C 01 10.4 Ns -55C to 125C 1.0 12.0 4.5 V and 5.5 V 25C 11.4 -55C to 125C 1.0 13.0 Propagation delay time, OE to Y tPHZ, tPLZ4.5 V and 5.5 V 25C 01 9.4 Ns -55C to 125C 1.0 10.0 4.5

25、 V and 5.5 V 25C 11.4 -55C to 125C 1.0 13.0 Output skew tsk(o)4.5 V and 5.5 V 25C 01 1.0 ns 1/ Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over the specified temperature range. Product may not necessarily be tested across the ful

26、l temperature range and all parameters may not necessarily be tested. In the absence of specific parametric testing, product performance is assured by characterization and/or design. 2/ This is the increase in supply current for each input at one of the specified TTL voltage levels, rather than 0 V

27、or VCC. 3/ Characteristics are for surface-mount packages only. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03657 REV A PAGE 5 Provided by IHSNot for ResaleNo

28、reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03657 REV A PAGE 6 Case X Dimensions Symbol Millimeters Inches Symbol Millimeters Inches Min Max Min Max Min Max Min Max A - 1.20 - .047 E 4.30 4.5

29、0 .169 .177 A1 0.05 0.15 .002 .006 E1 6.20 6.60 .244 .260 b 0.19 0.30 .007 .012 e 0.65 NOM .026 NOM c 0.15 NOM .006 NOM L 0.50 0.75 .020 .030 D 6.40 6.60 .252 .260 NOTES: 1. This drawing is subject to change without notice. 2. Body dimensions do not include mold flash or protrusion not to exceed 0.1

30、5 mm. 3. Falls within JEDEC MO-153. 4. All linear dimensions are shown in millimeters (inches). Inches equivalents are given for general information only. FIGURE 1. Case outlines. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER,

31、 COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03657 REV A PAGE 7 Case Y Dimensions Symbol Millimeters Inches Symbol Millimeters Inches Min Max Min Max Min Max Min Max A - 1.75 - .069 E 3.81 4.00 .150 .157 A1 0.10 0.25 .004 .010 E1 5.80 6.20 .228 .244 b 0.35 0.51 .014 .020 e 1.27 N

32、OM .050 NOM c 0.20 NOM .008 NOM L 0.40 1.12 .016 .044 D 12.70 12.95 .500 .510 NOTES: 1. This drawing is subject to change without notice. 2. Body dimensions do not include mold flash or protrusion not to exceed 0.006 inches (0.15 mm). 3. Falls within JEDEC MS-013. 4. All linear dimensions are shown

33、in inches (millimeters). Metric equivalents are given for general information only. FIGURE 1. Case outlines - Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO

34、. V62/03657 REV A PAGE 8 (each 4-bit buffer/driver) Inputs Output Y OE A L H H L L L H X Z X = Immaterial Z = High impedance state FIGURE 2. Truth table. FIGURE 3. Logic diagram. Device type 01 Case outlines: X and Y Terminal number Terminal symbol Terminal number Terminal symbol 1 1 OE 11 2A1 2 1A1

35、 12 1Y4 3 2Y4 13 2A2 4 1A2 14 1Y3 5 2Y3 15 2A3 6 1A3 16 1Y2 7 2Y2 17 2A4 8 1A4 18 1Y1 9 2Y1 19 2 OE 10 GND 20 VCC FIGURE 4. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CO

36、DE IDENT NO. 16236 DWG NO. V62/03657 REV A PAGE 9 Notes: 1. CLincludes probe and jig capacitance. 2. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output

37、is high except when disabled by the output control. 3. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, ZO= 50, tr 3 ns, tf 3 ns. 4. The outputs are measured one at a time with one input transition per measurement. 5. For 3-state and Open Drain outputs tes

38、ts: tPLH/tPHLS1 = Open tPLZ/tPZLS1 = VCCtPHZ/tPZHS1 = GND Open Drain S1 = VCCFIGURE 5. Timing waveforms and test circuit. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG N

39、O. V62/03657 REV A PAGE 10 4. VERIFICATION 4.1 Product assurance requirements. The manufacturer is responsible for performing all inspection and test requirements as indicated in their internal documentation. Such procedures should include proper handling of electrostatic sensitive devices, classifi

40、cation, packaging, and labeling of moisture sensitive devices, as applicable. 5. PREPARATION FOR DELIVERY 5.1 Packaging. Preservation, packaging, labeling, and marking shall be in accordance with the manufacturers standard commercial practices for electrostatic discharge sensitive devices. 6. NOTES

41、6.1 ESDS. Devices are electrostatic discharge sensitive and are classified as ESDS class 1 minimum. 6.2 Configuration control. The data contained herein is based on the salient characteristics of the device manufacturers data book. The device manufacturer reserves the right to make changes without n

42、otice. This drawing will be modified as changes are provided. 6.3 Suggested source(s) of supply. Identification of the suggested source(s) of supply herein is not to be construed as a guarantee of present or continued availability as a source of supply for the item. Vendor item drawing administrativ

43、e control number 1/ Device manufacturer CAGE code Vendor part number Top-Side Marking V62/03657-01XE 01295 SN74AHCT244MPWREP AHT244EP V62/03657-01YE 01295 SN74AHCT244MDWREP AHCT244MEP 1/ The vendor item drawing establishes an administrative control number for identifying the item on the engineering

44、documentation. CAGE code Source of supply 01295 Texas Instruments, Inc. Semiconductor Group 8505 Forest lane P.O. Box 660199 Dallas, TX 75243 Point of contact: U.S. Highway 75 South P.O. Box 84, M/S 853 Sherman, TX 75090-9493 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-