DLA DSCC-VID-V62 04643 REV A-2010 MICROCIRCUIT DIGITAL CMOS LVDS SERDES TRANSMITTER MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE APPROVED A Update boilerplate paragraphs to current requirements. - PHN 10-02-22 Thomas M. Hess Prepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV A A A A A A A A A A A A A A PAGE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC

2、 N/A PREPARED BY Charles F. Saffle DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.milOriginal date of drawing CHECKED BY Charles F. Saffle TITLE MICROCIRCUIT, DIGITAL, CMOS, LVDS SERDES TRANSMITTER, MONOLITHIC SILICON YY-MM-DD 04-02-04 APPROVED BY Thomas M. Hess SIZE A

3、CODE IDENT. NO. 16236 DWG NO. V62/04643 REV A PAGE 1 OF 14 AMSC N/A 5962-V032-10 .Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04643 REV A PAGE 2 1. SCOPE 1.1 S

4、cope. This drawing documents the general requirements of a high performance LVDS serdes (serializer/deserializer) transmitter microcircuit, with an operating temperature range of -40C to +85C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturers PIN is the item of identification.

5、 The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/04643 - 01 X E Drawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s). Device type Generic Circuit function 01 SN

6、65LVDS95-EP LVDS serdes (serializer/deserializer) transmitter 1.2.2 Case outline. The case outline are as specified herein. Outline letter Number of pins JEDEC PUB 95 Package style X 48 JEDEC MO-153 Plastic small-outline 1.2.3 Lead finishes. The lead finishes are as specified below or other lead fin

7、ishes as provided by the device manufacturer: Finish designator Material A Hot solder dip B Tin-lead plate C Gold plate D Palladium E Gold flash palladium Z Other Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBU

8、S, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04643 REV A PAGE 3 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) . -0.5 V to +4.0 V 2/ Voltage range at any output terminal (VO) . -0.5 V to VCC+ 0.5 V Voltage range at any input terminal (VI) -0.5 V to 5.5 V Electrostatic discharge: 3/ B

9、us pins (Class 3A) . 6 KV Bus pins (Class 2B) . 400 V All pins (Class 3A) . 6 KV All pins (Class 2B) . 200 V Continuous total power dissipation: TA 25C power rating 1316 mW TA 70C power rating 724 mW TA 85C power rating 526 mW Derating factor above TA 25C . 13.1 mW/C 4/ Operating free-air temperatur

10、e range (TA). -40C to +85C Storage temperature range (TSTG) . -65C to +150C Lead temperature 1.6 mm (1/16 inch) from case for 10 seconds 260C 1.4 Recommended operating conditions. 5/ Supply voltage range (VCC) . +3.0 V to +3.6 V Minimum high level input voltage (VIH) +2.0 V Maximum low level input v

11、oltage (VIL) . +0.8 V Differential load impedance (ZL) 90 to 132 Operating free-air temperature range (TA). -40C to +85C 1/ Stresses beyond those listed under “absolute maximum rating” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at

12、these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2/ All voltage values are with respect to the GND terminals. 3/ This rating is measured usin

13、g MIL-STD-883 Test Method 3015.7. 4/ The power dissipation derating factor is the inverse of the junction-to-ambient thermal resistance when board-mounted and with no air flow. 5/ Use of this product beyond the manufacturers design rules or stated parameters is done at the users risk. The manufactur

14、er and/or distributor maintain no responsibility or liability for product used beyond the stated limits. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04643 REV

15、A PAGE 4 2. APPLICABLE DOCUMENTS JEDEC PUB 95 - Registered and Standard Outlines for Semiconductor Devices (Applications for copies should be addressed to the Electronic Industry Alliance, 2500 Wilson Boulevard, Arlington, VA 22201-3834 or at http:/www.jedec.org) MIL-STD-883 - Test Method Standard M

16、icrocircuits. (Unless otherwise indicated, copies of the specification, standards, and handbooks are available from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with

17、the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code, or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturers part number and with items A and C (if applicable) above.

18、 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein.

19、3.5 Diagrams. 3.5.1 Case outline. The case outline shall be as shown in 1.2.2 and figure 1. 3.5.2 Terminal connections. The terminal connections shall be as shown in figure 2. 3.5.3 Block diagram. The block diagram shall be as shown in figure 3. 3.5.4 Timing waveforms. The timing waveforms shall be

20、as shown in figures 4a 4g. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04643 REV A PAGE 5 TABLE I. Electrical performance characteristics. 1/ Test Symbol Test

21、conditions -40C TA +85C VCC= 3.0 V and 3.6 V unless otherwise specified Limits Unit Min Max Input voltage threshold VITVCC= 3.3 V, TA= +25C 1.4 TYP V Differential steady-state output voltage magnitude |VOD| RL = 100 See figure 4a. 247 454 mV Changes in the steady-state differential output voltage ma

22、gnitude between opposite binary states |VOD| RL = 100 See figure 4a. 50 mV Steady-state common-mode output voltage VOC(SS)See figure 4a. 1.125 1.375 V Peak-to-peak common-mode output voltage VOC(PP)See figure 4a. 150 mV High-level input current IIHVIH= VCC20 A Low-level input current IILVIL= 0 V 10

23、A Short-circuit output current IOSVOY= 0 V 24 mA VOD= 0 V 12 High-impedance state output current IOZVO= 0 V to VCC10 A Quiescent current (average) ICC(AVG)Disabled, all inputs at GND 280 A Enabled, RL= 100 (4 places), worst-case pattern (see figure 4b), tc= 15.38 ns 110 mA Input capacitance CIVCC= 3

24、.3 V, TA= +25C 3 TYP pF Input clock period tc14.7 50 ns High-level input clock pulse width duration tw0.4tc0.6tcns Input signal transition time tt5 ns Data setup time, D0 through D27 before CLKIN tsuSee figure 4c. 3 ns Data hold time, D0 through D27 after CLKIN th See figure 4c. 1.5 ns See footnotes

25、 at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04643 REV A PAGE 6 TABLE I. Electrical performance characteristics - Continued. 1/ Test Symbol Te

26、st conditions -40C TA +85C VCC= 3.0 V and 3.6 V unless otherwise specified Limits Unit Min Max Delay time, CLKOUT serial bit position 0 t0tc= 15.38 ns (0.2%), |Input clock jitter| 50 ps 2/, See figure 4d. -0.20 0.20 ns Delay time, CLKOUT serial bit position 1 t1 1/7tc - 0.20 1/7tc + 0.20 ns Delay ti

27、me, CLKOUT serial bit position 2 t2 2/7tc - 0.20 2/7tc + 0.20 ns Delay time, CLKOUT serial bit position 3 t3 3/7tc - 0.20 3/7tc + 0.20 ns Delay time, CLKOUT serial bit position 4 t4 4/7tc - 0.20 4/7tc + 0.20 ns Delay time, CLKOUT serial bit position 5 t5 5/7tc - 0.20 5/7tc + 0.20 ns Delay time, CLKO

28、UT serial bit position 6 t6 6/7tc - 0.20 6/7tc + 0.20 ns Output skew, tn n/7 tc sk(0)-0.20 0.20 Delay time, CLKIN to CLKOUT t7VCC= 3.3 V, TA= +25C tc= 15.38 ns (0.2%), |Input clock jitter| 50 ps 3/, See figure 4d. 4.2 TYP ps Output clock cycle-to-cycle jitter tc(O)2/ VCC= 3.3 V, TA= +25C tc= 15.38 n

29、s + 0.75sin(2500E3t) 0.05 ns, See figure 4e. 80 TYP VCC= 3.3 V, TA= +25C tc= 15.38 ns + 0.75sin(22E6t) 0.05 ns, See figure 4e. 300 TYP ns High-level output clock pulse duration tw4/7tcTYP ns Differential output voltage transition time (tror tf) ttSee figure 4a. 260 1500 ps Enable time,SHTDN to phase

30、 lock (Yn valid) ten VCC= 3.3 V, TA= +25C See figure 4f. 1 TYP ms Disable time, SHTDN to off-state (CLKOUT low) tdis VCC= 3.3 V, TA= +25C See figure 4g. 250 TYP ns 1/ Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over the specified

31、 temperature range. Product may not necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In the absence of specific parametric testing, product performance is assured by characterization and/or design. 2/ |Input clock jitter| is the magnitude of t

32、he change in the input clock period. 3/ The output clock jitter is the change in the output clock period from one cycle to the next cycle observed over 15,000 cycles. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COL

33、UMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04643 REV A PAGE 7 Case X Dimensions Symbol Millimeters Inches Symbol Millimeters Inches Min Max Min Max Min Max Min Max A - 1.20 - 0.047 E1 6.00 6.20 0.236 0.244 A1 0.05 0.15 0.002 0.006 e 0.50 NOM 0.020 NOM b 0.17 0.27 0.007 0.011 L 0.50 0.75 0.0

34、20 0.030 D 12.40 12.60 0.488 0.496 L1 0.25 NOM 0.010 NOM E 7.90 8.30 0.311 0.327 L2 0.15 NOM 0.006 NOM NOTES: 1. This drawing is subject to change without notice. 2. Body dimensions do not include mold protrusion not to exceed 0.15 mm (0.006 inches). 3. Falls within JEDEC MO-153. 4. All linear dimen

35、sions are shown in millimeters (inches). Inches equivalents are given for general information only. FIGURE 1. Case outline. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG

36、 NO. V62/04643 REV A PAGE 8 Device type 01 Case outline X Terminal number Terminal symbol Terminal number Terminal symbol 1 D4 25 D20 2 VCC26 CLKIN 3 D5 27 SHTDN 4 D6 28 PLLGND 5 GND 29 PLLVCC6 D7 30 PLLGND 7 D8 31 LVDSGND 8 VCC32 CLKOUTP 9 D9 33 CLKOUTM 10 D10 34 Y2P 11 GND 35 Y2M 12 D11 36 LVDSGND

37、 13 D12 37 LVDSVCC14 VCC38 Y1P 15 D13 39 Y1M 16 D14 40 Y0P 17 GND 41 Y0M 18 D15 42 LVDSGND 19 D16 43 NC 20 D17 44 D0 21 VCC45 D1 22 D18 46 GND 23 D19 47 D2 24 GND 48 D3 NC = No connection FIGURE 2. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without lic

38、ense from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04643 REV A PAGE 9 FIGURE 3. Block diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A

39、 CODE IDENT NO. 16236 DWG NO. V62/04643 REV A PAGE 10 NOTE: The lumped instrumentation capacitance for any single ended voltage measurement is less than or equal to 10 pF. When making measurements at YP or YM, the complementary output shall be similarly loaded FIGURE 4a. Timing waveforms. Provided b

40、y IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04643 REV A PAGE 11 NOTE: The worst-case test pattern produces nearly the maximum switching frequency for all of the LV-TTL o

41、utputs. FIGURE 4b. Timing waveforms. NOTE: All input timing is defined at 1.4 V on an input signal with a 10% to 90% rise or fall time of less than 5 ns. FIGURE 4c. Timing waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENT

42、ER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04643 REV A PAGE 12 FIGURE 4d. Timing waveforms. FIGURE 4e. Timing waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CO

43、DE IDENT NO. 16236 DWG NO. V62/04643 REV A PAGE 13 FIGURE 4f. Timing waveforms. FIGURE 4g. Timing waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04643

44、REV A PAGE 14 4. VERIFICATION 4.1 Product assurance requirements. The manufacturer is responsible for performing all inspection and test requirements as indicated in their internal documentation. Such procedures should include proper handling of electrostatic sensitive devices, classification, packa

45、ging, and labeling of moisture sensitive devices, as applicable. 5. PREPARATION FOR DELIVERY 5.1 Packaging. Preservation, packaging, labeling, and marking shall be in accordance with the manufacturers standard commercial practices for electrostatic discharge sensitive devices. 6. NOTES 6.1 ESDS. Dev

46、ices are electrostatic discharge sensitive and are classified as ESDS class 1 minimum. 6.2 Configuration control. The data contained herein is based on the salient characteristics of the device manufacturers data book. The device manufacturer reserves the right to make changes without notice. This d

47、rawing will be modified as changes are provided. 6.3 Suggested source(s) of supply. Identification of the suggested source(s) of supply herein is not to be construed as a guarantee of present or continued availability as a source of supply for the item. Vendor item drawing administrative control number 1/ Device manufacturer CAGE code Vendor part number Top-Side Marking V62/04643-01XE 01295 SN65LVDS95DGGREP 65LVDS95EP 1/ The vendor item drawing establishes an administrative control number for i