DLA DSCC-VID-V62 04650 REV A-2012 MICROCIRCUIT DIGITAL 1394 INTEGRATED PHY AND LINK LAYER CONTROLLER FOR SBP- 2 PRODUCTS AND DPP PRODUCTS MONOLITHIC SILICON.pdf

1、 REVISIONSLTR DESCRIPTION DATE APPROVEDA Update boilerplate paragraphs to current requirements. - PHN 12-04-10 Thomas M. Hess CURRENT DESIGN ACTIVITY CAGE CODE 16236 HAS CHANGED NAMES TO: DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 Prepared in accordance with ASME Y14.24 Vendor item drawing REV

2、PAGE REV PAGE REV STATUS OF PAGES REV A A A A A A A A A A PAGE 1 2 3 4 5 6 7 8 9 10 PMIC N/A PREPARED BY Phu H. Nguyen DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO Original date of drawing CHECKED BY Phu H. Nguyen TITLE MICROCIRCUIT, DIGITAL, 1394 INTEGRATED PHY AND LINK LAYER CONTROLLER FOR SBP-2

3、 PRODUCTS AND DPP PRODUCTS , MONOLITHIC SILICON YY MM DD 04-03-29 APPROVED BY Thomas M. Hess SIZE A CODE IDENT. NO. 16236 DWG NO. V62/04650 REV A PAGE 1 OF 10 AMSC N/A 5962-V053-12 .Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTE

4、R, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04650 REV A PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance 1394 Integrated PHY and Link Layer controller for SBP-2 products and DPP products microcircuit, with an operating temperatur

5、e range of -40C to +85C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/04650 - 01 X E Drawing Device type

6、Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s). 1/ Device type Generic Circuit function 01 TSB43AA82A-EP 1394 Integrated PHY and Link layer Controller for SBP-2 Products and DPP products 1.2.2 Case outline(s). The case outlines are as specified herein. Outli

7、ne letter Number of pins JEDEC PUB 95 Package style X 144 JEDEC MS-026 Plastic quad flatpack 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacturer: Finish designator Material A Hot solder dip B Tin-lead plateC Gold plateD Palladiu

8、mE Gold flash palladium Z Other 1.3 Absolute maximum ratings. 2/ Supply voltage range, (VDD) . -0.3 V to +4.0 V 3/ Input voltage range, (VI) . -0.5 V to VDD+0.5 V Output voltage range at any output, (VO) . -0.5 V to VDD+0.5 V Storage temperature range, (TSTG) -65C to +150C Lead temperature 1.6 mm (1

9、/16 inch) from case for 10 seconds +260C 1/ Users are cautioned to review the manufacturers data manual for additional user information relating to this device. 2/ Stresses beyond those listed under “absolute maximum rating” may cause permanent damage to the device. These are stress ratings only, an

10、d functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 3/ All voltage values, except differential I/O bus v

11、oltage, are with respect to network ground. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04650 REV A PAGE 3 1.4 Recommended operating conditions. Min Max Unit S

12、upply voltage, (VCC) 3.0 3.6 V Output voltage, (VO) TTL and LVCMOS terminals High level input voltage, (VIH) PD, CONTEND, LINKON, PWRCLS0:2 0.7VDDVDDXRESETP 0.6VDDVDDLink inputs 0.7VDDVDDLow level input voltage, (VIL) PD, CONTEND, LINKON, PWRCLS0:2 0 0.2VDDXRESETP 0 0.3VDDLink inputs 0 0.3VDDOperati

13、ng free air temperature, (TA) PGE package (stress conditions, see 5/), I suffix -40 85 C Virtual junction temperature, (TJ) 4/ PGE, low K, RJA= 70.82C/W, TA= 85C 0 105.7 PGE, high K, RJA= 50.78C/W, TA= 85C 0 99.84 Differential input voltage, (VID) Cable inputs, during data reception, 118 260 mV Cabl

14、e inputs, during arbitration 168 265 Common mode input voltage, (VIC) TPB cable inputs, source power node 0.4706 2.515 V TPB cable inputs, non source power node 0.4706 2.015 7/ Output current, (IO) TPBIAS outputs -5.6 1.3 mA Power-up reset time, (tpu) XRESETP input 2 ms Receive input jitter TPA, TPB

15、 cable inputs, S100 operation 1.08 ns TPA, TPB cable inputs, S200 operation 0.5 TPA, TPB cable inputs, S400 operation 0.315 Receive input skew Between TPA and TPB cable inputs, S100 operation 0.8 ns Between TPA and TPB cable inputs, S200 operation 0.55 Between TPA and TPB cable inputs, S400 operatio

16、n 0.5 2. APPLICABLE DOCUMENTS JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JEP95 Registered and Standard Outlines for Semiconductor Devices (Copies of these documents are available online at http:/www.jedec.org or from JEDEC Solid State Technology Association, 3103 North 10th Street, Suite 240S,

17、 Arlington, VA 22201.) THE INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS (IEEE) IEEE Standard 1394a - IEEE Standard for Higher Performance Serial Buses Allowing Gigabit Signaling. (Copies of these documents are available online at http:/www.ieee.org or from the IEEE Service Center, 445 Hoes Lane

18、, P.O. Box 1331, Piscataway, NJ 088551331. 4/ The junction temperatures listed reflect simulation conditions. The customer is responsible for verifying the junction temperature. 5/ Stress condition are VDD= 3.6 V, both 1394 ports running continuous data streams. 6/ Typical conditions are VDD= 3.3 V,

19、 both 1394 ports receiving/transmitting data packets. 7/ For a node that does not source power, see Section 4.2.2.2. in IEEE P1394a. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO.

20、16236 DWG NO. V62/04650 REV A PAGE 4 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code, or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container

21、. The unit container shall be marked with the manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Desi

22、gn, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outline(s). The case outline(s) shall be as shown in 1.2.2 and figure 1. 3.5.2 Terminal connections. The terminal connections shall be as shown in figure 2. 3

23、.5.3 Block diagram. The block diagram shall be as specified in figure 3. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04650 REV A PAGE 5 TABLE I. Electrical per

24、formance characteristics. Test Symbol Test condition -40C TA+85C 3.0 V VCC 3.6 V unless otherwise noted Limits Unit Min Max Device Supply current-ULP(ultra low power) 1/ IDD-ULPPLLON/PD/LPS/ENZ = L/L/L/L, PWTST = NC 2.1 Typ mA PLLON/PD/LPS/ENZ = H/L/L/L, PWTST = NC 11.2 Typ PLLON/PD/LPS/ENZ = L/L/L/

25、H, PWTST = 1.8 V 51 Typ A PLLON/PD/LPS/ENZ = H/L/L/H, PWTST = 1.8 V 9.3 Typ mA Supply current-PD(power down) 2/ IDD-PDPLLON/PD/LPS/ENZ = L/H/X/L 2.1 Typ mA PLLON/PD/LPS/ENZ = H/H/X/L 11.0 Typ PLLON/PD/LPS/ENZ = L/H/X/H 51 Typ A PLLON/PD/LPS/ENZ = H/H/X/H 9.3 Typ mA Supply current-( PLLON/PD/LPS/ENZ

26、= X/L/H/L) IDDPorts disabled 30.4 Typ mA One port enabled 46.6 Typ Two ports enabled 62.6 Typ Supply current-transmitting/receiving 16 bit data through BDI (packets 512 bytes) IDD-opOne port enabled 48.0 Typ mA Two ports enabled 64.0 Typ Power status threshold, CPS input VTH400 k resistor 4.7 7.5 V

27、Input current, LPS, PD, PHYTESTM, PWRCLS0:2 IIVDD= 3.6 V 5 A Pullup current, XRESETP input IIRSTVI= 1.5 V 05 0 V -90 -20 A TPBIAS output voltage VOAt rated IOcurrent 1.665 2.015 V Driver Differential output voltage VOD56 between differential pairs 172 265 mV Driver differential current, TPA+, TPA-,

28、TPB+, TPB- IDIFFDrivers enabled, speed signaling off -1.05 3/ 1.05 3/ mA Common mode speed signaling current, TPB+, TPB- ISP200S200 speed signaling enabled -4.84 4/ -2.53 4/ mA Common mode speed signaling current, TPB+, TPB- ISP400S400 speed signaling enabled -12.4 4/ -8.10 4/ mA Off state different

29、ial voltage VOFFDrivers disabled 20 mV See notes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04650 REV A PAGE 6 TABLE I. Electrical performanc

30、e characteristics - Continued. Test Symbol Test condition -40C TA+85C 3.0 V VCC 3.6 V unless otherwise noted Limits Unit Min Max Receiver Differential impedance ZIDDrivers disabled 4 k 4 pF Common mode impedance ZIC20 k 24 pF Receiver input threshold voltage VTH-R-30 30 mV Cable bias detect threshol

31、d, TPB cable inputs VTH-CB0.6 1 V Positive arbitration comparator threshold voltage VTH+89 168 mV Negative arbitration comparator threshold voltage VTH-168 -89Speed signal threshold VTH-SP200TPBIAS-TPA common mode voltage, drivers disabled 49 131 Speed signal threshold VTH-SP400TPBIAS-TPA common mod

32、e voltage, drivers disabled 314 396 Switching characteristics Jitter, transmit Between TPA and TPB 0.15 ns Skew, transmit Between TPA and TPB 0.10 TP differential rise time, transmit tr10% to 90% at 1394 connector 0.5 1.2 TP differential fall time, transmit tf90% to 10% at 1394 connector 0.5 1.2 1.

33、Ultra low power (LPS = L): Using LPS to enable a low power mode allows the user not to provide a reset when disabling the low power mode. In this mode the user must provide the 1.8 V core voltage, externally (ENZ = L, PWTST = NC, decoupling caps). 2. Power down mode (PD = H): When power down mode is

34、 disabled a reset must be applied to the device. 3. Limits defined as algebraic sum of TPA+ and TPB- driver currents. Limits also apply to TPB+ and TPB- algebraic sum of driver currents. 4. Limits defined as absolute limit of each of TPB+ and TPB- driver currents. Provided by IHSNot for ResaleNo rep

35、roduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04650 REV A PAGE 7 Dimensions Symbol Millimeters Symbol Millimeters Min Max Min Max A 1.60 D1/E1 19.80 20.20 A1 1.35 1.45 D2/E2 17.50 TYP b 0.17 0.27

36、e 0.50 TYP c 0.13 NOM K 0.45 0.75 D/E 21.80 22.20 Notes: 1. All linear dimensions are in millimeters. 2. This drawing is subject to change without notice. 3. Fall within JEDEC MS-026 FIGURE 1. Case outlines. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IH

37、S-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04650 REV A PAGE 8 Pin No. Signal Name Pin No. Signal Name Pin No. Signal Name Pin No. Signal Name 1 MODE0 37 BDIO5 73 DA13 109 AGN5 2 MODE1 38 VDD3V74 DA14 110 AVD5 3 VSS39 BDIO6 75 VSS111 FILTER0 4 MODE2 4

38、0 BDIO7 76 DA15 112 FILTER1 5 M8M16 41 BDACK 77 XWAIT 113 VDPLL 6 MUXMODE 42 BDIO8 78 XRD 114 VSPLL 7 BDITRIS 43 VSS79 VDD3V115 X1 8 BDICLK 44 BDIO9 80 PWTST 116 X0 9 BDOCLKDIS 45 BDIO10 81 XWR 117 VSS10 VDD3V46 BDIO11 82 ALE 118 PWTST 11 VSS47 PWTST 83 VSS119 TEST0 12 BDOCLK48 BDIO12 84 XCS 120 TES

39、T1 13 ATACK 49 BDIO13 85 XRESETL 121 TEST2 14 BDIFO 50 BDIO14 86 XRESETP 122 TEST3 15 PWTST 51 VSS87 PWTST 123 VSS16 BDIF1 52 VDD3V88 VSS124 TEST417 BDIF2 53 BDIO15 89 AVD1 125 TEST5 18 BDOF0 54 XINT 90 AGN1 126 PWTST 19 VSS55 DA0 91 TPB1N 127 TEST6 20 BDOF1 56 DA1 92 TPB1P 128 VDD3V21 BDOF2 57 DA2

40、93 AGN2 129 TEST7 22 BDIBUSY/BDREQ(SCSI) 58 DA3 94 AVD2 130 LPS 23 BDIEN/BDWR(SCSI) 59 VSS95 TPA1N 131 VSS24 VDD3V60 DA4 96 TPA1P 132 PWRCLS0 25 BDOAVAIL/BDRW(SCSI) 61 DA5 97 TPBIAS1 133 PWRCLS1 26 BDOEN/BDRD(SCSI) 62 DA6 98 AGN3 134 PWRCLS2 27 VSS63 PWTST 99 R0 135 CAN 28 BDIO0 64 DA7 100 R1 136 PD

41、 29 BDIO1 65 DA8 101 AVD3 137 PLLON 30 BDIO2 66 VDD3V102 TPB2N 138 LINKON 31 PWTST 67 VSS103 TPB2P 139 CONTEND 32 EN 68 DA9 104 AGN4 140 VSS33 VDD3V69 DA10 105 AVD4 141 PWTST 34 BDIO3 70 VDD3V106 TPA2N 142 CPS 35 VSS71 DA11 107 TPA2P 143 PHYTETM 36 BDIO4 72 DA12 108 TPBIAS2 144 VDD3VFIGURE 2. Termin

42、al connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04650 REV A PAGE 9 FIGURE 3. Block diagram. Provided by IHSNot for ResaleNo reproduction or network

43、ing permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04650 REV A PAGE 10 4. VERIFICATION 4.1 Product assurance requirements. The manufacturer is responsible for performing all inspection and test requirements as indicated i

44、n their internal documentation. Such procedures should include proper handling of electrostatic sensitive devices, classification, packaging, and labeling of moisture sensitive devices, as applicable. 5. PREPARATION FOR DELIVERY 5.1 Packaging. Preservation, packaging, labeling, and marking shall be

45、in accordance with the manufacturers standard commercial practices for electrostatic discharge sensitive devices. 6. NOTES 6.1 ESDS. Devices are electrostatic discharge sensitive and are classified as ESDS class 1 minimum. 6.2 Configuration control. The data contained herein is based on the salient

46、characteristics of the device manufacturers data book. The device manufacturer reserves the right to make changes without notice. This drawing will be modified as changes are provided. 6.3 Suggested source(s) of supply. Identification of the suggested source(s) of supply herein is not to be construe

47、d as a guarantee of present or continued availability as a source of supply for the item. Vendor item drawing administrative control number 1/ Device manufacturer CAGE code Vendor part number Top side marking V62/03650-01XE 01295 TSB43AA82AIPGEEP TSB43AA82AIEP 1/ The vendor item drawing establishes

48、an administrative control number for identifying the item on the engineering documentation. CAGE code Source of supply 01295 Texas Instruments, Inc. Semiconductor Group8505 Forest Lane P.O. Box 660199 Dallas, TX 75243 Point of contact: U.S. Highway 75 South P.O. Box 84, M/S 853 Sherman, TX 75090-9493 Provided by IHSNot for ResaleNo reproduction or networking permitted