DLA DSCC-VID-V62 04660 REV B-2012 MICROCIRCUIT DIGITAL LOW VOLTAGE CMOS QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR MULTIPLEXER WITH 3-STATE OUTPUTS MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE APPROVED A Add device type 02. Update boilerplate to current revision. - CFS 07-02-22 Thomas M. Hess B Update boilerplate paragraphs to current requirements. - PHN 12-07-23 Thomas M. Hess CURRENT DESIGN ACTIVITY CAGE CODE 16236 HAS CHANGED NAMES TO: DLA LAND AND MARIT

2、IME COLUMBUS, OHIO 43218-3990 Prepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV B B B B B B B B B B B PAGE 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY Charles F. Saffle DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO 43218-3990 Original date of dra

3、wing CHECKED BY Charles F. Saffle TITLE MICROCIRCUIT, DIGITAL, LOW VOLTAGE CMOS, QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER WITH 3-STATE OUTPUTS, MONOLITHIC SILICON YY-MM-DD 04-03-08 APPROVED BY Thomas M. Hess SIZE A CODE IDENT. NO. 16236 DWG NO. V62/04660 REV B PAGE 1 OF 11 AMSC N/A 5962-

4、V087-12 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04660 REV B PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performanc

5、e quadruple 2-line to 1-line data selector/multiplexer with 3-state outputs microcircuit, with an operating temperature range of -40C to +125C for device type 01, and an operating temperature range of -55C to +125C for device type 02. 1.2 Vendor Item Drawing Administrative Control Number. The manufa

6、cturers PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/04660 - 01 X E Drawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s).

7、Device type Generic Circuit function 01 SN74LVC257A-EP Quadruple 2-line to 1-line data selector/multiplexer with 3-state outputs 02 SN74LVC257A-EP Quadruple 2-line to 1-line data selector/multiplexer with 3-state outputs 1.2.2 Case outlines. The case outlines are as specified herein. Outline letter

8、Number of pins JEDEC PUB 95 Package style X 16 MS-012 Plastic small-outline Y 16 MO-153 Plastic small-outline 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacturer: Finish designator Material A Hot solder dip B Tin-lead plate C Go

9、ld plate D Palladium E Gold flash palladium Z Other Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04660 REV B PAGE 3 1.3 Absolute maximum ratings. 1/ Supply volt

10、age range (VCC) . -0.5 V to 6.5 V Input voltage range (VI) . -0.5 V to 6.5 V 2/ Output voltage range (VO) . -0.5 V to VCC+ 0.5 V 2/ 3/ Input clamp current (IIK) (VI 0) -50 mA Output clamp current (IOK) (VO 0) . -50 mA Continuous output current (IO) . 50 mA Continuous current through VCCor GND . 100

11、mA Package thermal impedance (JA): 4/ X package . 73C/W Y package . 108C/W Storage temperature range (TSTG) . -65C to 150C 1.4 Recommended operating conditions. 5/ Supply voltage range (VCC): Operating 2.0 V to 3.6 V Data retention only 1.5 V minimum Minimum high level input voltage (VIH) (VCC= 2.7

12、V to 3.6 V) . 2.0 V Maximum low level input voltage (VIL) (VCC= 2.7 V to 3.6 V) 0.8 V Input voltage range (VI) . 0.0 V to 5.5 V Output voltage range (VO) . 0.0 V to VCCMaximum high level output current (IOH): VCC= 2.7 V -12 mA VCC= 3.0 V -24 mA Maximum low level output current (IOL): VCC= 2.7 V 12 m

13、A VCC= 3.0 V 24 mA Maximum input transition rise or fall rate (t/v) . 10 ns/V Operating free-air temperature range (TA): Device type 01 . -40C to +125C Device type 02 . -55C to +125C 1/ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are

14、stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2/ The input negative-voltage

15、 and output voltage ratings may be exceeded if the input and output current ratings are observed. 3/ The value of VCCis provided in the recommended operating conditions table. 4/ The package thermal impedance is calculated in accordance with JESD 51-7. 5/ All unused inputs of the device must be held

16、 at VCCor GND to ensure proper device operation. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04660 REV B PAGE 4 2. APPLICABLE DOCUMENTS JEDEC SOLID STATE TECHN

17、OLOGY ASSOCIATION (JEDEC) JEP95 Registered and Standard Outlines for Semiconductor Devices JESD51-7 High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages (Copies of these documents are available online at http:/www.jedec.org or from JEDEC Solid State Technology Association

18、, 3103 North 10th Street, Suite 240S, Arlington, VA 22201.) 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code, or logo B. Pin 1 identifier C. ESDS identification (optio

19、nal) 3.2 Unit container. The unit container shall be marked with the manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1.4, and t

20、able I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outlines. The case outlines shall be as shown in 1.2.2 and figure 1. 3.5.2 Truth table. The truth table shall be as shown in figure 2.

21、3.5.3 Logic diagram. The logic diagram shall be as shown in figure 3. 3.5.4 Terminal connections. The terminal connections shall be as shown in figure 4. 3.5.5 Test circuit and timing waveforms. The test circuit and timing waveforms shall be as shown in figure 5. Provided by IHSNot for ResaleNo repr

22、oduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04660 REV B PAGE 5 TABLE I. Electrical performance characteristics. 1/ Test Symbol Conditions VCCTemperature, TADevice type Limits Unit Min Max High le

23、vel output voltage VOHIOH= -100 A 2.7 V to 3.6 V Device 01: 25C, -40C to 125C, Device 02: 25C, -55C to 125C All VCC 0.2 V IOH= -12 mA 2.7 V 2.2 3.0 V 2.4 IOH= -24 mA 3.0 V 2.2 Low level output voltage VOLIOL= 100 A 2.7 V to 3.6 V 0.2 V IOL= 12 mA 2.7 V 0.4 IOL= 24 mA 3.0 V 0.55 Input current IIVI= 5

24、.5 V or GND 3.6 V 5 A Three-state output leakage current IOZVO= VCCor GND 3.6 V 15 A Quiescent supply current ICCVI= VCCor GND IO= 0 A 3.6 V 10 A Quiescent supply current delta ICCOne input at VCC 0.6 V, Other inputs at VCCor GND 2.7 V to 3.6 V 500 A Input capacitance CiVI= VCCor GND 3.3 V Devices 0

25、1 and 02: 25C 5 TYP pF Output capacitance COVO= VCCor GND 3.3 V 5 TYP pF Power dissipation capacitance per gate Cpdf = 10 MHz 2.5 V 14.5 TYP pF 3.3 V 15.5 TYP Propagation delay time, A or B to Y tpd2.7 V Device 01: 25C, -40C to 125C, Device 02: 25C, -55C to 125C All 5.4 ns 3.3 V 0.3 V 1 4.6 Propagat

26、ion delay time, A/B to Y 2.7 V 7.5 3.3 V 0.3 V 1 6.4 Propagation delay time, output enable, OE to Y ten2.7 V 6.7 3.3 V 0.3 V 1 5.6 Propagation delay time, output disable, OE to Y tdis2.7 V 4.7 3.3 V 0.3 V 0.5 4.3 Output skew tsk(o)3.3 V 0.3 V 1 1/ Testing and other quality control techniques are use

27、d to the extent deemed necessary to assure product performance over the specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In the absence of specific parametric testing, product performance is assured

28、 by characterization and/or design. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04660 REV B PAGE 6 Case X Dimensions Symbol Inches Millimeters Symbol Inches Mi

29、llimeters Min Max Min Max Min Max Min Max A - 0.069 - 1.75 E 0.150 0.157 3.81 4.00 A1 0.004 0.010 0.10 0.25 E1 0.228 0.244 5.80 6.20 b 0.014 0.020 0.35 0.51 e 0.050 BSC 1.27 BSC c 0.008 NOM 0.20 NOM L 0.016 0.044 0.40 1.12 D 0.386 0.394 9.80 10.00 NOTES: 1. All linear dimensions are in inches (milli

30、meters). 2. This case outline is subject to change without notice. 3. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 inches (0.15 mm). 4. Falls within JEDEC MS-012. FIGURE 1. Case outlines. Provided by IHSNot for ResaleNo reproduction or networking permitted without lic

31、ense from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04660 REV B PAGE 7 Case Y Dimensions Symbol Millimeters Inches Symbol Millimeters Inches Min Max Min Max Min Max Min Max A - 1.20 - 0.047 E 4.30 4.50 0.169 0.177 A1 0.05 0.15 0.002 0.006 E1 6.20

32、6.60 0.244 0.260 b 0.19 0.30 0.007 0.012 e 0.65 BSC 0.026 BSC c 0.15 NOM 0.006 NOM L 0.50 0.75 0.020 0.030 D 4.90 5.10 0.193 0.201 NOTES: 1. All linear dimensions are in millimeters (inches). 2. This case outline is subject to change without notice. 3. Body dimensions do not include mold flash or pr

33、otrusion, not to exceed 0.15 millimeters (0.006 in). 4. Fall within JEDEC MO-153. FIGURE 1. Case outlines - Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO.

34、V62/04660 REV B PAGE 8 Inputs Output OE A/B A B Y H L L L L X L L H H X L H X X X X X L H Z L H L H H = High voltage level L = Low voltage level X = Immaterial Z = High impedance state FIGURE 2. Truth table. FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitte

35、d without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04660 REV B PAGE 9 Device types 01 and 02 Case outlines X and Y Terminal number Terminal symbol 1 A/B 2 1A 3 1B 4 1Y 5 2A 6 2B 7 2Y 8 GND 9 3Y 10 3B 11 3A 12 4Y 13 4B 14 4A 15 OE 16

36、VCCFIGURE 4. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04660 REV B PAGE 10 NOTES: 1. CLincludes probe and jig capacitance. 2. Waveform

37、1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. 3. All input pulses are supplied by generators having the

38、following characteristics: PRR 10 MHz, ZO= 50 . 4. tPLZand tPHZare the same as tdis. 5. tPZLand tPZHare the same as ten. 6. tPLHand tPHLare the same as tpd. 7. The outputs are measured one at a time with one input transition per measurement. FIGURE 5. Test circuit and timing waveforms. Provided by I

39、HSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04660 REV B PAGE 11 4. VERIFICATION 4.1 Product assurance requirements. The manufacturer is responsible for performing all inspe

40、ction and test requirements as indicated in their internal documentation. Such procedures should include proper handling of electrostatic sensitive devices, classification, packaging, and labeling of moisture sensitive devices, as applicable. 5. PREPARATION FOR DELIVERY 5.1 Packaging. Preservation,

41、packaging, labeling, and marking shall be in accordance with the manufacturers standard commercial practices for electrostatic discharge sensitive devices. 6. NOTES 6.1 ESDS. Devices are electrostatic discharge sensitive and are classified as ESDS class 1 minimum. 6.2 Configuration control. The data

42、 contained herein is based on the salient characteristics of the device manufacturers data book. The device manufacturer reserves the right to make changes without notice. This drawing will be modified as changes are provided. 6.3 Suggested source(s) of supply. Identification of the suggested source

43、(s) of supply herein is not to be construed as a guarantee of present or continued availability as a source of supply for the item. DLA Land and Maritime maintains an online database of all current sources of supply at http:/www.landandmaritime.dla.mil/Programs/Smcr/. Vendor item drawing administrat

44、ive control number 1/ Device manufacturer CAGE code Vendor part number Top side marking V62/04660-01XE 01295 SN74LVC257AQDREP C257AEP V62/04660-01YE 01295 SN74LVC257AQPWREP C257AEP V62/04660-02YE 01295 SN74LVC257AMPWREP C257AME 1/ The vendor item drawing establishes an administrative control number

45、for identifying the item on the engineering documentation. CAGE code Source of supply 01295 Texas Instruments, Inc. Semiconductor Group 8505 Forest Lane P.O. Box 660199 Dallas, TX 75243 Point of contact: U.S. Highway 75 South P.O. Box 84, M/S 853 Sherman, TX 75090-9493 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-