DLA DSCC-VID-V62 04700 REV A-2011 MICROCIRCUIT DIGITAL ADVANCED BIPOLAR CMOS OCTAL BUFFER DRIVER WITH 3-STATE OUTPUTS MONOLITHIC SILICON.pdf

1、 REVISIONSLTR DESCRIPTION DATE APPROVEDA Update boilerplate paragraphs to current requirements. - PHN 11-02-01 David J. Corbett CURRENT DESIGN ACTIVITY CAGE CODE 16236 HAS CHANGED NAMES TO: DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 Prepared in accordance with ASME Y14.24 Vendor item drawing RE

2、V PAGE REV PAGE REV STATUS OF PAGES REV A A A A A A A A A PAGE 1 2 3 4 5 6 7 8 9 PMIC N/A PREPARED BY Charles F. Saffle DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 Original date of drawing CHECKED BY Charles F. Saffle TITLE MICROCIRCUIT, DIGITAL, ADVANCED BIPOLAR CMOS, OCTAL BUFFER/DRIV

3、ER WITH 3-STATE OUTPUTS, MONOLITHIC SILICON YY-MM-DD 04-04-12 APPROVED BY Thomas M. Hess SIZE A CODE IDENT. NO. 16236 DWG NO. V62/04700 REV A PAGE 1 OF 9 AMSC N/A 5962-V033-11 .Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, CO

4、LUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04700 REV A PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance octal buffer/driver with 3-state outputs microcircuit, with an operating temperature range of -40C to +85C. 1.2 Vendor Item Drawi

5、ng Administrative Control Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/04700 - 01 X E Drawing Device type Case outline Lead finish number (See 1.2.1) (S

6、ee 1.2.2) (See 1.2.3) 1.2.1 Device type(s). Device type Generic Circuit function 01 SN74ABT541B-EP Octal buffer/driver with 3-state outputs 1.2.2 Case outlines. The case outlines are as specified herein. Outline letter Number of pins JEDEC PUB 95 Package style X 20 MO-153 Plastic small-outline1.2.3

7、Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacturer: Finish designator Material A Hot solder dip B Tin-lead plateC Gold plateD PalladiumE Gold flash palladium Z Other 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) . -0.5

8、V to 7 V Input voltage range (VI) . -0.5 V to 7 V 2/ Voltage range applied to any output in the high or power-off state (VO) . -0.5 V to 5.5 V Current into any output in the low state (IO) . 128 mA Input clamp current (IIK) (VI 0) -18 mA Output clamp current (IOK) (VO 0) . -50 mA Package thermal imp

9、edance (JA) . 128C/W 3/ Storage temperature range (TSTG) . -65C to 150C _ 1/ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those ind

10、icated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2/ The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 3/ The packag

11、e thermal impedance is calculated in accordance with JESD 51-7. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04700 REV A PAGE 3 1.4 Recommended operating condit

12、ions. 4/ 5/ Supply voltage range (VCC) . 4.5 V to 5.5 V Minimum high level input voltage (VIH) 2.0 V Maximum low level input voltage (VIL) . 0.8 V Maximum high level output current (IOH) . -32 mA Maximum low level output current (IOL) . 64 mA Operating free-air temperature range (TA) -40C to +85C 2.

13、 APPLICABLE DOCUMENTS JEDEC PUB 95 - Registered and Standard Outlines for Semiconductor Devices JEDEC STD 51-7 - High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages (Applications for copies should be addressed to the Electronic Industries Alliance, 3103 North 10thSt., Su

14、ite 240-S, Arlington, VA 22201-2107 or online at http:/www.jedec.org) 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code, or logo B. Pin 1 identifier C. ESDS identificat

15、ion (optional) 3.2 Unit container. The unit container shall be marked with the manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3,

16、1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outline. The case outline shall be as shown in 1.2.2 and figure 1. 3.5.2 Truth table. The truth table shall be as shown in fi

17、gure 2. 3.5.3 Logic diagram. The logic diagram shall be as shown in figure 3. 3.5.4 Terminal connections. The terminal connections shall be as shown in figure 4. 3.5.5 Test circuit and timing waveforms. The test circuit and timing waveforms shall be as shown in figure 5. 4/ All unused inputs of the

18、device must be held at VCCor GND to ensure proper device operation. 5/ Use of this product beyond the manufacturers design rules or stated parameters is done at the users risk. The manufacturer and/or distributor maintain no responsibility or liability for product used beyond the stated limits. Prov

19、ided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04700 REV A PAGE 4 TABLE I. Electrical performance characteristics. 1/ Test Symbol Conditions VCCTemperature, TADevice

20、type Limits Unit Min Max Input clamp voltage VIKII= -18 mA 4.5 V 25C, -40C to 85C All -1.2 V High level output voltage VOHIOH= -3 mA 4.5 V 2.5 V IOH= -3 mA 5 V 3 IOH= -32 mA 4.5 V 2 Low level output voltage VOLIOL= 64 mA 4.5 V 0.55 V Hysteresis voltage Vhys5 V 25C 100 TYP mV Input current IIVI= VCCo

21、r GND 5.5 V 25C, -40C to 85C 1 A 3-state output current power-up IOZPUVO= 0.5 V to 2.7 V OE = dont care 0 V to 2.1 V 50 A 3-state output current power-down IOZPDVO= 0.5 V to 2.7 V OE = dont care 2.1 V to 0 V 50 A 3-state output current high IOZHVO= 2.7 V 5.5 V 10 A 3-state output current low IOZLVO=

22、 0.5 V 5.5 V -10 A Input/output power-off leakage current IoffVIor VO 4.5 V 0 V 100 A Output high leakage current ICEXOutputs high VO= 5.5 V 5.5 V 50 A Output current IO2/ VO= 2.5 V 5.5 V -50 180 A Quiescent supply current ICCOutputs high. VI= VCCor GND, IO= 0 A 5.5 V 250 A Outputs low. VI= VCCor GN

23、D, IO= 0 A 30 mA Outputs disabled. VI= VCCor GND, IO= 0 A 250 A Quiescent supply current delta ICC3/ Outputs enabled. One input at 3.4 V, Other inputs at VCCor GND 5.5 V 25C, -40C to 85C 1.5 mA Outputs disabled. One input at 3.4 V, Other inputs at VCCor GND 50 A Control inputs. One input at 3.4 V, O

24、ther inputs at VCCor GND 1.5 mA See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04700 REV A PAGE 5 TABLE I. Electrical performance c

25、haracteristics - Continued. 1/ Test Symbol Conditions VCCTemperature, TADevice type Limits Unit Min Max Input capacitance CiVI= 2.5 V or 0.5 V 5 V 25C All 3 TYP pF Output capacitance COVO= 2.5 V or 0.5 V 5 V 6 TYP pF Propagation delay time, A to Y tPLHCL= 50 pF See figure 5. 5 V 25C 1 3.2 ns 4.5 V t

26、o 5.5 V -40C to 85C 1 3.6 tPHL5 V 25C 1 3.5 4.5 V to 5.5 V -40C to 85C 1 3.9 Propagation delay time, output enable, OE to Y tPZHCL= 50 pF See figure 5. 5 V 25C 2 4.5 ns 4.5 V to 5.5 V -40C to 85C 2 4 tPZL5 V 25C 1.9 5.1 4.5 V to 5.5 V -40C to 85C 1.9 5.9 Propagation delay time, output disable, OE to

27、 Y tPHZCL= 50 pF See figure 5. 5 V 25C 2.2 5.4 ns 4.5 V to 5.5 V -40C to 85C 2.2 5.8 tPLZ5 V 25C 1.5 4 4.5 V to 5.5 V -40C to 85C 1.5 4.4 Output skew tsk(o)4/ CL= 50 pF 5 V 25C 0.5 ns 4.5 V to 5.5 V -40C to 85C 0.5 1/ Testing and other quality control techniques are used to the extent deemed necessa

28、ry to assure product performance over the specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In the absence of specific parametric testing, product performance is assured by characterization and/or de

29、sign. 2/ Not more than one output should be tested at a time, and the duration of the test should not exceed one second. 3/ This is the increase in supply current for each input that is at the specified TTL voltage level, rather than VCCor GND. 4/ Skew between any two outputs of the same package swi

30、tching in the same direction. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04700 REV A PAGE 6 Case X Dimensions Symbol Millimeters Inches Symbol Millimeters Inc

31、hes Min Max Min Max Min Max Min Max A - 1.20 - .047 E 4.30 4.50 .169 .177 A1 0.05 0.15 .002 .006 E1 6.20 6.60 .244 .260 b 0.19 0.30 .007 .012 e 0.65 BSC .026 BSC c 0.15 NOM .006 NOM L 0.50 0.75 .020 .030 D 6.40 6.60 .252 .260 NOTES: 1. All linear dimensions are in millimeters (inches). 2. This case

32、outline is subject to change without notice. 3. Body dimensions do not include mold flash or protrusion, not to exceed 0.15 millimeters (0.006 in). 4. Fall within JEDEC MO-153. FIGURE 1. Case outline. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-D

33、EFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04700 REV A PAGE 7 Inputs Output OE1 OE2 A Y L L L L L L H H H X X Z X H X Z H = High voltage level X = Immaterial L = Low voltage level Z = High-impedance state FIGURE 2. Truth table. FIGURE 3. Logic diagram. Devi

34、ce type 01 Case outlines: X Terminal number Terminal symbol Terminal number Terminal symbol 1 OE1 11 Y8 2 A1 12 Y7 3 A2 13 Y6 4 A3 14 Y5 5 A4 15 Y4 6 A5 16 Y3 7 A6 17 Y2 8 A7 18 Y1 9 A8 19 OE2 10 GND 20 VCCFIGURE 4. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking per

35、mitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04700 REV A PAGE 8 NOTES: 1. CLincludes probe and jig capacitance. 2. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by th

36、e output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. 3. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO= 50 , tr 2.5 ns, and tf 2.5 ns. 4. The outputs are measu

37、red one at a time with one input transition per measurement. FIGURE 5. Test circuit and timing waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04700 REV

38、 A PAGE 9 4. VERIFICATION 4.1 Product assurance requirements. The manufacturer is responsible for performing all inspection and test requirements as indicated in their internal documentation. Such procedures should include proper handling of electrostatic sensitive devices, classification, packaging

39、, and labeling of moisture sensitive devices, as applicable. 5. PREPARATION FOR DELIVERY 5.1 Packaging. Preservation, packaging, labeling, and marking shall be in accordance with the manufacturers standard commercial practices for electrostatic discharge sensitive devices. 6. NOTES 6.1 ESDS. Devices

40、 are electrostatic discharge sensitive and are classified as ESDS class 1 minimum. 6.2 Configuration control. The data contained herein is based on the salient characteristics of the device manufacturers data book. The device manufacturer reserves the right to make changes without notice. This drawi

41、ng will be modified as changes are provided. 6.3 Suggested source(s) of supply. Identification of the suggested source(s) of supply herein is not to be construed as a guarantee of present or continued availability as a source of supply for the item. Vendor item drawing administrative control number

42、1/ Device manufacturer CAGE code Vendor part number Top side marking V62/04700-01XE 01295 SN74ABT541BIPWREP ABT541EP 1/ The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation. CAGE code Source of supply 01295 Texas Instruments, Inc. Semiconductor Group8505 Forest Lane P.O. Box 660199 Dallas, TX 75243 Point of contact: U.S. Highway 75 South P.O. Box 84, M/S 853 Sherman, TX 75090-9493 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-