ImageVerifierCode 换一换
格式:PDF , 页数:10 ,大小:140.23KB ,
资源ID:689184      下载积分:10000 积分
快捷下载
登录下载
邮箱/手机:
温馨提示:
如需开发票,请勿充值!快捷下载时,用户名和密码都是您填写的邮箱或者手机号,方便查询和重复下载(系统自动生成)。
如填写123,账号就是123,密码也是123。
特别说明:
请自助下载,系统不会自动发送文件的哦; 如果您已付费,想二次下载,请登录后访问:我的下载记录
支付方式: 支付宝扫码支付 微信扫码支付   
注意:如需开发票,请勿充值!
验证码:   换一换

加入VIP,免费下载
 

温馨提示:由于个人手机设置不同,如果发现不能下载,请复制以下地址【http://www.mydoc123.com/d-689184.html】到电脑端继续下载(重复下载不扣费)。

已注册用户请登录:
账号:
密码:
验证码:   换一换
  忘记密码?
三方登录: 微信登录  

下载须知

1: 本站所有资源如无特殊说明,都需要本地电脑安装OFFICE2007和PDF阅读器。
2: 试题试卷类文档,如果标题没有明确说明有答案则都视为没有答案,请知晓。
3: 文件的所有权益归上传用户所有。
4. 未经权益所有人同意不得将文件中的内容挪作商业或盈利用途。
5. 本站仅提供交流平台,并不能对任何下载内容负责。
6. 下载文件中如有侵权或不适当内容,请与我们联系,我们立即纠正。
7. 本站不保证下载资源的准确性、安全性和完整性, 同时也不承担用户因使用这些下载资源对自己和他人造成任何形式的伤害或损失。

版权提示 | 免责声明

本文(DLA DSCC-VID-V62 04737 REV A-2011 MICROCIRCUIT DIGITAL OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS MONOLITHIC SILICON.pdf)为本站会员(twoload295)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA DSCC-VID-V62 04737 REV A-2011 MICROCIRCUIT DIGITAL OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE APPROVED A Update boilerplate paragraphs to current requirements. - PHN 11-09-16 Thomas M. Hess CURRENT DESIGN ACTIVITY CAGE CODE 16236 HAS CHANGED NAMES TO: DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 Prepared in accordance with ASME Y14.24 Vendor item drawing RE

2、V PAGE REV PAGE REV STATUS OF PAGES REV A A A A A A A A A A PAGE 1 2 3 4 5 6 7 8 9 10 PMIC N/A PREPARED BY Phu H. Nguyen DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO 43218-3990 Original date of drawing CHECKED BY Phu H. Nguyen TITLE MICROCIRCUIT, DIGITAL, OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

3、, MONOLITHIC SILICON YY MM DD 04-07-08 APPROVED BY Thomas M. Hess SIZE A CODE IDENT. NO. 16236 DWG NO. V62/04737 REV A PAGE 1 OF 10 AMSC N/A 5962-V078-11 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO S

4、IZE A CODE IDENT NO. 16236 DWG NO. V62/04737 REV A PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance octal bus transceiver with 3-state outputs microcircuit, with an operating temperature range of -40C to +85C. 1.2 Vendor Item Drawing Administrative Con

5、trol Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/04737 - 01 X E Drawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3)

6、 1.2.1 Device type(s). Device type Generic Circuit function 01 SN74LVC245A-EP Octal bus transceiver with 3-state outputs. 1.2.2 Case outline(s). The case outlines are as specified herein. Outline letter Number of pins JEDEC PUB 95 Package style X 20 JEDEC MO-153 Plastic small outline package 1.2.3 L

7、ead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacturer: Finish designator Material A Hot solder dip B Tin-lead plate C Gold plate D Palladium E Gold flash palladium Z Other 1.3 Absolute maximum ratings. 1/ Supply voltage range, (VCC) . -0

8、.5 V to +6.5 V Input voltage range, (VI) . -0.5 V to +6.5 V 2/ Voltage range applied to any output in the high impedance or power-off stage, (VO) -0.5 V to +6.5 V 2/ Voltage range applied to any output in the high or slow state, (VO) . -0.5 V to VCC+ 0.5 V 2/ 3/ Input clamp current, (IIK) (VI 0) -50

9、 mA Output clamp current, (IOK) (VO 0) . -50 mA Continuous output current, (IO) . 50 mA Continuous current through VCCor GND 100 mA Package thermal impedance (JA) 83C/W 4/ Storage temperature range, (TSTG) -65C to +150C 1/ Stresses beyond those listed under “absolute maximum rating” may cause perman

10、ent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliab

11、ility. 2/ The input and output negative voltage ratings may exceeded if the input and output current ratings are observed. 3/ The value of VCCis provided in the recommended operating conditions table. 4/ The package thermal impedance is calculated in accordance with JESD 51-7. Provided by IHSNot for

12、 ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04737 REV A PAGE 3 1.4 Recommended operating conditions. 5/ TA= 25C -40C to +85C Unit Min Max Min Max Supply voltage, (VCC) Operating 1.6

13、5 3.6 1.65 3.6 V Data retention only 1.5 1.5 High level input voltage, (VIH) VCC= 1.65 V to 1.95 V 0.65 x VCC0.65 x VCCVCC= 2.3 V to 2.7 V 1.7 1.7 VCC= 2.7 V to 3.6 V 2 2 Low level input voltage, (VIL) VCC= 1.65 V to 1.95 V 0.35 x VCC0.35 x VCCVCC= 2.3 V to 2.7 V 0.7 0.7 VCC= 2.7 V to 3.6 V 0.8 0.8

14、Input voltage, (VI) 0 5.5 0 5.5 Output voltage, (VO) 0 VCC0 VCCHigh level output current, (IOH) VCC= 1.65 -4 -4 mA VCC= 2.3 V -8 -8 VCC= 2.7 V -12 -12 VCC= 3 V -24 -24 Low level output current, (IOL) VCC= 1.65 4 4 VCC= 2.3 V 8 8 VCC= 2.7 V 12 12 VCC= 3 V 24 24 Input transition rise or fall rate, (t/

15、v) 10 10 ns/V 2. APPLICABLE DOCUMENTS JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JEDEC PUB 95 Registered and Standard Outlines for Semiconductor Devices (Copies of these documents are available online at http:/www.jedec.org or from JEDEC Solid State Technology Association, 3103 North 10th Stre

16、et, Suite 240S, Arlington, VA 22201.) 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code, or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit containe

17、r. The unit container shall be marked with the manufacturers part number and with items A and C (if applicable) above. 5/ All unused inputs of the device must be held at VCCor GND to ensure proper device operation. Provided by IHSNot for ResaleNo reproduction or networking permitted without license

18、from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04737 REV A PAGE 4 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Des

19、ign, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outline(s). The case outline(s) shall be as shown in 1.2.2 and figure 1. 3.5.2 Terminal connections. The terminal connections shall be as shown in figure 2.

20、3.5.3 Logic diagram. The logic diagram shall be as shown in figure 3. 3.5.4 Function table. The function table shall be as shown in figure 4. 3.5.5 Load circuit and voltage waveforms. The load circuit and timing waveforms shall be as specified in figure 5. Provided by IHSNot for ResaleNo reproductio

21、n or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04737 REV A PAGE 5 TABLE I. Electrical performance characteristics. 1/ Test Symbol Conditions unless otherwise specified VCCTA= 25C -40C to +85C Unit Min Max

22、Min Max High level output voltage VOHIOH= -100 A 1.65 V to 5.5 V VCC 0.2 VCC 0.2 V IOH= -4 mA 1.65 V 1.29 1.2 IOH= -8 mA 2.3 V 1.9 1.7 IOH= -12 mA 2.7 V 2.2 2.2 3 V 2.4 2.4 IOH= -24 mA 3 V 2.3 2.2 Low level output voltage VOLIOL= 100 A 1.65 V to 5.5 V 0.1 0.2 IOL= 4 mA 1.65 V 0.24 0.45 IOL= 8 mA 2.3

23、 V 0.3 0.7 IOL= 12 mA 2.7 V 0.4 0.4 IOL= 24 mA 3 V 0.55 0.55 Input current Control inputs IIVI= 0 to 5.5 V 3.6 V 1 5 A Input/output power off leakage current IoffVIor VO= 5.5 V 0 1 10 A High impedance state output current IOZ 2/ VO= 0 to 5.5 V 3.6 V 1 10 A Quiescent supply current ICCVI= 5.5 V or GN

24、D IO= 0 3.6 V 1 10 A 3.6 V VI 5.5 V 3/ 1 10 A Quiescent supply current delta ICCOne input at VCC 0.6 V, Other inputs at VCCor GND 2.7 V to 3.6 V 500 500 A Input capacitance Control inputs CiVI= VCCor GND, 3.3 V 4 Typ pF Input/output capacitance A or B ports CiO3.3 V 5.5 Typ Propagation delay time fr

25、om input A or B to output B or A tpd1.8 V 0.15 V 1 12.2 1 12.7 ns 2.5 V 0.2 V 1 7.8 1 8.3 2.7 V 1 7.1 1 7.3 3.3 V 0.3 V 1.5 6.1 1.5 6.3 Enable time from input OE to output A or B ten1.8 V 0.15 V 1 14.8 1 15.3 2.5 V 0.2 V 1 10 1 10.5 2.7 V 1 9.3 1 9.5 3.3 V 0.3 V 1.5 8.3 1.5 8.5 See footnote at end o

26、f the table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04737 REV A PAGE 6 TABLE I. Electrical performance characteristics - Continued. 1/ Test Symbol Conditi

27、ons unless otherwise specified VCCTA= 25C -40C to +85C Unit Min Max Min Max Disable time from input OE to output A or B tdis1.8 V 0.15 V 1 16.5 1 17 ns 2.5 V 0.2 V 1 9 1 9.5 2.7 V 1 8.3 1 8.5 3.3 V 0.3 V 1.7 7.3 1.7 7.5 Outputs skew time tsk(o)3.3 V 0.3 V 1 Power dissipation capacitance per transcei

28、ver Cpdf = 10 MHz Outputs enabled 1.8 V 42 Typ pF 2.5 V 43 Typ 3.3 V 45 Typ Outputs disabled 1.8 V 1 Typ 2.5 V 1 Typ 3.3 V 2 Typ 1. Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over the specified temperature range. Product may not

29、 necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In the absence of specific parametric testing, product performance is assured by characterization and/or design. 2. For I/O ports, the parameter IOZ includes the input leakage current. 3. This

30、applies in the disabled state only. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04737 REV A PAGE 7 Case X Dimensions Symbol Inches Millimeters Symbol Inches Mi

31、llimeters Min Max Min Max Min Max Min Max A .047 1.20 E .168 .176 4.30 4.50 A1 .000 .006 0.05 0.15 E1 .242 .258 6.20 6.60 b .007 .012 0.19 0.30 e .025 BSC 0.65 BSC c .006 NOM 0.15 NOM L .020 .029 0.50 0.75 D .250 .258 6.40 6.60 NOTES: 1. All linear dimensions are in millimeters. 2. This drawing is s

32、ubject to change without notice. 3. Body dimensions do not include mold flash or protrusion not to exceed 0.15. 4. Fall within JEDEC MO-153. FIGURE 1. Case outlines. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLU

33、MBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04737 REV A PAGE 8 Pin No. Signal name Pin No. Signal name 1 DIR 11 B8 2 A1 12 B7 3 A2 13 B6 4 A3 14 B5 5 A4 15 B4 6 A5 16 B3 7 A6 17 B2 8 A7 18 B1 9 A8 19 OE 10 GND 20 VCCFIGURE 2. Terminal connections. FIGURE 3. Logic diagram. Inputs Operation OE

34、DIR L L B data to A bus L H A data to B bus H X Isolation FIGURE 4. Function Table Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04737 REV A PAGE 9 Notes: 1. CLi

35、ncludes probe and test fixture capacitance. 2. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.

36、3. All input pulses are supplied by generators having following characteristics: PRR 10 MHz, ZO= 50 . 4. The outputs are measured one at a time with one transition per measurement. 5. tPLZand tPHZare the same tdis. 6. tPZLand tPZHare the same ten. 7. tPLHand tPHLare the same tpd. 8. All parameters a

37、nd waveforms are not applicable to all devices. FIGURE 5. Load circuit and voltage waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04737 REV A PAGE 10 4

38、. VERIFICATION 4.1 Product assurance requirements. The manufacturer is responsible for performing all inspection and test requirements as indicated in their internal documentation. Such procedures should include proper handling of electrostatic sensitive devices, classification, packaging, and label

39、ing of moisture sensitive devices, as applicable. 5. PREPARATION FOR DELIVERY 5.1 Packaging. Preservation, packaging, labeling, and marking shall be in accordance with the manufacturers standard commercial practices for electrostatic discharge sensitive devices. 6. NOTES 6.1 ESDS. Devices are electr

40、ostatic discharge sensitive and are classified as ESDS class 1 minimum. 6.2 Configuration control. The data contained herein is based on the salient characteristics of the device manufacturers data book. The device manufacturer reserves the right to make changes without notice. This drawing will be

41、modified as changes are provided. 6.3 Suggested source(s) of supply. Identification of the suggested source(s) of supply herein is not to be construed as a guarantee of present or continued availability as a source of supply for the item. Vendor item drawing administrative control number 1/ Device m

42、anufacturer CAGE code Vendor part number Top side marking V62/04737-01XE 01295 SN74LVC245AIPWREP C245AEP 1/ The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation. CAGE code Source of supply 01295 Texas Instruments, Inc. Semiconductor Group 8505 Forest Lane P.O. Box 660199 Dallas, TX 75243 Point of contact: U.S. Highway 75 South P.O. Box 84, M/S 853 Sherman, TX 75090-9493 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-

copyright@ 2008-2019 麦多课文库(www.mydoc123.com)网站版权所有
备案/许可证编号:苏ICP备17064731号-1