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本文(DLA DSCC-VID-V62 04760 REV A-2011 MICROCIRCUIT DIGITAL ADVANCED CMOS OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS MONOLITHIC SILICON.pdf)为本站会员(proposalcash356)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA DSCC-VID-V62 04760 REV A-2011 MICROCIRCUIT DIGITAL ADVANCED CMOS OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE APPROVED A Update boilerplate paragraphs to current requirements. - PHN 11-09-19 Thomas M. Hess CURRENT DESIGN ACTIVITY CAGE CODE 16236 HAS CHANGED NAMES TO: DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 Prepared in accordance with ASME Y14.24 Vendor item drawing RE

2、V PAGE REV PAGE REV STATUS OF PAGES REV A A A A A A A A A A PAGE 1 2 3 4 5 6 7 8 9 10 PMIC N/A PREPARED BY Charles F. Saffle DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO 43218-3990 Original date of drawing CHECKED BY Charles F. Saffle TITLE MICROCIRCUIT, DIGITAL, ADVANCED CMOS, OCTAL BUS TRANSCEIV

3、ER WITH 3-STATE OUTPUTS, MONOLITHIC SILICON YY-MM-DD 04-12-09 APPROVED BY Thomas M. Hess SIZE A CODE IDENT. NO. 16236 DWG NO. V62/04760 REV A PAGE 1 OF 10 AMSC N/A 5962-V086-11 Provided by IHSNot for Resale-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04

4、760 REV A PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance octal bus transceiver with 3-state outputs microcircuit, with an operating temperature range of -40C to +85C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturers PIN is the

5、 item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/04760 - 01 X E Drawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s). Device type Generi

6、c Circuit function 01 SN74AC245-EP Octal bus transceiver with 3-state outputs 1.2.2 Case outline(s). The case outline(s) are as specified herein. Outline letter Number of pins JEDEC PUB 95 Package style X 20 JEDEC MS-013 Plastic small-outline 1.2.3 Lead finishes. The lead finishes are as specified b

7、elow or other lead finishes as provided by the device manufacturer: Finish designator Material A Hot solder dip B Tin-lead plate C Gold plate D Palladium E Gold flash palladium Z Other 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) . -0.5 V to 7 V Input voltage range (VI) . -0.5 V to VC

8、C+ 0.5 V 2/ Output voltage range (VO) . -0.5 V to VCC+ 0.5 V 2/ Input clamp current (IIK) (VIVCC) 20 mA Output clamp current (IOK) (VOVCC) 20 mA Continuous output current (IO) (VO= 0 to VCC) 50 mA Continuous current through VCCor GND . 200 mA Package thermal impedance (JA) . 58C/W 3/ Storage tempera

9、ture range (TSTG) . -65C to +150C 1/ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating cond

10、itions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2/ The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 3/ The package thermal impedance is calculated in accordance with JE

11、SD 51-7. Provided by IHSNot for Resale-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04760 REV A PAGE 3 1.4 Recommended operating conditions. 4/ Supply voltage range (VCC) . 2 V to 6 V Minimum high-level input voltage (VIH): VCC= 3 V . 2.1 V VCC= 4.5 V 3.

12、15 V VCC= 5.5 V 3.85 V Maximum low-level input voltage (VIL): VCC= 3 V . 0.9 V VCC= 4.5 V 1.35 V VCC= 5.5 V 1.65 V Input voltage range (VI) . 0 V to VCCOutput voltage range (VO) . 0 V to VCCMaximum high-level output current (IOH): VCC= 3 V . -12 mA VCC= 4.5 V -24 mA VCC= 5.5 V -24 mA Maximum low-lev

13、el output current (IOL): VCC= 3 V . 12 mA VCC= 4.5 V 24 mA VCC= 5.5 V 24 mA Maximum input transition rise or fall rate (t/v) . 8 ns/V Operating free-air temperature range (TA) -40C to +85C 2. APPLICABLE DOCUMENTS JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JEDEC PUB 95 Registered and Standard O

14、utlines for Semiconductor Devices JEDEC STD 51-7 High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages (Copies of these documents are available online at http:/www.jedec.org or from JEDEC Solid State Technology Association, 3103 North 10th Street, Suite 240S, Arlington, VA

15、 22201.) 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code, or logo B. Pin 1 identifier C. ESDS identification (optional) 4/ All unused inputs of the device must be hel

16、d at VCCor GND to ensure proper device operation. Provided by IHSNot for Resale-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04760 REV A PAGE 4 3.2 Unit container. The unit container shall be marked with the manufacturers part number and with items A and

17、 C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions

18、are as specified herein. 3.5 Diagrams. 3.5.1 Case outline. The case outline shall be as shown in 1.2.2 and figure 1. 3.5.2 Function table. The function table shall be as shown in figure 2. 3.5.3 Logic diagram. The logic diagram shall be as shown in figure 3. 3.5.4 Terminal connections. The terminal

19、connections shall be as shown in figure 4. 3.5.5 Timing waveforms and test circuit. The timing waveforms and test circuit shall be as shown in figure 5. Provided by IHSNot for Resale-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04760 REV A PAGE 5 TABLE I

20、. Electrical performance characteristics. 1/ Test Symbol Conditions VCCTemperature, TALimits Unit Min Max High level output voltage VOHIOH= -50 A 3 V 25C, -40C to 85C 2.9 V 4.5 V 4.4 5.5 V 5.4 IOH= -12 mA 3 V 25C 2.56 -40C to 85C 2.46 IOH= -24 mA 4.5 V 25C 3.86 -40C to 85C 3.76 5.5 V 25C 4.86 -40C t

21、o 85C 4.76 IOH= -75 mA 2/ 5.5 V -40C to 85C 3.85 Low level output voltage VOLIOL= 50 A 3 V 25C, -40C to 85C 0.1 V 4.5 V 0.1 5.5 V 0.1 IOL= 12 mA 3 V 25C 0.36 -40C to 85C 0.44 IOL= 24 mA 4.5 V 25C 0.36 -40C to 85C 0.44 5.5 V 25C 0.36 -40C to 85C 0.44 IOL= 75 mA 2/ 5.5 V -40C to 85C 1.65 Input current

22、 IIA or B ports 3/ VI= VCCor GND 5.5 V 25C 0.1 A -40C to 85C 1 OE or DIR VI= VCCor GND 5.5 V 25C 0.1 -40C to 85C 1 Off-state output current IOZVO= VCCor GND VI(OE) = VILor VIH5.5 V 25C 0.5 A -40C to 85C 5 Quiescent supply current ICCVI= VCCor GND IO= 0 A 5.5 V 25C 4 A -40C to 85C 40 Input capacitanc

23、e CIVI= VCCor GND 5 V 25C 4.5 TYP pF Input/output capacitance CIOVO= VCCor GND 5 V 25C 15 TYP Power dissipation capacitance per transceiver CpdCL= 50 pF f = 1 MHz 5 V 25C 45 TYP Propagation delay time, A or B to B or A tPLHCL= 50 pF See figure 5. 3 V and 3.6 V 25C 1.5 8.5 -40C to 85C 1 9 4.5 V and 5

24、.5 V 25C 1.5 6.5 -40C to 85C 1 7 tPHL3 V and 3.6 V 25C 1.5 8.5 -40C to 85C 1 9 4.5 V and 5.5 V 25C 1.5 6 -40C to 85C 1 7 See footnotes at end of table. Provided by IHSNot for Resale-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04760 REV A PAGE 6 TABLE I.

25、 Electrical performance characteristics - Continued. 1/ Test Symbol Conditions VCCTemperature, TALimits Unit Min Max Propagation delay time, output enable, OE to A or B tPZHCL= 50 pF See figure 5. 3 V and 3.6 V 25C 2.5 11.5 ns -40C to 85C 2 12.5 4.5 V and 5.5 V 25C 1.5 8.5 -40C to 85C 1 9 tPZL3 V an

26、d 3.6 V 25C 2.5 12 -40C to 85C 2 13.5 4.5 V and 5.5 V 25C 1.5 9 -40C to 85C 1 9.5 Propagation delay time output disable, OE to A or B tPHZ3 V and 3.6 V 25C 2 12 ns -40C to 85C 1 12.5 4.5 V and 5.5 V 25C 1.5 9 -40C to 85C 1 10 tPLZ3 V and 3.6 V 25C 2 11.5 -40C to 85C 1.5 13 4.5 V and 5.5 V 25C 1.5 9

27、-40C to 85C 1 10 1/ Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over the specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In th

28、e absence of specific parametric testing, product performance is assured by characterization and/or design. 2/ Not more than one output should be tested at a time, and the duration of the test should not exceed 2 ms. 3/ For I/O ports, the parameter IOZincludes the input leakage current. Provided by

29、IHSNot for Resale-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04760 REV A PAGE 7 Case X Dimensions Symbol Inches Millimeters Symbol Inches Millimeters Min Max Min Max Min Max Min Max A - .104 - 2.65 E .291 .299 7.40 7.60 A1 .004 .012 0.10 0.30 E1 .393 .

30、419 9.97 10.63 b .012 .020 0.31 0.51 e .050 BSC 1.27 BSC c .008 .013 0.20 0.33 L .016 .050 0.40 1.27 D .4896 .512 12.60 13.00 NOTES: 1. This drawing is subject to change without notice. 2. Falls within JEDEC MS-013. 3. All linear dimensions are shown in inches (millimeters). Millimeters equivalents

31、are given for general information only. 4. Body dimensions do not include mold flash or protrusion not to exceed 0.006 inches (0.15 millimeters). FIGURE 1. Case outline. Provided by IHSNot for Resale-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04760 REV

32、 A PAGE 8 Inputs Operation OE DIR L L H L H X B data to A bus A data to B bus Isolation H = High voltage level L = Low voltage level X = Immaterial FIGURE 2. Function table. FIGURE 3. Logic diagram. Device type 01 Case outline X Terminal number Terminal symbol Terminal number Terminal symbol 1 DIR 1

33、1 B8 2 A1 12 B7 3 A2 13 B6 4 A3 14 B5 5 A4 15 B4 6 A5 16 B3 7 A6 17 B2 8 A7 18 B1 9 A8 19 OE10 GND 20 VCCFIGURE 4. Terminal connections. Provided by IHSNot for Resale-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04760 REV A PAGE 9 NOTES: 1. CLincludes pr

34、obe and jig capacitance. 2. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. 3. All input pulses

35、 are supplied by generators having the following characteristics: PRR 1 MHz, ZO= 50, tr 2.5 ns, tf 2.5 ns 4. The outputs are measured one at a time, with one input transition per measurement. FIGURE 5. Timing waveforms and test circuit. Provided by IHSNot for Resale-,-,-DEFENSE SUPPLY CENTER, COLUMB

36、US COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04760 REV A PAGE 10 4. VERIFICATION 4.1 Product assurance requirements. The manufacturer is responsible for performing all inspection and test requirements as indicated in their internal documentation. Such procedures should include proper ha

37、ndling of electrostatic sensitive devices, classification, packaging, and labeling of moisture sensitive devices, as applicable. 5. PREPARATION FOR DELIVERY 5.1 Packaging. Preservation, packaging, labeling, and marking shall be in accordance with the manufacturers standard commercial practices for e

38、lectrostatic discharge sensitive devices. 6. NOTES 6.1 ESDS. Devices are electrostatic discharge sensitive and are classified as ESDS class 1 minimum. 6.2 Configuration control. The data contained herein is based on the salient characteristics of the device manufacturers data book. The device manufa

39、cturer reserves the right to make changes without notice. This drawing will be modified as changes are provided. 6.3 Suggested source(s) of supply. Identification of the suggested source(s) of supply herein is not to be construed as a guarantee of present or continued availability as a source of sup

40、ply for the item. Vendor item drawing administrative control number 1/ Device manufacturer CAGE code Vendor part number Top-Side Marking V62/04760-01XE 01295 SN74AC245IDWREP SAC245IEP 1/ The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation. CAGE code Source of supply 01295 Texas Instruments, Inc. Semiconductor Group 8505 Forest lane P.O. Box 660199 Dallas, TX 75243 Point of contact: U.S. Highway 75 South P.O. Box 84, M/S 853 Sherman, TX 75090-9493 Provided by IHSNot for Resale-,-,-

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