DLA DSCC-VID-V62 04761 REV A-2011 MICROCIRCUIT DIGITAL ADVANCED HIGH SPEED CMOS OCTAL BUFFER DRIVER WITH 3-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE APPROVED A Update boilerplate paragraphs to current requirements. - PHN 11-09-19 Thomas M. Hess CURRENT DESIGN ACTIVITY CAGE CODE 16236 HAS CHANGED NAMES TO: DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 Prepared in accordance with ASME Y14.24 Vendor item drawing RE

2、V PAGE REV PAGE REV STATUS OF PAGES REV A A A A A A A A A PAGE 1 2 3 4 5 6 7 8 9 PMIC N/A PREPARED BY Charles F. Saffle DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO 43218-3990 Original date of drawing CHECKED BY Charles F. Saffle TITLE MICROCIRCUIT, DIGITAL, ADVANCED HIGH SPEED CMOS, OCTAL BUFFER/

3、DRIVER, WITH 3-STATE OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON YY-MM-DD 04-12-09 APPROVED BY Thomas M. Hess SIZE A CODE IDENT. NO. 16236 DWG NO. V62/04761 REV A PAGE 1 OF 9 AMSC N/A 5962-V087-11 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-

4、,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04761 REV A PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance octal buffer/driver with 3-state outputs, TTL compatible inputs microcircuit, with an operating temper

5、ature range of -40C to +85C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/04761 - 01 X E Drawing Device t

6、ype Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s). Device type Generic Circuit function 01 SN74AHCT541-EP Octal buffer/driver with 3-state outputs, TTL compatible inputs 1.2.2 Case outline(s). The case outline(s) are as specified herein. Outline letter Numb

7、er of pins JEDEC PUB 95 Package style X 20 JEDEC MS-013 Plastic small-outline 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacturer: Finish designator Material A Hot solder dip B Tin-lead plate C Gold plate D Palladium E Gold flas

8、h palladium Z Other 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) . -0.5 V to 7 V Input voltage range (VI) . -0.5 V to 7 V 2/ Output voltage range (VO) . -0.5 V to VCC+ 0.5 V 2/ Input clamp current (IIK) (VIVCC) 20 mA Continuous output current (IO) (VO= 0 to VCC) 25 mA Continuous curre

9、nt through VCCor GND . 75 mA Package thermal impedance (JA) . 58C/W 3/ Storage temperature range (TSTG) . -65C to +150C 1/ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at

10、these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2/ The input and output voltage ratings may be exceeded if the input and output current rati

11、ngs are observed. 3/ The package thermal impedance is calculated in accordance with JESD 51-7. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04761 REV A PAGE 3 1

12、.4 Recommended operating conditions. 4/ Supply voltage range (VCC) . 4.5 V to 5.5 V Minimum high-level input voltage (VIH) 2 V Maximum low-level input voltage (VIL) . 0.8 V Input voltage range (VI) . 0 V to 5.5 V Output voltage range (VO) . 0 V to VCCMaximum high-level output current (IOH) . -8 mA M

13、aximum low-level output current (IOL) . 8 mA Maximum input transition rise or fall rate (t/v) . 20 ns/V Operating free-air temperature range (TA) -40C to +85C 2. APPLICABLE DOCUMENTS JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JEDEC PUB 95 Registered and Standard Outlines for Semiconductor Devi

14、ces JEDEC STD 51-7 High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages (Copies of these documents are available online at http:/www.jedec.org or from JEDEC Solid State Technology Association, 3103 North 10th Street, Suite 240S, Arlington, VA 22201.) 3. REQUIREMENTS 3.1 M

15、arking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code, or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturer

16、s part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, cons

17、truction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outline. The case outline shall be as shown in 1.2.2 and figure 1. 3.5.2 Function table. The function table shall be as shown in figure 2. 3.5.3 Logic diagram. The logic diagram shall be as shown in figure 3. 3.5.4 T

18、erminal connections. The terminal connections shall be as shown in figure 4. 3.5.5 Timing waveforms and test circuit. The timing waveforms and test circuit shall be as shown in figure 5. 4/ All unused inputs of the device must be held at VCCor GND to ensure proper device operation. Provided by IHSNo

19、t for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04761 REV A PAGE 4 TABLE I. Electrical performance characteristics. 1/ Test Symbol Conditions VCCTemperature, TALimits Unit Min Max

20、High level output voltage VOHIOH= -50 A 4.5 V 25C, -40C to 85C 4.4 V IOH= -8 mA 4.5 V 25C 3.94 -40C to 85C 3.8 Low level output voltage VOLIOL= 50 A 4.5 V 25C, -40C to 85C 0.1 V IOL= 8 mA 4.5 V 25C 0.36 -40C to 85C 0.44 Input current IIVI= 5.5 V or GND 0 V to 5.5 V 25C 0.1 A -40C to 85C 1 Off-state

21、output current IOZVO= VCCor GND 5.5 V 25C 0.25 A -40C to 85C 2.5 Quiescent supply current ICCVI= VCCor GND IO= 0 A 5.5 V 25C 4 A -40C to 85C 40 Quiescent supply current delta ICC2/ One input at 3.4 V, Other inputs at VCCor GND 5.5 V 25C 1.35 mA -40C to 85C 1.5 Input capacitance CIVI= VCCor GND 5 V 2

22、5C 2 TYP 3/ pF -40C to 85C 10 Output capacitance COVO= VCCor GND 5 V 25C 4 TYP pF Power dissipation capacitance CpdCL= 50 pF f = 1 MHz 5 V 25C 12 TYP pF Propagation delay time, A to Y tPLHCL= 15 pF See figure 5. 4.5 V and 5.5 V 25C 6 ns -40C to 85C 1 6.5 tPHL4.5 V and 5.5 V 25C 5.5 -40C to 85C 1 6.5

23、 tPLHCL= 50 pF See figure 5. 4.5 V and 5.5 V 25C 8.5 -40C to 85C 1 9.5 tPHL4.5 V and 5.5 V 25C 8.5 -40C to 85C 1 9.5 Propagation delay time, output enable, OE to Y tPZHCL= 15 pF See figure 5. 4.5 V and 5.5 V 25C 7 ns -40C to 85C 1 8 tPZL4.5 V and 5.5 V 25C 7 -40C to 85C 1 8 tPZHCL= 50 pF See figure

24、5. 4.5 V and 5.5 V 25C 10 -40C to 85C 1 12 tPZL4.5 V and 5.5 V 25C 10 -40C to 85C 1 12 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V

25、62/04761 REV A PAGE 5 TABLE I. Electrical performance characteristics - Continued. 1/ Test Symbol Conditions VCCTemperature, TALimits Unit Min Max Propagation delay time, output disable, OE to Y tPZHCL= 15 pF See figure 5. 4.5 V and 5.5 V 25C 7 ns -40C to 85C 1 8 tPZL4.5 V and 5.5 V 25C 7 -40C to 85

26、C 1 8 tPZHCL= 50 pF See figure 5. 4.5 V and 5.5 V 25C 10 -40C to 85C 1 12 tPZL4.5 V and 5.5 V 25C 10 -40C to 85C 1 12 Output skew time tsk(o)CL= 50 pF 4.5 V and 5.5 V 25C 1 ns -40C to 85C 1 1/ Testing and other quality control techniques are used to the extent deemed necessary to assure product perf

27、ormance over the specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In the absence of specific parametric testing, product performance is assured by characterization and/or design. 2/ This is the incr

28、ease in supply current for each input that is at one of the specified TTL voltage levels, rather than 0 V or VCC. 3/ The maximum limit is 10 pF. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A COD

29、E IDENT NO. 16236 DWG NO. V62/04761 REV A PAGE 6 Case X Dimensions Symbol Inches Millimeters Symbol Inches Millimeters Min Max Min Max Min Max Min Max A - .104 - 2.65 E .291 .299 7.40 7.60 A1 .004 .012 0.10 0.30 E1 .393 .419 9.97 10.63 b .012 .020 0.31 0.51 e .050 BSC 1.27 BSC c .008 .013 0.20 0.33

30、L .016 .050 0.40 1.27 D .496 .512 12.60 13.00 NOTES: 1. This drawing is subject to change without notice. 2. Falls within JEDEC MS-013. 3. All linear dimensions are shown in inches (millimeters). Millimeters equivalents are given for general information only. 4. Body dimensions do not include mold f

31、lash or protrusion not to exceed 0.006 inches (0.15 millimeters). FIGURE 1. Case outline. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04761 REV A PAGE 7 (each

32、buffer/driver) Inputs Output Y OE1 OE2 A L L H X L L X H L H X X L H Z Z H = High voltage level X = Immaterial L = Low voltage level Z = High impedance state FIGURE 2. Function table. FIGURE 3. Logic diagram. Device type 01 Case outline X Terminal number Terminal symbol Terminal number Terminal symb

33、ol 1 OE111 Y8 2 A1 12 Y7 3 A2 13 Y6 4 A3 14 Y5 5 A4 15 Y4 6 A5 16 Y3 7 A6 17 Y2 8 A7 18 Y1 9 A8 19 OE210 GND 20 VCCFIGURE 4. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A C

34、ODE IDENT NO. 16236 DWG NO. V62/04761 REV A PAGE 8 NOTES: 1. CLincludes probe and jig capacitance. 2. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the outpu

35、t is high, except when disabled by the output control. 3. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, ZO= 50, tr 3 ns, tf 3 ns. 4. The outputs are measured one at a time, with one input transition per measurement. FIGURE 5. Timing waveforms and test c

36、ircuit. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04761 REV A PAGE 9 4. VERIFICATION 4.1 Product assurance requirements. The manufacturer is responsible for

37、performing all inspection and test requirements as indicated in their internal documentation. Such procedures should include proper handling of electrostatic sensitive devices, classification, packaging, and labeling of moisture sensitive devices, as applicable. 5. PREPARATION FOR DELIVERY 5.1 Packa

38、ging. Preservation, packaging, labeling, and marking shall be in accordance with the manufacturers standard commercial practices for electrostatic discharge sensitive devices. 6. NOTES 6.1 ESDS. Devices are electrostatic discharge sensitive and are classified as ESDS class 1 minimum. 6.2 Configurati

39、on control. The data contained herein is based on the salient characteristics of the device manufacturers data book. The device manufacturer reserves the right to make changes without notice. This drawing will be modified as changes are provided. 6.3 Suggested source(s) of supply. Identification of

40、the suggested source(s) of supply herein is not to be construed as a guarantee of present or continued availability as a source of supply for the item. Vendor item drawing administrative control number 1/ Device manufacturer CAGE code Vendor part number Top-Side Marking V62/04761-01XE 01295 SN74AHCT

41、541IDWREP AHCT541EP 1/ The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation. CAGE code Source of supply 01295 Texas Instruments, Inc. Semiconductor Group 8505 Forest lane P.O. Box 660199 Dallas, TX 75243 Point of contact: U.S. Highway 75 South P.O. Box 84, M/S 853 Sherman, TX 75090-9493 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-