DLA DSCC-VID-V62 05606 REV B-2011 MICROCIRCUIT DIGITAL 8-BIT UNIVERSAL BUS TRANSCEIVER AND TWO 1-BIT BUS TRANSCEIVERS WITH SPLIT LVTTL PORT FEEDBACK PATH AND 3-STATE OUTPUTS MONOLI.pdf

1、 REVISIONS LTR DESCRIPTION DATE APPROVED A Correct lead finishes on last page. Update boilerplate. - CFS 05-12-02 Thomas M. Hess B Update boilerplate paragraphs to current requirements. - PHN 11-11-29 Thomas M. Hess CURRENT DESIGN ACTIVITY CAGE CODE 16236 HAS CHANGED NAMES TO: DLA LAND AND MARITIME

2、COLUMBUS, OHIO 43218-3990 Prepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV B B B B B B B B B B B B B B B B B PAGE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 PMIC N/A PREPARED BY Phu H. Nguyen DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990

3、 Original date of drawing CHECKED BY Phu H. Nguyen TITLE MICROCIRCUIT, DIGITAL, 8-BIT UNIVERSAL BUS TRANSCEIVER AND TWO 1-BIT BUS TRANSCEIVERS WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND 3-STATE OUTPUTS, MONOLITHIC SILICON YY MM DD 05-04-14 APPROVED BY Thomas M. Hess SIZE A CODE IDENT. NO. 16236 DWG N

4、O. V62/05606 REV B PAGE 1 OF 17 AMSC N/A 5962-V008-12 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/05606 REV B PAGE 2 1. SCOPE 1.1 Scope. This drawing documents

5、 the general requirements of a high performance 8-bit universal bus transceiver and two 1-bit bus transceivers with split LVTTL port, feedback path, and 3-state outputs microcircuit, with an operating temperature range of -40C to +85C. 1.2 Vendor Item Drawing Administrative Control Number. The manuf

6、acturers PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/05606 - 01 X E Drawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s).

7、 1/ Device type Generic Circuit function 01 SN74VMEH22501A-EP 8-bit universal bus transceiver and two 1-bit bus transceivers with split LVTTL port, feedback path, and 3-state outputs 1.2.2 Case outline(s). The case outline(s) are as specified herein. Outline letter Number of pins JEDEC PUB 95 Packag

8、e style X 48 JEDEC MO-153 Plastic small outline package Y 48 JEDEC MO-153 Plastic small outline package 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacturer: Finish designator Material A Hot solder dip B Tin-lead plate C Gold pla

9、te D Palladium E Gold flash palladium Z Other _ 1/ Users are cautioned to review the manufacturers data manual for additional user information relating to these devices. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS

10、COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/05606 REV B PAGE 3 1.3 Absolute maximum ratings. 2/ Supply voltage range (VCCand BIAS VCC) . -0.5 V to 4.6 V Input voltage range (VI) 3/ . -0.5 V to 7.0 V Voltage range applied to any output in the high impedance or power off state (VO) . -0.5 V

11、 to 7.0 V 3/ Voltage range applied to any output in the high or low state (VO) 3/ : 3A port or Y output . -0.5 V to VCC+0.5 V B port -0.5 V to 4.6 V Output current in the low state (IO): 3A port or Y output . 50 mA B port 100 mA Output current in the high state (IO): 3A port or Y output . -50 mA B p

12、ort -100 mA Input clamp current (IIK) (VIVCC) : B port -50 mA Package thermal impedance (JA): 4/ Case X 70C/W Case Y 58C/W Storage temperature range (TSTG) 5/ . -65C to 150C 1.4 Recommended operating conditions. 6/ 7/ _ 2/ Stresses beyond those listed under “absolute maximum rating” may cause perman

13、ent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “ recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device relia

14、bility. 3/ The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed. 4/ The package thermal impedance is calculated in accordance with JESD 51-7. 5/ Long term high temperature storage and/or extended used at maximum recommended operatin

15、g conditions may result in a reduction of overall device life. See manufacturer data for addition information on enhanced plastic packaging. 6/ All unused control inputs of the device must be held at VCCor GND to ensure proper device operation. Refer to manufacturer application report. 7/ Proper con

16、nection sequence for use of the B-port I/O precharger feature is GND and BIAS VCC= 3.3 V first, I/O second, and VCC = 3.3 V last, because the BIAS VCCprecharge circuitry is disabled when any VCCpin is connected. The control inputs can be connected anytime, but normally are connected during I/O stage

17、. If B port precharge is not required, any connection sequence is acceptable, but generally, GND is connected first. Min Max Unit Supply voltage, Vcc, BIAS VCC3.15 3.45 V Input voltage, VIControl inputs or A port 5.5 V B port 5.5 High level input voltage, VIHControl inputs or A port 2 t B port 0.5VC

18、C+ 50 mV Low level input voltage, VILControl inputs or A port 0.8 V B port 0.5VCC- 50 mV Input clamp current, IIK-18 mA High level output current, IOH3A port and Y output -12 mA B port -48 Low level output current, IOL3A port and Y output 12 mA B port 64 Input transaction rise or fall rate, t/v Outp

19、uts enabled 10 ns/V Power up ramp rate, t/VCC20 s/V Operating free air temperature, TA-40 85 C Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/05606 REV B PAGE 4 2

20、. APPLICABLE DOCUMENTS JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JEDEC PUB 95 Registered and Standard Outlines for Semiconductor Devices (Copies of these documents are available online at http:/www.jedec.org or from JEDEC Solid State Technology Association, 3103 North 10th Street, Suite 240S,

21、 Arlington, VA 22201.) 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code, or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. The unit con

22、tainer shall be marked with the manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, constructi

23、on, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outline(s). The case outline(s) shall be as shown in 1.2.2 and figure 1. 3.5.2 Terminal connections. The terminal connections shall be as shown in figure 2. 3.5.3 Function

24、table. The function table shall be as shown in figure 3. 3.5.4 Logic diagram. The logic diagram shall be as shown in figure 4. 3.5.5 Load circuit. The load circuit shall be as shown in figure 5. 3.5.6 Voltage waveforms. The voltage waveforms shall be as shown in figure 6. Provided by IHSNot for Resa

25、leNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/05606 REV B PAGE 5 TABLE I. Electrical performance characteristics. 1/ Test Symbol Test conditions Recommended operating conditions unless oth

26、erwise specified Limits Unit Min Max Operating free air temperature range for A and B ports Input clamp voltage VIKVCC = 3.15 V, II = -18 mA -1.2 V High level output voltage 3A port, any B port, and Y outputs VOHVCC= 3.15 V to 3.45 V IOH= -100 A VCC-0.2 V 3A port and Y outputs VCC= 3.15 V IOH= -6 mA

27、 2.4 IOH= -12 mA 2.0 Any B port IOH= -24 mA 2.4 IOH= -48 mA 2.0 Low level output voltage 3A port, any B port, and Y outputs VOLVCC= 3.15 V to 3.45 V IOH= 100 A 0.2 V 3A port and Y outputs VCC= 3.15 V IOH= 6 mA 0.55 IOH= 12 mA 0.8 Any B port IOH= 24 mA 0.4 IOH= 48 mA 0.55 IOH= 64 mA 0.6 Current input

28、 Control inputs 1A and 2A IIVCC= 3.45 V, VI= VCCor GND 1 A VCC= 0 or 3.45 V, VI= 5.5 V 5 High impedance output current 3A port, any B port, and Y outputs IOZH 2/ VCC= 3.45 V, VO= VCCor 5.5 V 5 A Low impedance output current 3A port and Y outputs IOZL 2/ VCC= 3.45 V, VO= GND -5 A Any B port -20 Off s

29、tate current IoffVcc = 0, BIAS VCC= 0, VIor VO= 0 to 5.5 V 10 A 3/ 3A port IBHLVCC= 3.15 V, VI= 0.8 V 75 A 4/ 3A port IBHHVCC= 3.15 V, VI= 0.8 V -75 A 5/ 3A port IBHLOVCC= 3.45 V, VI= 0 to VCC500 A 6/ 3A port IBHHOVCC= 3.45 V, VI= 0 to VCC-500 A 7/ IOZ(PU/PD)VCC 1.3 V, VO= 0.5 V to VCC, VI= GND or V

30、CC, OE = dont care 10 A Supply current ICCVCC= 3.45 V, IO= 0, VI= VCCor GND Outputs high 30 mA Outputs low 30 Outputs disabled 30 Supply current ICCDVCC= 3.45 V, IO= 0, VI= VCCor GND 8/ Outputs enabled 76 Typ 9/ Outputs disabled 19 Typ Supply current change ICC 10/ VCC= 3.15 V to 3.45 V, One input a

31、t VCC 0.6 V, Other input at VCCor GND 750 A See notes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/05606 REV B PAGE 6 TABLE I. Electrical perfo

32、rmance characteristics Continued. Test Symbol Test conditions Recommended operating conditions unless otherwise specified Limits Unit Min Max Operating free air temperature range for A and B ports - Continued Input capacitance 1A and 2A inputs CiVI= 3.15 V or 0 2.8 Typ pF Control inputs 2.6 Typ Outp

33、ut capacitance 1Y or 2Y outputs COVO= 3.15 V or 0 5.6 Typ I/O capacitance 3A port CIOVCC= 3.3 V, VO= 3.3 V or 0 7.9 Typ Any B port 12.5 Live insertion for B port Supply current ICC(BIAS VCC) VCC= 0 to 3.15 V, BIAS VCC= 3.15 to 3.45 V, IO(DC)= 0 5 mA VCC= 3.15 V to 3.45 V, 11/ BIAS VCC= 3.15 to 3.45

34、V, IO(DC)= 0 10 A Output voltage VOVCC = 0, BIAS VCC = 3.15 to 3.45 V 1.3 1.7 V Output current IOVCC= 0 VO= 0, BIAS VCC= 3.15 V -20 -100 A VO= 3 V, BIAS VCC= 3.15 V 20 100 Timing requirements for UBT transceiver Clock frequency fclock120 MHz Pulse duration twLE high 2.5 ns CLK high or low 3.0 Setup

35、time tsu3A before CLK Data high 2.1 Data low 2.2 3A before LE Data high 2.0 Data low 2.0 3B before CLK Data high 2.5 Data low 2.7 3B before LE Data high 2.0 Data low 2.0 Hold time th3A after CLK Data high 0 Data low 0 3A after LE Data high 1 Data low 1 3B after CLK Data high 0 Data low 0 3B after LE

36、 Data high 1 Data low 1 See notes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/05606 REV B PAGE 7 TABLE I. Electrical performance characteristi

37、cs Continued. Test Symbol Test conditions Recommended operating conditions unless otherwise specified Limits Unit Min Max Switching characteristics for bus transceiver function Propagation delay time from 1A or 2A to 1B or 2B tPLH4.5 9.2 ns tPHL4.2 7.8 Propagation delay time from 1A or 2A to 1Y or 2

38、Y tPLH6.2 14.5 tPHL6.1 13 Enable time from OEAB to 1B or 2B tPZH3.6 8.1 tPZL3.4 7.8 Disable time from OEAB to 1B or 2B tPHZ3.3 9.7 tPLZ1.8 4.8 Rise time trTransition time, B port (10%-90%) 4.3 Typ Fall time tfTransition time, B port (90%-10%) 4.3 Typ Propagation delay time from 1B or 2B to 1Y or 2Y

39、tPLH1.6 5.6 tPHL1.6 5.6 Enable time from OEBY to 1Y or 2Y tPZH1.2 5.6 tPZL1.8 4.9 Disable time from OEBY to 1Y or 2Y tPHZ0.9 5.4 tPLZ1.4 4.5 Switching characteristics for UBT transceiver Minimum frequency fmax120 MHz Propagation delay time from 3A to 3B tPLH4.8 9.5 ns tPHL4.5 8.3 Propagation delay t

40、ime from LE to 3B tPLH5.2 10.6 tPHL4.7 8.7 Propagation delay time from CLKAB to 3B tPLH5.4 10.5 tPHL4.2 8.4 Enable time from OE to 3B tPZH4.2 9.3 tPZL2.8 8.5 Disable time from OE to 3B tPHZ4.2 9.3 tPLZ2.4 5.7 Rise time trTransition time, B port (10%-90%) 4.3 Typ Fall time tfTransition time, B port (

41、90%-10%) 4.3 Typ Propagation delay time from 3B to 3A tPLH1.5 5.9 tPHL1.7 5.9 Propagation delay time from LE to 3A tPLH1.7 5.9 tPHL1.7 5.9 Propagation delay time from CLKBA to 3A tPLH1.1 5.5 tPHL1.4 5.5 See notes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted w

42、ithout license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/05606 REV B PAGE 8 TABLE I. Electrical performance characteristics Continued. Test Symbol Test conditions Recommended operating conditions unless otherwise specified Limits Unit Min Max

43、 Switching characteristics for UBT transceiver - Continued Enable time from OE to 3B tPZH1.5 6.2 ns tPZL2.1 5.5 Disable time from OE to 3B tPHZ0.8 6.2 tPLZ2.3 5.6 Skew characteristics for bus transceiver for specific worst case VCCand temperature within the recommended ranges Skew from 1A or 2A to 1

44、B or 2B tsk(LH)0.8 ns tsk(HL)0.7 Skew from 1B or 2B to 1Y or 2Y tsk(LH)0.7 tsk(HL)0.7 Skew from 1A or 2A to 1B or 2B tsk(t)12/ 3.9 Skew from 1ABor 2B to 1Y or 2Y 1.5 Skew from 1A or 2A to 1B or 2B tsk(pp)3.6 Skew from 1ABor 2B to 1Y or 2Y 1.4 Skew characteristics for UBT for specific worst case VCCa

45、nd temperature within the recommended ranges Skew from 3A to 3B tsk(LH)1.4 ns tsk(HL)1.1 Skew from CLKAB to 3B tsk(LH)0.8 tsk(HL)0.8 Skew from 3B to 3A tsk(LH)0.7 tsk(HL)0.6 Skew from CLKBA to 3A tsk(LH)0.7 tsk(HL)0.6 Skew from 3A to 3B tsk(t)12/ 3.9 Skew from CLKAB to 3B 3.9 Skew from 3B to 3A 1.6

46、Skew from CLKBA to 3A 1.2 Skew from 3A to 3B tsk(pp)3.6 Skew from CLKAB to 3B 3.5 Skew from 3B to 3A 1.3 Skew from CLKBA to 3A 1.2 See notes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OH

47、IO SIZE A CODE IDENT NO. 16236 DWG NO. V62/05606 REV B PAGE 9 TABLE I. Electrical performance characteristics Continued. 1/ Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over the specified temperature range. Product may not necessa

48、rily be tested across the full temperature range and all parameters may not necessarily be tested. In the absence of specific parametric testing, product performance is assured by characterization and/or design. 2/ For I/O ports, the parameters IOZHand IOZLinclude the input leakage current. 3/ The bus hold circuit can sink at least the minimum