DLA DSCC-VID-V62 07606 REV A-2011 MICROCIRCUIT LINEAR DUAL HIGH SPEED LOW NOISE OPERATIONAL AMPLIFIER MONOLITHIC SILICON.pdf

1、 REVISIONSLTR DESCRIPTION DATE APPROVEDA Add reference information to section 2. Make change to notes specified under figure 1. Update boilerplate paragraphs to current requirements. - ro 11-12-01 C. SAFFLE CURRENT DESIGN ACTIVITY CAGE CODE 16236 HAS CHANGED NAMES TO: DLA LAND AND MARITIME COLUMBUS,

2、 OHIO 43218-3990 Prepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV A A A A A A A A A A PAGE 1 2 3 4 5 6 7 8 9 10 PMIC N/A PREPARED BY RICK OFFICER DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 Original date of drawing YY-MM-DD CHECKED BY

3、 TOM HESS TITLE MICROCIRCUIT, LINEAR, DUAL, HIGH SPEED, LOW NOISE, OPERATIONAL AMPLIFIER, MONOLITHIC SILICON 06-11-15 APPROVED BY RAYMOND MONNIN SIZE A CODE IDENT. NO. 16236 DWG NO. V62/07606 REV A PAGE 1 OF 10 AMSC N/A 5962-V012-12 Provided by IHSNot for ResaleNo reproduction or networking permitte

4、d without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/07606 REV A PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance dual, high speed, low noise, operational amplifier microcircuit, with an

5、operating temperature range of -55C to +125C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/07606 - 01 X E

6、 Drawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s). Device type Generic Circuit function 01 MC33078-EP Dual, high speed, low noise, operational amplifier 1.2.2 Case outline(s). The case outline(s) are as specified herein. Outline letter Numb

7、er of pins JEDEC PUB 95 Package style X 8 MS-012-AA Plastic surface mount1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacture: Finish designator Material A Hot solder dip B Tin-lead plateC Gold plateD PalladiumE Gold flash palladi

8、um Z Other Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/07606 REV A PAGE 3 1.3 Absolute maximum ratings. 1/ Positive supply voltage (VCC+) +18 V maximum 2/ Nega

9、tive supply voltage (VCC-) -18 V maximum 2/ Supply voltage (VCC-to VCC+) 36 V maximum Input voltage, either input . VCC-to VCC+maximum 2/ 3/ Input current . 10 mA maximum 4/ Duration of output short circuit . Unlimited 5/ Package thermal impedance (JA) . 97C/W 6/ 7/ Operating virtual junction temper

10、ature (TJ) +150C Storage temperature range (TSTG) -65C to +150C 8/ 1.4 Recommended operating conditions. 9/ Positive supply voltage range (VCC+) +5 V to +18 V Negative supply voltage range (VCC-) -5 V to -18 V Operating free-air temperature range (TA) . -55C to +125C 1/ Stresses beyond those listed

11、under “absolute maximum rating” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditio

12、ns for extended periods may affect device reliability. 2/ All voltage values, except differential voltages, are with respect to the midpoint between VCC+and VCC-. 3/ The magnitude of the input voltage must never exceed the magnitude of the supply voltage. 4/ Excessive input current will flow if a di

13、fferential input voltage in excess of approximately 0.6 V is applied between the inputs, unless some limiting resistance is used. 5/ The output may be shorted to ground or either power supply. Temperature and/or supply voltages must be limited to ensure the maximum dissipation rating is not exceeded

14、. 6/ Maximum power dissipation is a function of TJ(max), JA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD= ( TJ(max) TA) / JA. Operating at the absolute maximum TJof 150C can affect reliability. 7/ The package thermal impedance is calculated in accordanc

15、e with JESD 51-7. 8/ Long term high temperature storage and/or extended use at maximum recommended operating conditions may result in a reduction of overall device life. See manufacturers website for additional information on enhanced plastic packaging. 9/ Use of this product beyond the manufacturer

16、s design rules or stated parameters is done at the users risk. The manufacturer and/or distributor maintain no responsibility or liability for product used beyond the stated limits. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTE

17、R, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/07606 REV A PAGE 4 2. APPLICABLE DOCUMENTS JEDEC Solid State Technology Association JEDEC PUB 95 Registered and Standard Outlines for Semiconductor Devices EIA/JEDEC 51-7 High Effective Thermal Conductivity Test Board for Leaded Surf

18、ace Mount Packages (Applications for copies should be addressed to the JEDEC Office, 3103 North 10th Street, Suite 240-S, Arlington, VA 22201-2107 or online at http:/www.jedec.org) 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown

19、in 6.3 herein and as follows: A. Manufacturers name, CAGE code, or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The ma

20、ximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outline. The c

21、ase outline shall be as shown in 1.2.2 and figure 1. 3.5.2 Terminal connections. The terminal connections shall be as shown in figure 2. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT

22、NO. 16236 DWG NO. V62/07606 REV A PAGE 5 TABLE I. Electrical performance characteristics. 1/ Test Symbol Conditions VCC-= -15 V, VCC+= +15 V unless otherwise specifiedTemperature, TADevice type Limits Unit Min Max Input offset voltage VIOVO= 0, RS= 10 , +25C 01 2 mV VCM= 0 -55C to +125C 3 Input offs

23、et voltage temperature coefficient VIOVO= 0, RS= 10 , VCM= 0 -55C to +125C 01 2 typical V/C Input bias current IIBVO= 0, VCM= 0 +25C 01 750 nA -55C to +125C 800 Input offset current IIOVO= 0, VCM= 0 +25C 01 150 nA -55C to +125C 175 Common mode input voltage range VICRVIO= 5 mV, VO= 0 -55C to +125C 0

24、1 13 V Large signal differential voltage amplification AVDRL 2 k, VO= 10 V +25C 01 90 dB -55C to +125C 80 Maximum output voltage swing VOM+VID= 1 V, RL= 600 +25C 01 10.7 typical V VOM-11.9 typicalVOM+VID= 1 V, RL= 2 k +25C 13.2 VOM-13.2 VOM+VID= 1 V, RL= 10 k +25C 13.5 VOM-14 Common mode rejection r

25、atio CMRR VIN= 13 V +25C 01 80 dB Supply voltage 2/ rejection ratio kSVRVCC+= +5 V to +15 V, VCC-= -5 V to -15 V +25C 01 80 dB Output short circuit current IOS|VID| = 1 V, output to GND, source current +25C 01 15 mA |VID| = 1 V, output to GND, sink current -20 See footnotes at end of table. Provided

26、 by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/07606 REV A PAGE 6 TABLE I. Electrical performance characteristics Continued. 1/ Test Symbol Conditions VCC-= -15 V, VCC+=

27、+15 V unless otherwise specifiedTemperature, TADevice type Limits Unit Min Max Supply current ICCVO= 0 +25C 01 2.5 mA (per channel) -55C to +125C 3.5 Slew rate at unity gain SR AVD= 1, VIN= -10 V to 10 V, RL= 2 k, CL= 100 pF +25C 01 5 V/s Gain bandwidth product GBW f = 100 kHz +25C 01 16 typical MHz

28、 Unity gain frequency B1Open loop +25C 01 9 typical MHz Gain margin RL= 2 k, CL= 0 pF +25C 01 -11 typical dB RL= 2 k, CL= 100 pF -6 typical Phase margin m RL= 2 k, CL= 0 pF +25C 01 55 typical RL= 2 k, CL= 100 pF 40 typical Amplifier-to-amplifier isolation f = 20 Hz to 20 kHz +25C 01 -120 typical dB

29、Power bandwidth VO= 27 V(PP), RL= 2 k, THD 1% +25C 01 120 typical kHz Total harmonic distortion THD VO= 3 Vrms, AVD= 1, RL= 2 k, f = 20 Hz to 20 kHz +25C 01 0.002 typical % Open loop output impedance zOVO= 0, f = 9 MHz +25C 01 37 typical Differential input resistance ridVCM= 0 +25C 01 175 typical k

30、Differential input capacitance CidVCM= 0 +25C 01 12 typical pF Equivalent input noise voltage Vnf = 1 kHz, RS= 100 +25C 01 4.5 typical nV / Hz Equivalent input noise current Inf = 1 kHz +25C 01 0.5 typical pA / Hz 1/ Testing and other quality control techniques are used to the extent deemed necessar

31、y to assure product performance over the specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In the absence of specific parametric testing, product performance is assured by characterization and/or des

32、ign. 2/ Measured with VCCdifferentially varied at the same time. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/07606 REV A PAGE 7 Case X FIGURE 1. Case outline.

33、Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/07606 REV A PAGE 8 Case X - continued Symbol Dimensions Inches Millimeters Min Max Min Max A - 0.069 - 1.75 A1 0.00

34、4 0.010 0.10 0.25 b 0.012 0.020 0.31 0.51 c 0.007 0.010 0.17 0.25 D 0.189 0.197 4.80 5.00 E 0.150 0.157 3.80 4.00 E1 0.228 0.244 5.80 6.20 e 0.050 BSC 1.27 BSC L 0.016 0.050 0.40 1.27 n 8 8 NOTES: 1. Controlling dimensions are inch, millimeter dimensions are given for reference only. 2. For dimensio

35、n D, body length does not include mold flash, protrusion, or gate burrs. Mold flash, protrusion, or gate burrs shall not exceed 0.006 inch (0.15 mm) per end. 3. For dimension E, body width does not include interlead flash. Interlead flash shall not exceed 0.017 inch (0.43 mm) per side. 4. Falls with

36、 JEDEC MS-012 variation AA. FIGURE 1. Case outline Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/07606 REV A PAGE 9 Device type 01 Case outline X Term

37、inal number Terminal symbol 1 OUT12 IN1- 3 IN1+ 4 VCC-5 IN2+6 IN2- 7 OUT2 8 VCC+FIGURE 2. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/076

38、06 REV A PAGE 10 4. VERIFICATION 4.1 Product assurance requirements. The manufacturer is responsible for performing all inspection and test requirements as indicated in their internal documentation. Such procedures should include proper handling of electrostatic sensitive devices, classification, pa

39、ckaging, and labeling of moisture sensitive devices, as applicable. 5. PREPARATION FOR DELIVERY 5.1 Packaging. Preservation, packaging, labeling, and marking shall be in accordance with the manufacturers standard commercial practices for electrostatic discharge sensitive devices. 6. NOTES 6.1 ESDS.

40、Devices are electrostatic discharge sensitive and are classified as ESDS class 1 minimum. 6.2 Configuration control. The data contained herein is based on the salient characteristics of the device manufacturers data book. The device manufacturer reserves the right to make changes without notice. Thi

41、s drawing will be modified as changes are provided. 6.3 Suggested source(s) of supply. Identification of the suggested source(s) of supply herein is not to be construed as a guarantee of present or continued availability as a source of supply for the item. Vendor item drawing administrative control

42、number 1/ Device manufacturer CAGE code Package Top side marking Vendor part number V62/07606-01XE 01295 Reel of 2500 33078M MC33078MDREP 1/ The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation. 2/ Package drawings, standard p

43、acking quantities, thermal data, symbolization, and PCB design guidelines are available from manufacturer. CAGE code Source of supply 01295 Texas Instruments, Inc. Semiconductor Group8505 Forest Ln. PO Box 660199 Dallas, TX 75243 Point of contact: U.S. Highway 75 South P.O. Box 84, M/S 853 Sherman, TX 75090-9493 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-