DLA DSCC-VID-V62 08603 REV A-2009 MICROCIRCUIT DIGITAL-LINEAR SINGLE DIGITAL CONTROLLED POTENTIOMETER MONOLITHIC SILICON.pdf

1、 REVISIONSLTR DESCRIPTION DATE APPROVEDA Correct the JAlimit from 120C/W to 162C/W as specified under paragraph 1.3. Add a sentence to SHDN description as specified under Figure 1. - ro 09-10-06 C. SAFFLE Prepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAG

2、ES REV A A A A A A A A A A A A A A A A PAGE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 PMIC N/A PREPARED BY RICK OFFICER DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 Original date of drawing YY-MM-DD CHECKED BY RAJESH PITHADIA TITLE MICROCIRCUIT, DIGITAL-LINEAR, SINGLE DIGITAL CONTROLLED POT

3、ENTIOMETER, MONOLITHIC SILICON 07-12-19 APPROVED BY ROBERT M. HEBER SIZE A CODE IDENT. NO. 16236 DWG NO. V62/08603 REV A PAGE 1 OF 16 AMSC N/A 5962-V002-10 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO

4、 SIZE A CODE IDENT NO. 16236 DWG NO. V62/08603 REV A PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance single digital controlled potentiometer microcircuit, with an operating temperature range of -55C to +125C. 1.2 Vendor Item Drawing Administrative Con

5、trol Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/08603 - 01 X B Drawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3)

6、 1.2.1 Device type(s). Device type Generic Circuit function 01 ISL22316 Single digital controlled potentiometer (DCP) 1.2.2 Case outline(s). The case outline(s) are as specified herein. Outline letter Number of pins JEDEC PUB 95 Package style X 10 MO-187BA Plastic surface mount1.2.3 Lead finishes. T

7、he lead finishes are as specified below or other lead finishes as provided by the device manufacture: Finish designator Material A Hot solder dip B Tin-lead plateC Gold plateD PalladiumE Gold flash palladium Z Other Provided by IHSNot for ResaleNo reproduction or networking permitted without license

8、 from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/08603 REV A PAGE 3 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) . -0.3 V to +6 V Voltage at any digital interface pin with respect to GND -0.3 V to VCC+ 0.3 V Voltage at any digital co

9、ntrolled potentiometer (DCP) pin with respect to GND . -0.3 V to VCCWiper current (IW) (10 seconds) . 6 mA Latchup Class II, level B at +125C 2/ Electrostatic discharge (ESD): Human body model 5 kV Charge device model . 1 kV Maximum junction temperature (TJ) . +150C Storage temperature range -65C to

10、 +150C Lead temperature (soldering, 10 seconds) . +300C Thermal resistance, junction-to-ambient (JA) . 162C/W 3/ 1.4 Recommended operating conditions. 4/ Supply voltage range (VCC) . 2.7 V to 5.5 V Power rating of each DCP 5 mW Wiper current of each DCP 3.0 mA Operating free-air temperature range (T

11、A) . -55C to +125C 1/ Stresses beyond those listed under “absolute maximum rating” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not i

12、mplied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2/ Jedec class II pulse conditions and failure criterion used. Level B exceptions are: using a maximum positive pulse of 6.5 V on the shutdown (SHDN) pin, and using a maximum negative pulse of -

13、1 V for all pins. 3/ JAis measured with the component mounted on a high effective thermal conductivity test board in free air. See manufacturers technical brief TB379 for details. 4/ Use of this product beyond the manufacturers design rules or stated parameters is done at the users risk. The manufac

14、turer and/or distributor maintain no responsibility or liability for product used beyond the stated limits. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/08603 R

15、EV A PAGE 4 2. APPLICABLE DOCUMENTS JEDEC PUB 95 Registered and Standard Outlines for Semiconductor Devices (Applications for copies should be addressed to the Electronic Industries Alliance, 2500 Wilson Boulevard, Arlington, VA 22201-3834 or online at http:/www.jedec.org) 3. REQUIREMENTS 3.1 Markin

16、g. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code, or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturers par

17、t number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construct

18、ion, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outline. The case outline shall be as shown in 1.2.2 and figure 1. 3.5.2 Terminal connections. The terminal connections shall be as shown in figure 2. 3.5.3 Block diagram. The block diagram shall be as shown in figure 3.

19、3.5.4 Timing waveforms. The timing waveforms shall be as shown in figure 4. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/08603 REV A PAGE 5 TABLE I. Electrical

20、performance characteristics. 1/ Test Symbol Conditions VCC= 2.7 V to 5.5 V, unless otherwise specifiedTemperature, TADevice type Limits Unit Min Max High terminal (RH) to low terminal (RL) resistance RTOTALW option, VCC= 3.3 V +25C 01 10 typical k RHto RLresistance tolerance RTOTAL-55C to +125C 01 -

21、20 +20 % End to end temperature coefficient RTOTALW option, VCC= 3.3 V +25C 01 50 typical ppm/C Wiper resistance RWVCC= 3.3 V at 25C, wiper control = VCC/ RTOTAL-55C to +125C 01 200 VRHand VRLterminal voltages VRH, VRLVRHand VRLto GND -55C to +125C 01 0 VCCV Potentiometer capacitance CH2/ High termi

22、nal, VCC= 3.3 V +25C 01 10 typical pF CL2/ Low terminal, VCC= 3.3 V 10 typical CW2/ Wiper terminal, VCC= 3.3 V 25 typical Leakage on DCP pins ILkgDCPVoltage at pin from GND to VCC-55C to +125C 01 1 A Voltage divider mode section 0 V at RL; VCCat RH; measured at RW, unloaded Integral non linearity IN

23、L 3/ -55C to +125C 01 -1 1 LSB 4/ Differential non linearity DNL 5/ Monotonic over all tap positions -55C to +125C 01 -1 +1 LSB 4/ Zero scale error ZSerror6/ W option -55C to +125C 01 0 5 LSB 4/ Full scale error FSerror 7/ W option -55C to +125C 01 -5 0 LSB 4/ Ratiometric temperature coefficient TCV

24、2/, 8/ DCP register set to 40 hex for W option, VCC= 3.3 V +25C 01 4 typical ppm/C See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/0

25、8603 REV A PAGE 6 TABLE I. Electrical performance characteristics Continued. 1/ Test Symbol Conditions VCC= 2.7 V to 5.5 V, unless otherwise specifiedTemperature, TADevice type Limits Unit Min Max Resistor mode section Measurements between RWand RLwith RHnot connected, or between RWand RHwith RLnot

26、connected. Integral non-linearity RINL9/ DCP register set between 10 hex and 70 hex; monotonic over all tap positions; W option -55C to +125C 01 -1 +1 MI 10/ Differential non- linearity RDNL 11/ W option -55C to +125C 01 -1 +1 MI 10/ Offset Roffset12/ W option -55C to +125C 01 0 5 MI 10/ Operating s

27、pecifications section VCCsupply current (volatile write / read) ICC1fSCL= 400 kHz; SDA = open; (for inter-integrated circuit (I2C), active, read and write states) -55C to +125C 01 0.5 mA VCCsupply current (non-volatile write / read) ICC2fSCL= 400 kHz; SDA = open; (for I2C, active, read and write sta

28、tes) -55C to +125C 01 3 mA VCCcurrent (standby) ISBVCC= +5.5 V, I2C interface in standby state -55C to +125C 01 7 A VCC= +3.6 V, I2C interface in standby state 5 VCCcurrent (shutdown) ISDVCC= +5.5 V, I2C interface in standby state -55C to +125C 01 5 A VCC= +3.6 V, I2C interface in standby state 4 Se

29、e footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/08603 REV A PAGE 7 TABLE I. Electrical performance characteristics Continued. 1/ Test

30、Symbol Conditions VCC= 2.7 V to 5.5 V, unless otherwise specifiedTemperature, TADevice type Limits Unit Min Max Operating specifications section - continued. Leakage current, at pins A0, A1, SHDN , SDA, and SCL ILkgDigVoltage at pin from GND to VCC, SDA is inactive -55C to +125C 01 -1 1 A DCP wiper

31、response time tDCP2/ SCL falling edge of last bit of DCP data byte to wiper new position, VCC= 3.3 V +25C 01 1.5 typical s DCP recall time from shutdown mode tshdnrecFrom rising edge of SHDN signal to wiper stored position and RH connection, VCC= 3.3 V +25C 01 1.5 typical s SCL falling edge of last

32、bit of ACR data byte to wiper stored position and RH connection, VCC= 3.3 V 1.5 typical Power on recall voltage VporMinimum VCCat which memory recall occurs -55C to +125C 01 2.6 V VCCramp rate VCCRamp-55C to +125C 01 0.2 V/ms Power up delay tDVCCabove Vpor, to DCP initial value register recall compl

33、eted, and inter-integrated circuit (I2C) interface in standby state -55C to +125C 01 3 ms EEPROM specification section EEPROM endurance -55C to +125C 01 1,000, 000 Cycles EEPROM retention +55C 01 50 Years +90C 15 +125C 10 Non-volatile write cycle time tWC13/ -55C to +125C 01 20 ms See footnotes at e

34、nd of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/08603 REV A PAGE 8 TABLE I. Electrical performance characteristics Continued. 1/ Test Symbol Condition

35、s VCC= 2.7 V to 5.5 V, unless otherwise specifiedTemperature, TADevice type Limits Unit Min Max Serial interface specification section A1, A0, SHDN , SDA, and SCL input buffer low voltage VIL-55C to +125C 01 -0.3 0.3 x VCCV A1, A0, SHDN , SDA, and SCL input buffer high voltage VIH-55C to +125C 01 0.

36、7 x VCC0.3 + VCCV SDA and SCL input buffer hysteresis Hysteresis -55C to +125C 01 0.05 x VCCV SDA output buffer low voltage, sinking 4 mA VOL-55C to +125C 01 0 0.4 V A1, A0, SHDN , SDA, and SCL pin capacitance Cpin 2/ VCC= 3.3 V +25C 01 10 typical pF SCL frequency fSCL-55C to +125C 01 400 kHz Pulse

37、width suppression time at SDA and SCL inputs tspAny pulse narrower than the maximum specification is suppressed -55C to +125C 01 50 ns SCL falling edge to SDA output data valid tAASCL falling edge crossing 30% of VCC, until SDA exits the 30% to 70% of VCC window -55C to +125C 01 900 ns Time the bus

38、must be free before the start of a new transmission tBUFSDA crossing 70% of VCCduring a STOP condition, to SDA crossing 70% of VCCduring the following START condition -55C to +125C 01 1300 ns Clock low time tLOWMeasured at the 30% of VCCcrossing -55C to +125C 01 1300 ns Clock high time tHIGHMeasured

39、 at the 70% of VCCcrossing -55C to +125C 01 600 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/08603 REV A PAGE 9 TABLE I. Elect

40、rical performance characteristics Continued. 1/ Test Symbol Conditions VCC= 2.7 V to 5.5 V, unless otherwise specifiedTemperature, TADevice type Limits Unit Min Max Serial interface specification section - continued. START condition setup time tSU:STASCL rising edge to SDA falling edge; both crossin

41、g 70% of VCC-55C to +125C 01 600 ns START condition hold time tHD:STAFrom SDA falling edge crossing 30% of VCCto SCL falling edge crossing 70% of VCC-55C to +125C 01 600 ns Input data setup time tSU:DATFrom SDA exiting the 30% to 70% of VCCwindow, to SCL rising edge crossing 30% of VCC-55C to +125C

42、01 100 ns Input data hold time tHD:DATFrom SCL rising edge crossing 70% of VCCto SDA entering the 30% to 70% of VCCwindow -55C to +125C 01 0 ns STOP condition setup time tSU:STOFrom SCL rising edge crossing 70% of VCC, to SDA rising edge crossing 30% of VCC-55C to +125C 01 600 ns STOP condition hold

43、 time for read, or volatile only write tHD:STOFrom SDA rising edge to SCL falling edge; both crossing 70% of VCC-55C to +125C 01 1300 ns Output data hold time tDHFrom SCL falling edge crossing 30% of VCC, until SDA enters the 30% to 70% of VCCwindow -55C to +125C 01 0 ns SDA to SCL rise time tRFrom

44、30% to 70% of VCC-55C to +125C 01 20 + 0.1 * Cb 250 ns SDA to SCL fall time tFFrom 70% to 30% of VCC-55C to +125C 01 20 + 0.1 * Cb 250 ns Capacitive loading of SDA or SCL Cb Total on chip and off chip -55C to +125C 01 10 400 pF See footnotes at end of table. Provided by IHSNot for ResaleNo reproduct

45、ion or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/08603 REV A PAGE 10 TABLE I. Electrical performance characteristics Continued. 1/ Test Symbol Conditions VCC= 2.7 V to 5.5 V, unless otherwise specifiedTemp

46、erature, TADevice type Limits Unit Min Max Serial interface specification section - continued. SDA and SCL bus pull up resistor off chip RpuMaximum is determine by tRand tF, For Cb = 400 pF, max is about 22.5 k, For Cb = 40 pF, max is about 1520 k -55C to +125C 01 1 k A1 and A0 setup time tSU:ABefor

47、e START condition -55C to +125C 01 600 ns A1 and A0 hold time tHD:AAfter STOP condition -55C to +125C 01 600 ns 1/ Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over the specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In the absence of specific parametric testing, product performance is assured by characterization and/or design. 2/ This parameter is not 100 percent tested. 3/ INL = V(