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本文(DLA DSCC-VID-V62 09634-2011 MICROCIRCUIT LINEAR +5 V PROGRAMMABLE LOW DROPOUT VOLTAGE REGULATOR MONOLITHIC SILICON.pdf)为本站会员(eveningprove235)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA DSCC-VID-V62 09634-2011 MICROCIRCUIT LINEAR +5 V PROGRAMMABLE LOW DROPOUT VOLTAGE REGULATOR MONOLITHIC SILICON.pdf

1、 REVISIONSLTR DESCRIPTION DATE APPROVEDPrepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV PAGE 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY RICK OFFICER DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 Original date of drawing YY-MM-DD CHECKED BY RAJ

2、ESH PITHADIA TITLE MICROCIRCUIT, LINEAR, +5 V PROGRAMMABLE LOW DROPOUT VOLTAGE REGULATOR, MONOLITHIC SILICON 11-06-28 APPROVED BY CHARLES F. SAFFLE SIZE A CODE IDENT. NO. 16236 DWG NO. V62/09634 REV PAGE 1 OF 11 AMSC N/A 5962-V055-11 Provided by IHSNot for ResaleNo reproduction or networking permitt

3、ed without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09634 REV PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a +5 V programmable low dropout voltage regulator microcircuit, with an operating temperature range of

4、-55C to +125C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/09634 - 01 X B Drawing Device type Case outli

5、ne Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s). Device type Generic Circuit function 01 MAX667 +5 V programmable low dropout voltage regulator 1.2.2 Case outline(s). The case outline(s) are as specified herein. Outline letter Number of pins JEDEC PUB 95 Package style

6、X 8 MS-012-AA Small outline1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacture: Finish designator Material A Hot solder dip B Tin-lead plateC Gold plateD PalladiumE Gold flash palladium Z Other Provided by IHSNot for ResaleNo rep

7、roduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09634 REV PAGE 3 1.3 Absolute maximum ratings. 1/ Input supply voltage (VIN) +18 V Output short circuited to ground . 1 second LBO output sink current . 50 mA L

8、BO output voltage GND to VOUTSHDN input voltage -0.3 V to (VIN+ 0.3 V) Input voltages LBI, SET pins -0.3 V to (VIN 1.0 V) Junction temperature range (TJ) 150C Storage temperature range (TSTG) -65C to +160C Lead temperature (soldering, 10 seconds) . +300C Electrostatic discharge (ESD): Human body mod

9、el (HBM) . 800 V MSL Level 1 1.4 Recommended operating conditions. 2/ Input supply voltage (VIN) +9 V Operating free-air temperature range (TA) -55C to +125C 1.5 Thermal data table. Case outline letter X X Units PC board Single layer Multi-layer 3/ Power dissipation (PD), maximum at +70C 471 606 mW

10、Power dissipation (PD) derating above +70C 5.9 7.6 mW/C Thermal resistance, junction to case (JC) 40 38 C/W Thermal resistance, junction to ambient (JA) 170 132 C/W 1/ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings onl

11、y, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2/ Use of this product beyond the manufacturers

12、 design rules or stated parameters is done at the users risk. The manufacturer and/or distributor maintain no responsibility or liability for product used beyond the stated limits. 3/ Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-l

13、ayer board. For detailed information on package thermal considerations, refer to www.maxim- Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09634 REV PAGE 4 2. APPLICABLE DO

14、CUMENTS JEDEC PUB 95 - Registered and Standard Outlines for Semiconductor Devices JESD51-7 - High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages (Applications for copies should be addressed to the JEDEC Office, 3103 North 10th Street, Suite 240-S, Arlington, VA 22201-210

15、7 or online at http:/www.jedec.org) 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code, or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container.

16、 The unit container shall be marked with the manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Desig

17、n, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outline. The case outline shall be as shown in 1.2.2 and figure 1. 3.5.2 Terminal connections. The terminal connections shall be as shown in figure 2. 3.5.3 Bl

18、ock diagram. The block diagram shall be as shown in figure 3. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09634 REV PAGE 5 TABLE I. Electrical performance characteristic

19、s. 1/ Test Symbol Conditions 2/Temperature, TA Device type Limits Unit Min Max Input voltage VIN-55C to +125C 01 3.5 16.5 V Output voltage VOUTVSET= 0 V, VIN= 6 V, IOUT= 10 mA -55C to +125C 01 4.75 5.25 V Maximum output current IOUTVIN= 6 V, 4.5 V VOUT 5.5 V -55C to +125C 01 250 mA Quiescent current

20、 IQVSHDN= 2 V -55C to +125C 01 2 A IOUT= 0 A, VSHDN= 0 V, VSET= 0 V 35 IOUT= 100 A, VSHDN= 0 V, VSET= 0 V 50 IOUT= 200 mA, VSHDN= 0 V, VSET= 0 V 20 mA Dropout voltage 3/ IOUT= 100 A -55C to +125C 01 75 mV IOUT= 200 mA 350 Load regulation IOUT= 10 mA to 200 mA -55C to +125C 01 250 mV Line regulation

21、VIN= 6 V to 10 V, IOUT= 10 mA -55C to +125C 01 15 mV SET reference voltage VSET-55C to +125C 01 1.20 1.25 V SET input leakage current ISETVSET= 1.5 V -55C to +125C 01 1000 nA Output leakage current IOUTVSHDN= 2 V -55C to +125C 01 1 A Short circuit current IOUT4/ -55C to +125C 01 450 mA Low battery d

22、etector reference voltage VLBI-55C to +125C 01 1.195 1.255 V Low battery detector input leakage current ILBIVLBI= 1.5 V -55C to +125C 01 1000 nA Low battery detector output voltage VLBOVIN= 9 V, VLBI= 2 V, ILBO= 10 mA -55C to +125C 01 0.4 V See footnotes at end of table. Provided by IHSNot for Resal

23、eNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09634 REV PAGE 6 TABLE I. Electrical performance characteristics Continued. 1/ Test Symbol Conditions 2/Temperature, TA Device type Limits Unit Min Max S

24、HDN threshold VSHDNVIH-55C to +125C 01 1.5 V VIL0.3 SHDN leakage current ISHDNVSHDN= 0 V to VIN -55C to +125C 01 1000 nA Dropout detector output voltage VDDVIN= 7 V, VSET= 0 V, VSHDN= 0 V, RDD= 100 k, IOUT= 10 mA -55C to +125C 01 0.25 V VIN= 4.5 V, VSET= 0 V, VSHDN= 0 V, RDD= 100 k, IOUT= 10 mA 3.5

25、1/ Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over the specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In the absence of spec

26、ific parametric testing, product performance is assured by characterization and/or design. 2/ Unless otherwise specified, GND = 0 V, VIN= +9 V, VOUT= +5 V, and C1 = 10 F. 3/ Dropout voltage is VIN VOUTwhen VOUTfall to 0.1 V below its value at VIN= VOUT+ 2 V. 4/ Short circuit current is pulse tested

27、to maintain junction temperature. Short circuit duration is limited by package dissipation. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09634 REV PAGE 7 Case X FIGURE 1.

28、 Case outline. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09634 REV PAGE 8 Case X continued. Symbol Dimensions Inches Millimeters Min Max Min Max A 0.053 0.069 1.35 1.7

29、5 A1 0.004 0.010 0.10 0.25 b 0.014 0.019 0.35 0.49 c 0.007 0.010 0.19 0.25 D 0.189 0.197 4.80 5.00 e 0.050 BSC 1.27 BSC E 0.150 0.157 3.80 4.00 E1 0.228 0.244 5.80 6.20 L 0.016 0.050 0.40 1.27 n 8 8 NOTES: 1. Controlling dimensions are millimeter, inch dimensions are given for reference only. 2. Dim

30、ensions D and E do not include mold flash. 3. Mold flash or protrusions do not exceed 0.15 mm (0.006 inch). 4. Leads to be coplanar within 0.10 mm (.004 inch). 5. Falls within reference to JEDEC MS-012-AA. FIGURE 1. Case outline - Continued. Provided by IHSNot for ResaleNo reproduction or networking

31、 permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09634 REV PAGE 9 Device type 01 Case outline X Terminal number Terminal symbol Function 1 DD Dropout detector output. This is the collector of a PNP pass transistor. Normally an open

32、circuit, it sources current as dropout is reached. 2 OUT Regulated output voltage. OUT falls to 0 V when SHDN is above 1.5 V. SET determines output voltage when SET is above 50 mV; otherwise it is 5 V. OUT must be connected to an output filter capacitor. 3 LBI Low battery detector. A CMOS input to a

33、n internal 1.225 V comparator whose output is the LBO pin. 4 GND Ground. 5 SHDN Shutdown input. Connect to GND for normal operation (output active). Pull above 1.5 V to disable OUT, LBO, and DD and to reduce quiescent current to less than 1 A 6 SET (Output) voltage set, CMOS input. Connect to GND fo

34、r 5 V output. For other voltages, connect external resistive divider from OUT. 7 LBO Low battery output. An open drain N-channel transistor that sinks current to GND when LBI is less than 1.22 V. 8 IN Positive input voltage (unregulated). FIGURE 2. Terminal connections. Provided by IHSNot for Resale

35、No reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09634 REV PAGE 10 FIGURE 3. Block diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND

36、MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09634 REV PAGE 11 4. VERIFICATION 4.1 Product assurance requirements. The manufacturer is responsible for performing all inspection and test requirements as indicated in their internal documentation. Such procedures should include prope

37、r handling of electrostatic sensitive devices, classification, packaging, and labeling of moisture sensitive devices, as applicable. 5. PREPARATION FOR DELIVERY 5.1 Packaging. Preservation, packaging, labeling, and marking shall be in accordance with the manufacturers standard commercial practices f

38、or electrostatic discharge sensitive devices. 6. NOTES 6.1 ESDS. Devices are electrostatic discharge sensitive and are classified as ESDS class 1B minimum. 6.2 Configuration control. The data contained herein is based on the salient characteristics of the device manufacturers data book. The device m

39、anufacturer reserves the right to make changes without notice. This drawing will be modified as changes are provided. 6.3 Suggested source(s) of supply. Identification of the suggested source(s) of supply herein is not to be construed as a guarantee of present or continued availability as a source o

40、f supply for the item. Vendor item drawing administrative control number 1/ Device manufacturer CAGE code Vendor part number 2/ V62/09634-01XB 1ES66 MAX667MSA/PR-T 1/ The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation. 2/ Add “-T” suffix for tape and reel. CAGE code Source of supply 1ES66 Maxim Integrated Products 120 San Gabriel Drive Sunnyvale, CA 94086-5125 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-

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