DLA DSCC-VID-V62 11619 REV A-2011 MICROCIRCUIT LINEAR NEGATIVE VOLTAGE REGULATOR MONOLITHIC SILICON.pdf

1、 REVISIONSLTR DESCRIPTION DATE APPROVEDPrepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV PAGE 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY RICK OFFICER DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 Original date of drawing YY-MM-DD CHECKED BY RAJ

2、ESH PITHADIA TITLE MICROCIRCUIT, LINEAR, NEGATIVE VOLTAGE REGULATOR, MONOLITHIC SILICON 11-12-01 APPROVED BY CHARLES F. SAFFLE SIZE A CODE IDENT. NO. 16236 DWG NO. V62/11619 REV PAGE 1 OF 11 AMSC N/A 5962-V089-11 Provided by IHSNot for ResaleNo reproduction or networking permitted without license fr

3、om IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/11619 REV PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance negative voltage regulator microcircuit, with an operating temperature range of -55C to +125C. 1.2 Vendor

4、 Item Drawing Administrative Control Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/11619 - 01 X E Drawing Device type Case outline Lead finish number (Se

5、e 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s). Device type Generic Circuit function 01 TPS7A3001-EP Negative voltage regulator 1.2.2 Case outline(s). The case outline(s) are as specified herein. Outline letter Number of pins JEDEC PUB 95 Package style X 8 MO-187-AA-T Plastic small outline wi

6、th thermal pad 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacture: Finish designator Material A Hot solder dip B Tin-lead plateC Gold plateD PalladiumE Gold flash palladium Z Other Provided by IHSNot for ResaleNo reproduction or

7、 networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/11619 REV PAGE 3 1.3 Absolute maximum ratings. 1/ Voltage : IN pin to GND pin . -36 V to +0.3 V OUT pin to GND pin . -33 V to +0.3 V OUT pin to IN pin . -0.3 V to +36 V FB

8、pin to GND pin -2 V to +0.3 V FB pin to IN pin -0.3 V to +36 V EN pin to IN pin -0.3 V to +36 V EN pin to GND pin -36 V to +36 V NR/SS pin to IN pin -0.3 V to +36 V NR/SS pin to GND pin -2 V to +0.3 V Peak output current Internally limited Operating virtual junction temperature (TJ) -55C to +135C St

9、orage temperature range (TSTG) -65C to +150C Electrostatic discharge (ESD) rating: Human body model (HBM) . 1500 V Charged device model (CDM) 500 V 1.4 Recommended operating conditions. 2/ Operating junction temperature range (TJ) -55C to +125C 1.5 Thermal characteristics. Thermal metric Symbol Case

10、 X Unit Thermal resistance, junction-to-ambient JA69.3 C/W Thermal resistance, junction-to-case (top) JC(TOP)40.3 C/W Characterization parameter, junction-to-top JT2.4 C/W Characterization parameter, junction-to-board JB38.7 C/W 1/ Stresses beyond those listed under “absolute maximum rating” may cau

11、se permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect devi

12、ce reliability. 2/ Use of this product beyond the manufacturers design rules or stated parameters is done at the users risk. The manufacturer and/or distributor maintain no responsibility or liability for product used beyond the stated limits. Provided by IHSNot for ResaleNo reproduction or networki

13、ng permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/11619 REV PAGE 4 2. APPLICABLE DOCUMENTS JEDEC PUB 95 Registered and Standard Outlines for Semiconductor Devices (Applications for copies should be addressed to the JEDEC Office, 31

14、03 North 10th Street, Suite 240-S, Arlington, VA 22201-2107 or online at http:/www.jedec.org) 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code, or logo B. Pin 1 identi

15、fier C. ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics a

16、re as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outline. The case outline shall be as shown in 1.2.2 and figure 1. 3.5.2 Terminal connections. The te

17、rminal connections shall be as shown in figure 2. 3.5.3 Logic diagram. The logic diagram shall be as shown in figure 3. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/11619

18、 REV PAGE 5 TABLE I. Electrical performance characteristics. 1/ Test Symbol Conditions 2/ 3/Temperature, TJDevice type Limits Unit Min Max Input voltage range VIN-55C to +125C 01 -36.0 -3.0 V Internal reference VREFVNR/SS = VREF +25 C 01 -1.22 -1.142 V Output voltage 4/ range VOUT|VIN| | VOUT(NOM)|

19、+ 1.0 V -55C to +125C 01 -33.0 VREFV Nominal accuracy VOUT|VIN| = | VOUT(NOM)| + 0.5 V +25 C 01 -1.5 +1.5 %VOUTOverall accuracy VOUT| VOUT(NOM)| + 1.0 V |VIN| 35 V, 1 mA IOUT 200 mA -55C to +125C 01 -2.85 +2.85 %VOUTLine regulation VRLINE| VOUT(NOM)| + 1.0 V |VIN| 35 V, +25 C 01 0.14 typical %VOUTLo

20、ad regulation VRLOAD1 mA IOUT 200 mA +25 C 01 0.04 typical %VOUTDropout voltage |VDO| VIN= 95% VOUT(NOM), IOUT= 100 mA -55C to +125C 01 216 typical mV VIN= 95% VOUT(NOM), IOUT= 200 mA 600 Current limit ILIMVOUT= 90% VOUT(NOM)-55C to +125C 01 220 500 mA Ground current IGNDIOUT= 0 mA -55C to +125C 01

21、100 A IOUT= 100 mA 950 typical Shutdown supply current |ISHDN| VEN= +0.4 V -55C to +125C 01 3.0 A VEN= -0.4 V 3.0 Feedback 5/ current IFB-55C to +125C 01 100 nA Enable current |IEN| VEN= |VIN| = | VOUT(NOM)| + 1.0 V -55C to +125C 01 1.0 A VIN= VEN= -35 V 1.0 VIN= -35 V, VEN= +15 V 1.2 See footnotes

22、at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/11619 REV PAGE 6 TABLE I. Electrical performance characteristics Continued. 1/ Test Symbol Conditions 2/ 3/T

23、emperature, TADevice type Limits Unit Min Max Positive enable high level voltage V+EN_HI-55C to +125C 01 +2.0 +15 V -55C to +85C +1.8 +15 Positive enable low level voltage V+EN_LO-55C to +125C 01 0 +0.4 V Negative enable high level voltage V-EN_HI-55C to +125C 01 VIN-2.0 V Negative enable low level

24、voltage V-EN_LO-55C to +125C 01 -0.4 0 V Output noise voltage VNOISEVIN= -3 V, VOUT(NOM)= VREF, COUT= 10 F, CNR/SS= 10 nF, BW = 10 Hz to 100 kHz -55C to +125C 01 15.1 typical VRMSVIN= -6.2 V, VOUT(NOM)= -5 V, COUT= 10 F, CNR/SS= CBYP= 10 nF, 6/ BW = 10 Hz to 100 kHz 17.5 typical Power supply rejecti

25、on ratio PSRR VIN= -6.2 V, VOUT(NOM)= -5 V, COUT= 10 F, CNR/SS= CBYP= 10 nF, 6/ f = 120 Hz -55C to +125C 01 72 typical dB Thermal shutdown temperature TSDShutdown, temperature increasing -55C to +125C 01 +170 typical C Reset, temperature decreasing +150 typical 1/ Testing and other quality control t

26、echniques are used to the extent deemed necessary to assure product performance over the specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In the absence of specific parametric testing, product perfo

27、rmance is assured by characterization and/or design. 2/ At operating conditions, VIN 0 V, VOUT(NOM) VREF 0 V. At regulation, VIN VOUT(NOM)- |VDO|. IOUT 0 flows from OUT to IN. 3/ Unless otherwise specified, at TJ= -55C to +125C, |VIN| = | VOUT(NOM)| + 1.0 V or |VIN| = 3.0 V (whichever is greater), V

28、EN= VIN, IOUT= 1 mA, CIN= 2.2 F, COUT= 2.2 F, CNR/SS= 0 nF, and the FB pin tied to OUT. 4/ To ensure stability at no load conditions, a current from the feedback resistive network equal to or greater than 5 A is required. 5/ IFB 0 flows into the device. 6/ CBYPrefers to a bypass capacitor connected

29、to the FB and OUT pins. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/11619 REV PAGE 7 Case X FIGURE 1. Case outline. Provided by IHSNot for ResaleNo reproduction or netwo

30、rking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/11619 REV PAGE 8 Case X Symbol Dimensions Inches Millimeters Min Max Min Max A - 0.043 - 1.10 A1 0.001 0.005 0.05 0.15 b 0.009 0.014 0.25 0.38 c 0.005 0.009 0.13 0.23 D 0.114 0.1

31、22 2.90 3.10 e 0.025 BSC 0.65 BSC E 0.114 0.122 2.90 3.10 E1 0.187 0.198 4.75 5.05 L 0.015 0.027 0.40 0.70 L1 0.009 BSC 0.25 BSC NOTES: 1. Controlling dimensions are millimeters, inch dimensions are given for reference only. 2. Body dimensions do not include mold and flash or protrusion. 3. This pac

32、kage is designed to be soldered to a thermal pad on the board. Refer to technical brief power pad thermally enhanced package, manufacturers literature number SLMA002 for information regarding recommended board layout. 4. See additional figure in the manufacturers datasheet for details regarding the

33、exposed thermal pad features and dimension. 5. Falls within reference to JEDEC MO-187-AA-T. FIGURE 1. Case outline - Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V

34、62/11619 REV PAGE 9 Device type 01 Case outline X Terminal number Terminal symbol Description 1 OUT Regulator output. A capacitor 2.2 F must be tied from this pin to ground to assure stability. 2 FB This pin is the input to the control loop error amplifier. It is used to set the output voltage of th

35、e device. 3 NC Not internally connected. This pin must either be left open or tied to GND. 4 GND Ground. 5 EN This pin turns the regulator on or off. If VEN V+EN_HIor VEN V-EN_HI, the regulator is enabled. If V+EN_LO VEN V-EN_LO, the regulator is disabled. The EN pin can be connected to IN, if not u

36、sed. |VEN| |VIN|. 6 NR/SS Noise reduction pin. Connecting an external capacitor to this pin bypass noise generated by the internal bandgap. This capacitor allows RMS noise to be reduced to very low levels and also controls the soft start function. 7 DNC Do not connect. Do not route this pin to any e

37、lectrical net, not even ground or IN. 8 IN Input supply. Thermal pad Must either be left open or tied to GND. Solder to printed circuit board (PCB) plane to enhanced thermal performance. FIGURE 2. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without lice

38、nse from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/11619 REV PAGE 10 FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236

39、DWG NO. V62/11619 REV PAGE 11 4. VERIFICATION 4.1 Product assurance requirements. The manufacturer is responsible for performing all inspection and test requirements as indicated in their internal documentation. Such procedures should include proper handling of electrostatic sensitive devices, class

40、ification, packaging, and labeling of moisture sensitive devices, as applicable. 5. PREPARATION FOR DELIVERY 5.1 Packaging. Preservation, packaging, labeling, and marking shall be in accordance with the manufacturers standard commercial practices for electrostatic discharge sensitive devices. 6. NOT

41、ES 6.1 ESDS. Devices are electrostatic discharge sensitive and are classified as ESDS class 1 minimum. 6.2 Configuration control. The data contained herein is based on the salient characteristics of the device manufacturers data book. The device manufacturer reserves the right to make changes withou

42、t notice. This drawing will be modified as changes are provided. 6.3 Suggested source(s) of supply. Identification of the suggested source(s) of supply herein is not to be construed as a guarantee of present or continued availability as a source of supply for the item. Vendor item drawing administra

43、tive control number 1/ Device manufacturer CAGE code Top side marking Vendor part number 2/ 3/ V62/11619-01XE 01295 PXCM TPS7A3001MDGNTEP 1/ The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation. 2/ For the most current package

44、 and ordering information, see the package option addendum at the end of the manufacturers data sheet. 3/ Package drawings, thermal data, and symbolization are available from the manufacturer. CAGE code Source of supply 01295 Texas Instruments, Inc. Semiconductor Group8505 Forest Lane P.O. Box 660199 Dallas, TX 75243 Point of contact: U.S. Highway 75 South P.O. Box 84, M/S 853 Sherman, TX 75090-9493 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-