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本文(DLA DSCC-VID-V62 12630-2012 MICROCIRCUIT DUAL CHANNEL DIGITAL ISOLATOR MONOLITHIC SILICON.pdf)为本站会员(eventdump275)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA DSCC-VID-V62 12630-2012 MICROCIRCUIT DUAL CHANNEL DIGITAL ISOLATOR MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE APPROVED Prepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV PAGE 1 2 3 4 5 6 7 8 9 10 11 12 13 PMIC N/A PREPARED BY Phu H. Nguyen DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil/ Orig

2、inal date of drawing YY MM DD CHECKED BY Phu H. Nguyen TITLE MICROCIRCUIT, DUAL CHANNEL DIGITAL ISOLATOR, MONOLITHIC SILICON 12-10-09 APPROVED BY Thomas M. Hess SIZE A CODE IDENT. NO. 16236 DWG NO. V62/12630 REV PAGE 1 OF 13 AMSC N/A 5962-V005-13 Provided by IHSNot for ResaleNo reproduction or netwo

3、rking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12630 REV PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance dual channel digital isolator microcircuit, with an operating temperatu

4、re range of -55C to +105C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/12630 - 01 X B Drawing Device typ

5、e Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s). Device type Generic Circuit function 01 ADuM1200-EP Dual channel digital isolator 1.2.2 Case outline(s). The case outlines are as specified herein. Outline letter Number of pins JEDEC PUB 95 Package style X 8

6、 JEDEC MS-012-AA Small Outline Package 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacturer: Finish designator Material A Hot solder dip B Tin-lead plate C Gold plate D Palladium E Gold flash palladium Z Other Provided by IHSNot

7、for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12630 REV PAGE 3 1.3 Absolute maximum ratings. 1/ Supply voltage, (VDD1, VDD2) . -0.5 V to +7.0 V 2/ Input voltage, (VIA, VIB) -0.5 V to VDDI+ 0

8、.5 V 2/ 3/ Output voltage, (VOA, VOB) . -0.5 V to VDDO+0.5 V 2/ 3/ Average output current per pin (IO) -11 mA to +11 mA 4/ Common mode transients (CML, CMH) -100 kV/s to +100 kV/s 5/ Ambient operating temperature, (TA) . -55C to +125C Storage temperature, (TST) -55C to 150C 1.4 Recommended operating

9、 conditions. Supply voltage, (VDD1, VDD2) . 2.7 V to 5.5 V 2/ Input signal rise and fall times . 1.0 ms Operating temperature, (TA) -55C to +105C 1.5 Package characteristics. Resistance (Input to output), RI-O . 1012 6/ Capacitance (Input to output) CI-O . 1.0 pF (at f = 1 MHz) Input capacitance, CI

10、. 4.0 pF Junction to case thermal resistance,(Side 1) JCI46 C/W 7/ Junction to case thermal resistance,(Side 2) JCO. 41 C/W 2. APPLICABLE DOCUMENTS JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JEP95 Registered and Standard Outlines for Semiconductor Devices (Copies of these documents are availab

11、le online at http:/www.jedec.org or from JEDEC Solid State Technology Association, 3103 North 10th Street, Suite 240S, Arlington, VA 22201.) 1/ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operat

12、ion of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability. 2/ All voltages are relative to their respective ground. 3/ VDDIand VDD

13、Orefer to the supply voltages on the input and output sides of a given channel, respectively. 4/ See FIGURE 6 for maximum rated current values for various temperatures. 5/ Refers to common mode transients exceeding the absolute maximum ratings can cause latch up or permanent damage. 6/ The device is

14、 considered a 2-terminal device; Pin1, Pin2, Pin3, and Pin4 are shorted together, and Pin5, Pin6, Pin7, and Pin8 are shorted together. 7/ Thermocouple located at center of package underside. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AN

15、D MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12630 REV PAGE 4 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code, or logo B. Pin 1 identifier C. ESD

16、S identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as speci

17、fied in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outline. The case outline shall be as shown in 1.2.2 and figure 1. 3.5.2 Terminal connections. The terminal conn

18、ections shall be as shown in figure 2. 3.5.3 Terminal function. The terminal function shall be as shown in figure 3. 3.5.4 Truth table. The truth table shall be as shown in figure 4. 3.5.5 Functional block diagram. The functional block diagram shall be as shown in figure 5. 3.5.6 Thermal derating cu

19、rve. The thermal derating curve shall be as shown in figure 6. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12630 REV PAGE 5 TABLE I. Electrical performance characteristi

20、cs. 1/ Test Symbol Test conditions 4.5 V VDD1 5.5 V 4.5 V VDD2 5.5 V 2/ Limits Unit Min Typ Max 5 V OPERATIONS DC specifications Input supply current per channel, quiescent IDDI(Q)0.50 0.60 mA Output supply current per channel, quiescent IDDO(Q)0.19 0.30 mA Total supply current, two channels 3/ DC t

21、o 2 Mbps VDD1supply current VDD2supply current 10 Mbps VDD1supply current VDD2supply current 25 Mbps VDD1supply current VDD2supply current IDD1(Q) IDD2(Q) IDD1(Q) IDD2(Q) IDD1(Q) IDD2(Q) 4/ 4/ 5/ 5/ 6/ 6/ 1.1 0.5 4.3 1.3 10 2.8 1.4 0.8 5.5 2.0 13 3.4 mA Input currents IIA, IIB-10 +0.01 +10 A Logic h

22、igh input threshold VIH0.7 x 7/ V Logic low input threshold VIL0.3 x 7/ Logic high output voltages VOAH, VOBHIOX= -20 A, VIX= VIXH7/ - 0.1 5.0 IOX= -20 A, VIX= VIXH7/ - 0.5 4.8 Logic low output voltages VOAL, VOBLIOX= 20 A, VIX= VIXL0.0 0.1 IOX= 400 A, VIX= VIXL0.04 0.1 IOX= 4 mA, VIX= VIXL0.2 0.4 S

23、witching specifications Minimum pulse width 8/ PW 20 40 ns Maximum data rate 9/ 25 50 Mbps Propagation delay 10/ tPHL, tPLH20 45 ns Pulse width distortion, |tPLH tPHL| 10/ PWD 3 Propagation delay skew 11/ tPSK15 Channel to channel matching 12/ tPSKCD/tPSKOD3 Output rise/fall time (10% to 90%) tR/tF2

24、.5 Common mode transient immunity Logic high output 13/ Logic low output 13/ |CMH| |CML| VIX= VDD1, VDD2, VCM= 1000 V, transient magnitude = 800 V VIX= 0 V, VCM= 1000 V, transient magnitude = 800 V 25 25 35 35 kV/s Refresh rate fr1.2 Mbps Dynamic supply current per channel 14/ Input IDDI(D)0.19 mA/M

25、bps Output IDDO(D)0.05 See footnote at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12630 REV PAGE 6 TABLE I. Electrical performance characteristics - Conti

26、nued. 1/ Test Symbol Test conditions 2.7 V VDD1 3.6 V 2.7 V VDD2 3.6 V 15/ Limits Unit Min Typ Max 3 V OPERATION DC specifications Input supply current per channel, quiescent IDDI(Q)0.26 0.35 mA Output supply current per channel, quiescent IDDO(Q)0.11 0.20 mA Total supply current, two channels 3/ DC

27、 to 2 Mbps VDD1supply current VDD2supply current 10 Mbps VDD1supply current VDD2supply current 25 Mbps VDD1supply current VDD2supply current IDD1(Q) IDD2(Q) IDD1(Q) IDD2(Q) IDD1(Q) IDD2(Q) 4/ 4/ 5/ 5/ 6/ 6/ 0.6 0.2 2.2 0.7 5.2 1.5 1.0 0.6 3.4 1.1 7.7 2.0 mA Input currents IIA, IIB-10 +0.01 +10 A Log

28、ic high input threshold VIH0.7 x 7/ V Logic low input threshold VIL0.3 x 7/ Logic high output voltages VOAH, VOBHIOX= -20 A, VIX= VIXH7/ - 0.1 3.0 IOX= -20 A, VIX= VIXH7/ - 0.5 2.8 Logic low output voltages VOAL, VOBLIOX= 20 A, VIX= VIXL0.0 0.1 IOX= 400 A, VIX= VIXL0.04 0.1 IOX= 4 mA, VIX= VIXL0.2 0

29、.4 Switching specifications Minimum pulse width 8/ PW 20 40 ns Maximum data rate 9/ 25 50 Mbps Propagation delay 10/ tPHL, tPLH20 55 ns Pulse width distortion, |tPLH tPHL| 10/ PWD 3 Propagation delay skew 11/ tPSK16 Channel to channel matching 12/ tPSKCD/tPSKOD3 Output rise/fall time (10% to 90%) tR

30、/tF2.5 Common mode transient immunity Logic high output 13/ Logic low output 13/ |CMH| |CML| VIX= VDD1, VDD2, VCM= 1000 V, transient magnitude = 800 V VIX= 0 V, VCM= 1000 V, transient magnitude = 800 V 25 25 35 35 kV/s Refresh rate fr1.1 Mbps Dynamic supply current per channel 14/ Input IDDI(D)0.10

31、mA/Mbps Output IDDO(D)0.03 See footnote at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12630 REV PAGE 7 TABLE I. Electrical performance characteristics - C

32、ontinued. 1/ Test Symbol Test conditions 16/ Limits Unit Min Typ Max MIXED 5V/3V or 3 V/5 V OPERATION DC specifications Input supply current per channel, quiescent 5 V/3 V operation 3 V/5 V operation IDDI(Q)0.50 0.26 0.6 0.35 mA Output supply current per channel, quiescent 5 V/3 V operation 3 V/5 V

33、operation IDDO(Q)0.11 0.19 0.20 0.25 mA Total supply current, two channels 3/ DC to 2 Mbps VDD1supply current 5 V/3 V operation 3 V/5 V operation VDD2supply current 5 V/3 V operation 3 V/5 V operation 10 Mbps VDD1supply current 5 V/3 V operation 3 V/5 V operation VDD2supply current 5 V/3 V operation

34、 3 V/5 V operation 25 Mbps VDD1supply current 5 V/3 V operation 3 V/5 V operation VDD2supply current 5 V/3 V operation 3 V/5 V operation IDD1(Q) IDD2(Q) IDD1(Q)IDD2(Q)IDD1(Q)IDD2(Q) 4/ 4/ 4/ 4/ 5/ 5/ 5/ 5/ 6/ 6/ 6/ 6/ 1.1 0.6 0.2 0.5 4.3 2.2 0.7 1.3 10 5.2 1.5 2.8 1.4 1.0 0.6 0.8 5.5 3.4 1.1 2.0 13

35、7.7 2.0 3.4 mA Input currents IIA, IIB-10 +0.01 +10 A Logic high input threshold VIH0.7 x 7/ V Logic low input threshold VIL0.3 x 7/ Logic high output voltages VOAH, VOBHIOX= -20 A, VIX= VIXH7/ - 0.1 3.0 IOX= -20 A, VIX= VIXH7/ - 0.5 2.8 Logic low output voltages VOAL, VOBLIOX= 20 A, VIX= VIXL0.0 0.

36、1 IOX= 400 A, VIX= VIXL0.04 0.1 IOX= 4 mA, VIX= VIXL0.2 0.4 See footnote at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12630 REV PAGE 8 TABLE I. Electrica

37、l performance characteristics - Continued. 1/ Test Symbol Test conditions 16/ Limits Unit Min Typ Max MIXED 5V/3V or 3 V/5 V OPERATION - Continued Switching specifications Minimum pulse width 8/ PW 20 40 ns Maximum data rate 9/ 25 50 Mbps Propagation delay 10/ tPHL, tPLH20 50 ns Pulse width distorti

38、on, |tPLH tPHL| 10/ PWD 3 Propagation delay skew 11/ tPSK15 Channel to channel matching 12/ tPSKCD/tPSKOD3 Output rise/fall time (10% to 90%) 5 V/3 V operation 3 V/5 V operation tR/tF3.0 2.5 Common mode transient immunity Logic high output 13/ Logic low output 13/ |CMH| |CML| VIX= VDD1, VDD2, VCM= 1

39、000 V, transient magnitude = 800 V VIX= 0 V, VCM= 1000 V, transient magnitude = 800 V 25 25 35 35 kV/s Refresh rate 5 V/3 V operation 3 V/5 V operation fr1.2 1.1 Mbps Dynamic supply current per channel 14/ Input 5 V/3 V operation 3 V/5 V operation IDDI(D)0.19 0.10 mA/Mbps Output 5 V/3 V operation 3

40、V/5 V operation IDDO(D)0.03 0.05 See footnote at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12630 REV PAGE 9 TABLE I. Electrical performance characteristi

41、cs - Continued. 1/ 1/ Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over the specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In

42、the absence of specific parametric testing, product performance is assured by characterization and/or design. 2/ All voltages are relative to their respective ground; all min/max specifications apply over the entire recommended operating range, unless otherwise noted; all typical specifications are

43、at TA= 25C, VDD1= VDD2= 5 V. 3/ The supply current values are for both channels combined when running at identical data rates. Output supply current values are specified with no output load present. 4/ DC to 1 MHz logic signal frequency. 5/ 5 MHz logic signal frequency. 6/ 12.5 MHz logic signal freq

44、uency. 7/ (VDD1or VDD2). 8/ The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed. 9/ The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed. 10/ tPHLpropagation delay is measure from 50% le

45、vel of the falling edge of the VIXsignal to the 50% level of the falling edge of the VOXsignal . tPLHpropagation delay is measure from 50% level of the rising edge of the VIXsignal to the 50% level of the rising edge of the VOXsignal. 11/ tPSKis the magnitude of the worst case difference in tPHLand/

46、or tPLHthat is measured between units at the same operating temperature, supply voltages, and output load within the recommended operating conditions. 12/ Codirectional channel to channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on t

47、he same side of the isolation barrier. Opposing directional channel to channel matching is the absolute value on the difference in propagation delays between any two channels with inputs on opposing sides of the isolation barrier. 13/ CMHis the maximum common mode voltage slew rate that can be susta

48、ined while maintaining VOX 0.8 VDD2. CMLis the maximum common mode voltage slew rate that can be sustained while maintaining VOX 0.8 V. The common mode voltage slew rates apply to both rising and falling common mode voltage edges. The transient magnitude is the range over which the common mode is slewed. 14/ Dynamic supply current i

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