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本文(DLA MIL-M-38510 178A-1984 MICROCIRCUITS DIGITAL CMOS MULTIPLEXERS DEMULTIPLEXERS MONOLITHIC SILICON POSITIVE LOGIC《正逻辑单片硅多路复用器 多路信号分离器 CMOS数字微电路》.pdf)为本站会员(eventdump275)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA MIL-M-38510 178A-1984 MICROCIRCUITS DIGITAL CMOS MULTIPLEXERS DEMULTIPLEXERS MONOLITHIC SILICON POSITIVE LOGIC《正逻辑单片硅多路复用器 多路信号分离器 CMOS数字微电路》.pdf

1、MI L-M-38510/178A 30 April 1984 StDING MIL-M-38510/178 28 June 1979 MILITARY SPECIFICATION MICROCIRCUITS, DIGITAL, CMOS, MULTIPLEXERS/DEMULTIPLEXERS MONOLITHIC SILICON, POSITIVE LOGIC This specification is approved for use by all :Depart- ments and Agencies of the Department of defense. I 1. SCOPE 1

2、.1 Scope. This specification covers the detail requirements for monolithic, sili- con, CMOS logic microcircuits. Two product assurance classes and a choice of case outlines and lead finishes are provided and are reflected in the complete part number. 1.2 Part number. The part number shall be in acco

3、rdance with MIL-M-38510. 1.2.1 Device type. The device type shall be as follows: Devi c e type Circuit o1 Single 15-channel MUX/DEMUX o2 Differential 8-channel MUX/DEMUX 03 Quad 2-1 ine-to-1-1 ine data selector/MUX 1.2.2 Device class. The device class shall be the product assurance level as defined

4、in MIL-M-38510. 1.2.3 Case outline. The case outline shall be designated as follows: Outline letter Case outline (see MIL-M-38510, appendix C) E D-2 (16-lead, 1/4“ x 7/8“), dual-in-line package F F-5 (16-lead, 1/4“ x 3/8“), flat package J D-3 (24-1 ead, 1/2“ x 1-1/4“) , dual-in-1 ine package K F-6 (

5、24-lead, 3/8“ x 5/8“), flat package Z F-8 (24-leadY 1/4“ x 3/8“), flat package X F-5 (16-lead, 1/4“ x 3/8“), flat package, except A Y F-6 (24-lead, 3/8“ x 5/8“), flat package, except A U F-8 (24-lead, 1/4“ x 3/8“), flat package, except A dimension = 0.1“ (2.54 mm) max dimension = 0.1“ (2.54 mm) max

6、dimension = 0.1“ (2.54 mm) max NOTES : 1. As an exception to nickel plate or undercoating paragraph of MIL-M-38510, for case outlines X, Y, and U only, the leads of bottom brazed ceramic packages (i.e., configuration 2 of case outlines F-5, F-6, and F-8) may have electroless nickel undercoating whic

7、h shall be 50 to 200 microinches (1.27 to 5.08 vm) thick provided the lead finish is hot solder dip (i.e., finish letter A) and proyided that, after any lead forming, an additional hot solder dip coating is applied which shall extend from the outer tip of the lead to no more than 0.015 inch (0.38 mm

8、) from the package edge. dimension may go to .O00 inch (.O0 mm) mimimum. 2. For bottom or side brazed packages, case outlines F, Y, and U only, the S1 Beneficial comments (recommendations, additions, deletions) and any perti- nent data which may be of use in improving this document should be address

9、ed to: George C, Marshall Space Flight Center, National Aeronautics and Space Administration, ATTN: EG02, Marshall Space Flight Center, AL 35812 by using the self-addressed Standardization Document Improvement Proposal (DD Form 1426) appearing at the end of this document or by letter. r THIS DOCUMEN

10、T CONTAINS PAGES FSC 5962 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-M-38510/17BA 57 W 7777706 0060255 1.3 Absolute maximum ratings. Supply voltage range (VDD-Vss)- - - - - - Input current (each input)- - - - - - - - Input voltage range - -

11、- - - - - - - - - Storage temperature range - - - - - - - - Maximum power dissipation (PD) - - - - - Lead temperature (sol deri ng , 10 seconds) - Thermal resistance, junction-to-case- - - Junction temperature (TJ) - - - - - - - - 1.4 Recommended operating conditions. supply voltage range (v0-v)- -

12、- - - - - Low level input voltage range (VIL) - - - - -0.5 V to +18 V i10 mA 200 mW +3OO0C (See MIL-M-38510, appendix C) +175C 4.5 V to 15 V 0-1.5 V dc Q VDD = 5 V dc, VOL = 10% VDD, VOH = 90% v 0-4.0 V dc 8DY = 15 V dc, 0-2.0 V dc VD - 10 V dc 3.5-5.0 V dc Q IDO = 5 V dc, VOL = 10% VDD, v H = 90% V

13、D 1P.O-15.0 V 8.0-10.0 V dc Q VDD = 10 V dc -55C to +125OC VDD = 15 V dc, High level input voltage range (VIH)- - - - Ambient operating temperature range (TA)- - 2. APPLICABLE DOCUMENTS 2.1 Government specifications and standards Unless otherwise specified, the following specifications and standards

14、, of the issue listed in that issue of the Department of Defense Index of Specifications and Standards specified in the solicitation, form a part of this specification to the extent specified herein. SPEC I FICAT ION MILITARY MI L-M- 38510 - Microcircuits, General Specification for. STANDARD MI L IT

15、ARY MI L-STD-883 - Test Methods and Procedures for Microelectronics. (Copies of specifications, standards, handbooks, drawings, and publications required by manufacturers in connection with specific acquisition functions should be obtained from the contracting activity or as directed by the contract

16、ing officer.) 2.2 Order of precedence. In the event of a conflict between the text of this specification and the references cited herein, the text of this specification shall take precedence. 3. REOU IREMENTS 3.1 Detail specification. The individual item requirements shall be in accordance with MIL-

17、M-38510, and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-M-38510 and herein. Although eutectic die bonding is preferred, epoxy die bonding may be performed. However, the resin !sed shall be Dup

18、ont 5504 Conductive Silver Paste, or equivalent, which is cured at 200 C *1D C for a minimum of 2 hours. The use of equivalent epoxies or cure cycles shall be approved by the qualifying activity. Equivalency shall be demonstrated in data submitted to the qualifying activity for verification. Provide

19、d by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-3.2.1 Terminal connections. The terminal connections shall be as specified on * 3.2.2 Logic diagrams. The logic diagrams shall be as specified on figure 2. figure 1. 3.2.3 Truth tables. The truth tables shall

20、be as specified on figure 3. 3.2.4 Schematic circuits. The schematic circuits shall be submitted to the preparing activity prior to inclusion of a manufacturers device in this specifi: cation and shall be submitted to the qualifying activity as a prerequisite for qualification. All qualified manufac

21、turers schematics shall be maintained and avail ab1 e upon request. 3.2.5 Case outline. The case outline shall be as specified in 1.2.3. 3.3 Lead material and finish. The lead material and finish shall be in accordance with MIL-M-38510 and 6.4 herein. 3.4 Electrical performance characteristics. Unle

22、ss otherwise specified, the electrical performance characteristics are as specified in table I, and apply over the full recommended ambient operating temperature range. device class shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table III. 3.5 E

23、lectrical test requirements. The electrical test requirements for each 3.6 Marking. Marking shall be in accordance with MIL-M-38510. 3.6.1. Total dose radiation hardness identifier. Total dose radiation hardness identifier shall be in accordance with MIL-M-38510 and 4.5.4 herein. 3.6.2 Serialization

24、. All class S devices stiall be serialized in accordance with MI L-M- 38510. 3.6.3 Correctness of indexing and marking. All devices shall be subjected to the final electrical tests specified in table II after part number marking to verify .that they are correctly indexed and identified by part numbe

25、r. Optionally, an approved electrical test may be devised especially for this requirement. 3.7 Microcircuit group assignment. The devices covered by this specification shall be in microcircuit group number 39 (see MIL-M-38510, appendix E). 4. QUALITY ASSURANCE PROVISIONS 4.1 Sampling and inspection.

26、 Sampling and inspection procedures shall be in accordance with MIL-M-38510 and methods 5005 and 5007, as applicable, of MIL-STD-883, except as modified herein. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to qualificati

27、on and quality conformance inspection. The following additional criteria shall apply: a. Delete the sequence specified in 3.1.9 through 3.1.13 of method 5004 and b. Burn-in (method 1015 of MIL-STD-883). substitute lines 1 through 7 of table II herein. (1) Static tests (test condition A) using circui

28、toshown on figure 4, or equivalent. Ambient temperature shall be 125 C minimum. Test dura- tion for each static test shall be 24 hours minimum for class S devices and in accordance with table I of method 1015 for class B devices. (2) Dynamic test (test condition D) using circuit shown on figure 5 eq

29、uivklent. Ambient temperature shall be 125C minimum. Test duration shall be in accordance with table I of method 1015. c. Interim and final electrical parameters shall be as specified in tab herein. or e II 3 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from I

30、HS-,-,-97797Ob 0060257 L d. For class S devices, post dynamic burn-in, or class B devices, post static burn-in, electrical parameter measurements may, at the manufacturers option, be performed separately or included in the final electrical parameter requirements. 4.2.1 Percent defective allowable (P

31、DA). a. The PDA for class S devices shall be 5 percent for static burn-in and 5 percent for dynamic burn-in, based on the exact number of devices submitted to each separate burn-in. b. Static burn-in I and II the failures shall be cumulative for determining c. The PDA for class B devices shall be in

32、 accordance with MIL-M-38510 for PDA. static burn-in. Dynamic burn-in is not required. d. Those devices whose measured characteristics, after burn-in, exceed the specified delta (A) limits or electrical parameter limits specified in table III, subgroup 1, are defective and shall be removed from the

33、lot. The verified failures divided by the total number of devices in the lot initially submitted to burn-in shall be used to determine the percent defective for the lot and the lot shall be accepted or rejected based on the specified PDA. 4.3 Qualification inspection. Qualification inspection shall

34、be in accordance with MIL-M-38510. Inspections to be performed shall be those specified in method 5005 of MIL-STD-883 and herein for arouDs A. By C, D, and E inspections (see 4.4.1 through 4.4.5). 4.4 Quality conformance inspection. Qual accordance with MIL-M-38510 and as specified shall be those sp

35、ecified in method 5005 of M Cy Dy and E inspections (see 4.4.1 through 4 ty conformance inspection shall be in herein. Inspections to be performed L-STD-883 and herein for groups A, B, 4.5). 4.4.1 Group A inspection. Group A inspection shall be in accordance with table I of method 5005 of MIL -STD-8

36、83 and as follows: a. Tests shall be performed in accordance with table II herein. b. Subgroups 5, 6, 7, and 8 of table I of method 5005 of MIL-STD-883 shall be c. Subgroup 4 (Ci measu,rement) shall be measured only for initial qualifi- omitted. cation and after process or design changes which may a

37、ffect input capacitance. Capacitance shall be measured between the designated terminal and Vss at a frequency of 1 MHz. d. Subgroup 12 shall be added to the group A inspection requirements for class S devices using an LTPD of 15 and consist of the procedures, test conditions, and limits specified in

38、 table III. 4.4.2 Group B inspection. Group B inspection shall be in accordance with table II of method 5005 of MIL-STD-883 and as follows: a. Class S steady state life (accelerated) test circuits shall be submitted to the qualifying activity for approval. When the alternate steady state life test i

39、s used, the circuit on figure 5, or equivalent, shall be used. b. A special subgroup shall be added using an LTPD of 15 for classes S and By and shall be measured only for initial qualification and after process or design changes. This subgroup shall consist of a high voltage test of the input prote

40、ction circuits, VZAP (see 4.5.3). c. End-point electrical parameters shall be as specified in table II herein and shall consist only of those subgroups specified in table IIa of test method 5005 of MIL-STD-883, and table II herein. Delta limits shall apply only to subgroup 5 of group B inspections a

41、nd shall consist of tests specified in table IV herein. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-M-38510/178A TABLE I. Electrical performance characteristics. . Condi ti onc vss = o v -55OC 5 TA 5 125OC Unless otherwise specified TA = 25OC

42、y VDD = GND, Vss = Open, Output = Open, IIN = 1 m4 Devi ce type Al 1 Symbol Test - Positive clamping input to DD VIC( pos ) IC (neg Al 1 Negative clamping input to vss TA = 25“C, VDD = Open, Vss = GND, Output = Open, IIN = -1 m4 Or V VDD = 18.0 Vdc, VIN = Vss All input combinations -6.0 Vdc -2.5 VA

43、- Vdc 0.05 Vdc 100 nA -100 nA Vdc - - Vdc - Vdc 0.5 Vdc 1.0 Vdc 1.5 v gx.2 I ou II cs I o v) mu ln mo HI- irr S .r al Lo Cu *. Q II o aJ CL c II E n noao 2 Q Q lA *- o lA lA U L O .+ H U U nv- c u) al Q al U S irr c u) u) aJ L O .r cr, w cr: a w u) 20 H u. I- 3 O P O aJ 9. 3 aJ u al *I- a W I- I- z

44、O 0 W m v - (u W I- 0- z W W u) Y -7s a moo- z 21 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-O6 0060275 3 MIL-M-38510/178A n M c o L n w I- O a - W w v) “0 tI Y E h N W Cu O al n 3 al u .r i cn o a c z O o . W u) Y N W c O 2 W W cn - P T a mo -

45、M W c O 2 W a, %!? m I VI S O C U E O U .I- .I- CI I h Cu- o- Ln PI + e ? cu- o- m p: + cu- ZN ? o- m m ? (Y I Cu- o- ln =?. ? p: I L a, Cun ZE v) 03 Y CLs I 5 O II C Y O0 I- I vJvJ vJ m z9 CnvJ 0 lu W c I- m E E; n 3 W W u aJ .I- n I a J o E al w O O -7- lu i:- al w al. W u) - I- n. E O U I z W c O

46、 z W W v) Y a moo L c H H H al I- n m c al al vJ m _. w F O ? cum Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-n M w n - .w I- O 2 W W u E- - .r i- (u W I- O z W W u) c. - - W c O 7 W W u) u)- “+ Q U CI .r 5“ W I- O z W W m Y I h N- w. (D Y M W I-

47、 O z u): ,ou, L 3 z O h (u W c mg 9.) W W u) Y I- IA W !- O c Lo h VI v c .r IA zu IAS O0 o - -u I 225 h .I- E II L II aJ o 0) CLw n -. c oz a. Oeo 2 IA B IA* n IA u ou L 3g e nL n EY H mo E -r aJ ow c wl- m *? VI w WE Errr aJ OL aJ VI- IA m n rum d w v) al c aJ 0 E m c m m aJ L O .r a W p: LL E Pro

48、vided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-M-385L0/178A 59 m 7977706 0060277 7 MIL-M-3d510/178A - I TTTTT TTT Il t 4 I li, Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-Device type O1 - O 3CH6

49、 CH9 22 e + 4 CH5 CHIO 21 + 5 CH4 CHI1 20 2 e- 6 CH3 CH12 19 -e + 7 CH2 CH13 16. 6 CHI CH14 17 e e 9 CHO CHI5 16 e - 10 A INH 15 II B c 14 -12 vss D 13 - I 1 (INCLUDES WIRING AND PROB E CA PAC I TAN C E ) I - SELECT CHANNEL TEST CIRCUIT - UNDER TEST “OD INPUT O/I ov 0 H OUTPUT VOL DYNAMI C TEST WAVE FORMS I /o - Input pulse VGEN = VDD I1 .O% tPH = 1.0 tO.l us

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