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本文(DLA MIL-PRF-38535 K-2013 INTEGRATED CIRCUITS (MICROCIRCUITS) MANUFACTURING GENERAL SPECIFICATION FOR.pdf)为本站会员(lawfemale396)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA MIL-PRF-38535 K-2013 INTEGRATED CIRCUITS (MICROCIRCUITS) MANUFACTURING GENERAL SPECIFICATION FOR.pdf

1、 MIL-PRF-38535K 20 December 2013 SUPERSEDING MIL-PRF-38535J 28 December 2010 PERFORMANCE SPECIFICATION INTEGRATED CIRCUITS (MICROCIRCUITS) MANUFACTURING, GENERAL SPECIFICATION FOR AMSC N/A FSC 5962 INCH-POUND Comments, suggestions, or questions on this document should be addressed to: DLA Land and M

2、aritime, ATTN: VAC, P.O. Box 3990, Columbus, OH 43218-3990, or emailed to CMOSdla.mil. Since contact information can change, you may want to verify the currency of this address information using the ASSIST Online database at https:/assist.dla.mil. The documentation and process conversion measures ne

3、cessary to comply with this revision shall be completed by June 30, 2014 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-PRF-38535K CONTENTS PARAGRAPH PAGE ii 1 SCOPE 1 1.1 Scope 1 2. APPLICABLE DOCUMENTS 1 2.1 General . 1 2.2 Government document

4、s 2 2.2.1 Specifications, standards, and handbooks . 2 2.2.2 Other Government documents, drawings, and publications . 2 2.3 Non-Government publications . 2 2.4 Order of precedence . 3 3. REQUIREMENTS . 3 3.1 General . 3 3.1.1 Reference to applicable device specification 3 3.2 Item requirements . 3 3

5、.2.1 Certification of conformance and acquisition traceability 4 3.3 Quality management (QM) program 5 3.3.1 Manufacturers review system 5 3.3.2 QM plan 5 3.3.3 Self-assessment program 5 3.3.4 Change control procedures 5 3.3.4.1 Discontinuation of products . 5 3.4 Requirements for listing on a QML 5

6、 3.4.1 QML certification requirements 6 3.4.1.1 Process capability demonstration 6 3.4.1.1.1 New technology insertion . 6 3.4.1.2 Management and technology validation 7 3.4.1.3 On-site validation 7 3.4.1.3.1 Second and third party validations . 7 3.4.1.3.2 Radiation source of supply (RSS) validation

7、s 7 3.4.1.4 Technology validation . 7 3.4.1.4.1 Package design selection reviews . 8 3.4.1.5 Manufacturer self-validation 9 3.4.1.6 Change management system . 9 3.4.1.7 Deficiencies and concerns 9 3.4.1.8 Letter of certification 9 3.4.2 QML qualification requirements 9 3.4.2.1 Qualification extensio

8、n 9 3.4.3 Qualification to RHA levels . 10 3.4.4 QML listing . 10 3.4.5 Maintenance and retention of QML 10 3.4.6 QML line shutdown 10 3.4.7 Revalidation reviews 10 3.4.8 Performance requirements for class T devices 10 3.4.8.1 Class T radiation requirements . 11 3.5 Device specification 11 3.6 Marki

9、ng of microcircuits 11 3.6.1 Index point 11 3.6.2 Part or identification number (PIN) . 12 3.6.2.1 RHA designator . 13 3.6.2.2 Drawing designator . 13 3.6.2.2.1 Military designator 13 3.6.2.3 Device class designator 13 3.6.2.4 Case outline 13 3.6.2.5 Lead finish . 13 3.6.3 Certification mark . 13 3.

10、6.3.1 QD certification mark . 13 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-PRF-38535K CONTENTS PARAGRAPH PAGE iii 3.6.3.2 JAN or J mark . 14 3.6.4 Manufacturers identification . 14 3.6.4.1 Code for assembly sites 14 3.6.5 Country of origin

11、. 14 3.6.6 Date code . 14 3.6.7 Marking location and sequence 14 3.6.7.1 Beryllium oxide package identifier . 14 3.6.7.2 Electrostatic discharge (ESD) sensitivity identifier 14 3.6.8 QML marked product . 15 3.6.9 Marking on container 15 3.7 Remarking . 15 3.8 Screening and test 15 3.9 Technology con

12、formance inspection (TCI) 15 3.9.1 TCI assessment . 15 3.10 Solderability . 15 3.11 Traceability 15 3.12 ESD control . 15 3.13 Recycled, recovered, or environmentally preferable materials 15 3.14 Alternate test requirements . 16 3.15 Passive elements 16 3.15.1 Capacitors 16 4. VERIFICATION . 17 4.1

13、Verification 17 4.2 Screening 17 4.2.1 Screen testing failures 17 4.2.2 Screening resubmission criteria . 17 4.2.3 Electrostatic discharge (ESD) sensitivity 17 4.3 Technology conformance inspection (TCI) 17 4.4 Qualification inspection . 17 5. PACKAGING . 34 5.1 Packaging . 34 6. NOTES 34 6.1 Intend

14、ed use . 34 6.1.1 Class T . 34 6.2 Acquisition requirements . 34 6.3 Qualification 34 6.4 Terms and definitions 34 6.4.1 Microelectronics . 34 6.4.2 Element (of a microcircuit or integrated circuit) 34 6.4.3 Substrate (of a microcircuit or integrated circuit) 35 6.4.4 Integrated circuit (microcircui

15、t) . 35 6.4.4.1 Multichip microcircuit . 35 6.4.4.2 Monolithic microcircuit . 35 6.4.4.3 Microcircuit module . 35 6.4.5 Production lot . 35 6.4.6 Inspection lot 35 6.4.7 Wafer lot . 35 6.4.8 Percent defective allowable (PDA) . 35 6.4.9 Delta limit . 35 6.4.10 Rework . 35 6.4.11 Final seal 35 6.4.12

16、Acquiring activity 36 6.4.13 Qualifying activity (QA) . 36 6.4.14 Parts per million (PPM) 36 6.4.15 Device type 36 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-PRF-38535K CONTENTS PARAGRAPH PAGE iv 6.4.16 Die type 36 6.4.17 Radiation hardness

17、assurance (RHA) 36 6.4.18 Electrostatic discharge (ESD) sensitivity 36 6.4.19 Package family . 36 6.4.20 Technology flow . 36 6.4.21 Qualified Manufacturers Listing (QML) 36 6.4.22 Third party design center 36 6.4.23 Radiation source of supply (RSS) 36 6.4.24 Form . 36 6.4.25 Fit . 36 6.4.26 Functio

18、n . 36 6.4.27 Class M 37 6.4.28 Class N. 37 6.4.29 Class Q 37 6.4.30 Class V . 37 6.4.31 Class Y . 37 6.4.32 Class B . 37 6.4.33 Class S . 37 6.4.34 Class T . 37 6.4.35 Qualified manufacturers line 37 6.4.36 Test optimization 37 6.4.37 Audit team 37 6.4.38 Class level B 37 6.4.39 Class level S 37 6.

19、4.40 Class level vs Class . 38 6.4.41 Second party facility . 38 6.4.42 Third party facility . 38 6.4.43 New technology 38 6.4.44 Mature technology 38 6.4.45 Lot date code . 38 6.4.46 Storage temperature 38 6.4.47 Multi-product wafer(MPW) 38 6.4.48 Package integrity demonstration test plan(PIDTP) .

20、38 6.5 Discussion . 39 6.6 Additional reference documents 41 6.7 Subject term (key word) listing 42 6.8 List of acronyms 43 6.9 Environmentally preferable material 45 6.10 Changes from previous issue 45 A.1 SCOPE . 46 A.1.1 Scope. 46 A.2 APPLICABLE DOCUMENTS 46 A.2.1 General 46 A.2.2 Government docu

21、ments. 46 A.2.2.1 Specifications, standards, and handbooks 46 A.2.2.2 Other Government documents, drawings, and publications 47 A.2.3 Non-Government publications . 47 A.2.4 Order of precedence 48 A.3 REQUIREMENTS . 48 A.3.1 General 48 A.3.1.1 Reference to device specification or drawing 48 A.3.1.2 C

22、onflicting requirements . 49 A.3.1.3 Terms, definitions, symbols and requirements 49 A.3.1.3.1 Microelectronics . 49 A.3.1.3.2 Element (of a microcircuit or integrated circuit) 49 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-PRF-38535K CONTENT

23、S PARAGRAPH PAGE v A.3.1.3.3 Substrate (of a microcircuit or integrated circuit) 49 A.3.1.3.4 Integrated circuit (microcircuit) . 49 A.3.1.3.4.1 Multichip microcircuit . 49 A.3.1.3.4.2 Hybrid microcircuit 49 A.3.1.3.4.3 Monolithic microcircuit (or integrated circuit) . 49 A.3.1.3.4.4 Film microcircu

24、it (or film integrated circuit) 49 A.3.1.3.5 Microcircuit module 49 A.3.1.3.6 Production lot . 50 A.3.1.3.7 Inspection lot - class level S . 50 A.3.1.3.8 Inspection lot - class level B . 50 A.3.1.3.9 Inspection sublot - class level S . 50 A.3.1.3.10 Inspection lot split - class level B . 50 A.3.1.3.

25、11 Wafer lot 50 A.3.1.3.12 Package type . 50 A.3.1.3.13 Microcircuit group 50 A.3.1.3.14 Percent defective allowable (PDA) 50 A.3.1.3.15 Delta limit (). 50 A.3.1.3.16 Rework . 51 A.3.1.3.17 Final seal . 51 A.3.1.3.18 Acquiring activity 51 A.3.1.3.19 Qualifying activity . 51 A.3.1.3.20 Device type 51

26、 A.3.1.3.21 Die type 51 A.3.1.3.22 Antistatic 51 A.3.1.3.23 Conductive . 51 A.3.1.3.24 Insulating . 51 A.3.1.3.25 Dissipative . 51 A.3.1.3.26 Radiation hardness assurance (RHA) 51 A.3.1.3.27 Electrostatic discharge (ESD) sensitivity 51 A.3.1.3.28 Custom microcircuit . 52 A.3.1.3.29 Die family . 52 A

27、.3.1.3.30 Package family 52 A.3.1.3.31 Military operating temperature range . 52 A.3.1.3.32 Process monitor . 52 A.3.1.3.33 Device specification . 52 A.3.1.3.34 Class level B 52 A.3.1.3.35 Class level S 52 A.3.2 Item requirements 52 A.3.2.1 Electrical test requirements . 52 A.3.2.2 Alternate die/fab

28、rication requirements 53 A.3.2.2.1 Example C of C 53 A.3.2.2.2 Die evaluation requirements 54 A.3.3 Classification of requirements 54 A.3.3.1 Certification of conformance and acquisition traceability 55 A.3.4 Quality assurance requirements 56 A.3.4.1 Qualification 56 A.3.4.1.1 Compliance validation

29、56 A.3.4.1.2 Process monitor programs . 56 A.3.4.1.2.1 Inspection by scanning electron microscope (SEM) . 56 A.3.4.1.2.2 Wire bonding . 56 A.3.4.1.2.3 Die attachment 56 A.3.4.1.2.4 Lid seal . 56 A.3.4.1.2.5 Particle detection 56 A.3.4.1.2.6 Lead trimming and final lead finish thickness 57 A.3.4.1.3

30、Qualification to RHA levels 57 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-PRF-38535K CONTENTS PARAGRAPH PAGE vi A.3.4.1.4 Qualification to ESD classes 58 A.3.4.2 Changes and notification of change to product or quality assurance program . 59

31、 A.3.4.2.1 Discontinuation of products 59 A.3.4.3 Screening 59 A.3.4.4 Quality conformance inspection (QCI) 59 A.3.4.5 Wafer lot acceptance 59 A.3.4.6 Traceability . 59 A.3.4.6.1 Lot travelers . 59 A.3.4.7 Government source inspection . 59 A.3.5 Design and construction 59 A.3.5.1 Package 60 A.3.5.1.

32、1 Polymeric materials 60 A.3.5.1.2 Package configurations 60 A.3.5.2 Metals . 60 A.3.5.3 Other materials . 60 A.3.5.4 Design documentation 60 A.3.5.4.1 Die topography 60 A.3.5.4.2 Die intraconnection pattern 60 A.3.5.4.3 Die to terminal interconnection 61 A.3.5.4.4 Schematic diagrams 61 A.3.5.5 Inte

33、rnal conductors . 61 A.3.5.5.1 Metallization thickness . 63 A.3.5.5.2 Internal wire size and material . 63 A.3.5.5.3 Internal lead wires 64 A.3.5.5.4 Verification of glassivation layer integrity . 64 A.3.5.6 Package element material and finish 64 A.3.5.6.1 Package material . 64 A.3.5.6.2 Lead or ter

34、minal material . 65 A.3.5.6.3 Microcircuit finishes 65 A.3.5.6.3.1 Finish thickness measurements 65 A.3.5.6.3.2 Lead finish 66 A.3.5.6.3.3 Package element (other than lead or terminal) finish 66 A.3.5.6.3.4 Hot solder dip 66 A.3.5.6.3.5 Tin-lead plate 67 A.3.5.7 Die plating and mounting 67 A.3.5.8 G

35、lassivation 69 A.3.5.9 Die thickness 70 A.3.5.10 Laser scribing . 70 A.3.5.11 Internal lead separation for class level S devices . 70 A.3.6 Marking of microcircuits . 70 A.3.6.1 Index point 70 A.3.6.2 PIN 71 A.3.6.2.1 Military designator 71 A.3.6.2.2 RHA designator . 71 A.3.6.2.3 Device specificatio

36、n . 71 A.3.6.2.4 Device type 71 A.3.6.2.5 Device class . 71 A.3.6.2.6 Case outline . 71 A.3.6.2.7 Lead finish . 71 A.3.6.2.8 Drawing designator 71 A.3.6.3 Identification codes . 72 A.3.6.3.1 Class level B die fabrication date code 72 A.3.6.3.2 Inspection lot identification code for class levels S an

37、d B 72 A.3.6.4 Manufacturers identification . 72 A.3.6.5 Manufacturers designating symbol . 72 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-PRF-38535K CONTENTS PARAGRAPH PAGE vii A.3.6.6 Country of origin . 72 A.3.6.7 Compliance indicator/cert

38、ification mark 72 A.3.6.8 Serialization 72 A.3.6.9 Marking location and sequence 73 A.3.6.9.1 Beryllium oxide package identifier . 73 A.3.6.9.2 Electrostatic discharge (ESD) sensitivity identifier . 73 A.3.6.10 Marking on container 73 A.3.6.11 Marking option for controlled storage of class level B .

39、 73 A.3.6.12 Marking option for qualification or quality conformance inspection (QCI) . 73 A.3.6.13 Remarking 74 A.3.7 Workmanship . 74 A.3.7.1 Rework provisions 74 A.3.7.1.1 Rebonding of monolithic devices . 74 A.4 VERIFICATION . 75 A.4.1 Responsibility for inspection 75 A.4.1.1 Inspection during m

40、anufacture 75 A.4.1.1.1 Metal package isolation test for class level S devices . 75 A.4.1.2 Control and inspection of acquisition sources . 75 A.4.1.3 Control and inspection records . 75 A.4.1.4 Government source inspection (GSI) 75 A.4.1.5 Manufacturer control over its distributors 75 A.4.1.6 Distr

41、ibutor inventory, traceability and handling control 75 A.4.2 Solderability . 75 A.4.3 General inspection conditions 75 A.4.3.1 Classification of inspections and tests 75 A.4.3.2 Sampling . 76 A.4.3.2.1 Disposal of samples . 76 A.4.3.2.2 Destructive tests 76 A.4.3.2.3 Nondestructive tests 77 A.4.3.3

42、Formation of lots . 77 A.4.3.3.1 Resubmission of failed lots 78 A.4.3.4 Test method deviation. 78 A.4.3.5 Procedure in case of test equipment failure or operator error . 78 A.4.3.5.1 Procedure for sample tests 78 A.4.3.5.2 Procedure for screening tests 78 A.4.3.5.3 Failure and corrective action repo

43、rts 78 A.4.3.6 Electrical test equipment verification . 78 A.4.3.7 Manufacturer imposed tests 79 A.4.4 Qualification procedures 79 A.4.4.1 General . 79 A.4.4.2 Qualification 79 A.4.4.2.1 Inspection routine 79 A.4.4.2.1.1 Sample 79 A.4.4.2.2 Group A electrical testing . 79 A.4.4.2.3 Group B testing 7

44、9 A.4.4.2.4 Groups C and D testing . 79 A.4.4.2.5 Group E testing 79 A.4.4.2.6 Approval of other lead finishes . 80 A.4.4.2.7 Approval of other lead material 80 A.4.4.2.8 Electrostatic discharge (ESD) sensitivity 80 A.4.5 Quality conformance inspection (QCI) . 80 A.4.5.1 General . 80 A.4.5.2 Group A

45、 inspection . 80 A.4.5.3 Group B inspection . 80 A.4.5.4 Group C inspection for class level B only 80 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-PRF-38535K CONTENTS PARAGRAPH PAGE viii A.4.5.4.1 Group C sample selection 81 A.4.5.4.1.1 Microc

46、ircuit group assignments 81 A.4.5.4.1.2 Product acceptable for delivery . 81 A.4.5.5 Group D inspection . 81 A.4.5.5.1 Group D sample selection 84 A.4.5.5.2 Incoming vendor material control program . 84 A.4.5.6 Group E inspection . 84 A.4.5.6.1 Group E sample selection 84 A.4.5.7 End-point tests for

47、 groups B, C, and D (and E if applicable) inspections 84 A.4.5.8 Nonconformance 85 A.4.5.8.1 Group B failure . 85 A.4.5.8.2 Alternate group B failure 85 A.4.5.8.3 Group C failure 86 A.4.5.8.4 Group D failure 86 A.4.6 Screening. 86 A.4.6.1 Burn-in 86 A.4.6.1.1 Lots and sublots resubmitted for burn-in

48、 86 A.4.6.1.2 Burn-in acceptance criteria 87 A.4.6.1.2.1 Failure analysis of burn-in screen failures for class level S devices . 87 A.4.6.2 External visual screen . 87 A.4.6.3 Particle impact noise detection (PIND) test for class level S devices . 87 A.4.6.4 Lead forming . 87 A.4.6.5 Nondestructive

49、bond pull test for class level S devices. 87 A.4.7 Test results 88 A.4.7.1 Screening test data for class level S microcircuits 88 A.4.8 Quality assurance program 88 A.4.8.1 Manufacturer certification 88 A.4.8.1.1 Design, processing, manufacturing, and testing instructions . 89 A.4.8.1.1.1 Conversion of customer requirements into manufac

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