DLA SMD-5962-00521 REV F-2013 MICROCIRCUIT DIGITAL-LINEAR COMPLEMENTARY SWITCH FET DRIVER MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Make changes to tT1, TDP, VPAUX, tT2, TDAtests and switch footnotes 2 and 3 as specified under table I. - ro 00-08-21 R. Monnin B Make changes to SEP as specified under 1.5 and ICCS, tT1, tT2tests as specified in table I. ro 00-09-20 R. Monnin C

2、Make correction to PWR pin description as specified in figure 1. - ro 01-12-14 R. Monnin D Make changes to UV- in table I, added footnote to 1.5 and table I. - gt 03-06-19 R. Monnin E Make changes to the conditions column for the tT2and TDAtests as specified under Table I. Add figure 3. - ro 08-07-3

3、0 R. Heber F Add device type 02. - drw 13-05-03 Charles F. Saffle REV SHEET REV F F F F F F F SHEET 15 16 17 18 19 20 21 REV STATUS REV F F F F F F F F F F F F F F OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Rick Officer DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:

4、/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY Rajesh Pithadia APPROVED BY Raymond Monnin MICROCIRCUIT, DIGITAL-LINEAR, COMPLEMENTARY SWITCH FET DRIVER, MONOLITHIC SILICON DRAWING AP

5、PROVAL DATE 00-07-26 AMSC N/A REVISION LEVEL F SIZE A CAGE CODE 67268 5962-00521 SHEET 1 OF 21 DSCC FORM 2233 APR 97 5962-E408-13 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-00521 DLA LAND AND MARITIME CO

6、LUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device class Q) and space application (device class V) and for appropriate satellite and similar applications (device c

7、lass T). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. For device class T, the user is encouraged to review the manufacturers Quality

8、Management (QM) plan as part of their evaluation of these parts and their acceptability in the intended application. 1.2 PIN. The PIN is as shown in the following example: 5962 F 00521 01 V X C Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designator

9、Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q, T and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device types

10、. The device types identify the circuit function as follows: Device type Generic number Circuit function 01 IS-1715ARH Radiation hardened, complementary switch field effect transistor (FET) driver 02 UC1715-SP Complementary switch FET drivers 1.2.3 Device class designator. The device class designato

11、r is a single letter identifying the product assurance level as follows: Device class Device requirements documentation Q or V Certification and qualification to MIL-PRF-38535 T Certification and qualification to MIL-PRF-38535 with performance as specified in the device manufacturers approved qualit

12、y management plan. 1.2.4 Case outlines. The case outlines are as designated in MIL-STD-1835 as follows: Outline letter Descriptive designator Terminals Package style F GDFP2-F16 or CDFP3-F16 16 Flat pack X CDFP4-F16 16 Flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for

13、 device classes Q, T and V or MIL-PRF-38535. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-00521 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute m

14、aximum ratings. 1/ Supply voltage range (VCC) device type 01 . 10 V dc to 20 V dc Supply voltage (VCC) device type 02 . 20 V dc DC input voltage range (VIN): Device type 01 0 V to VCCDevice type 02 -0.3 V to 20 V Output current, high (IOH) device type 02: Power driver continuous . -100 mA Power driv

15、er peak . -1 A Auxiliary driver continuous -100 mA Auxiliary driver peak . -500 mA Output current, low (IOL) device type 02: Power driver continuous . 100 mA Power driver peak . 2 A Auxiliary driver continuous 100 mA Auxiliary driver peak . 1 A Junction temperature (TJ): Device type 01 +175C Device

16、type 02 +150C Storage temperature range . -65C to +150C Lead temperature (soldering, 10 seconds) +265C Thermal resistance, junction-to-case (JC): Device type 01 18C/W Device type 02 8.25C/W Thermal resistance, junction-to-ambient (JA): Device type 01 90C/W Device type 02 72.9C/W 1.4 Recommended oper

17、ating conditions. Supply voltage range (VCC): Device type 01 10 V dc to 18 V dc Device type 02 7 V dc to 18 V dc Ambient operating temperature range (TA) device type 01 -55C to +125C Operating temperature range (TA= TJ) device type 02 . -55C to +125C 1.5 Radiation features SEP effective let number u

18、psets 90 MeV / (cm2/mg) Maximum total dose available (dose rate = 50 300 rads(Si) / s): 2/ Device classes Q, or V 3 x 105rads(Si) Device class T . 1 x 105rads(Si) Dose rate latch-up . None 3/ _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation

19、 at the maximum levels may degrade performance and affect reliability. 2/ These parts may be dose rate sensitive in a space environment and may demonstrate enhanced low dose rate effects. Radiation end point limits for the noted parameters are guaranteed only for the conditions specified in MIL-STD-

20、883, method 1019, condition A. 3/ Guaranteed by design or process but not tested. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-00521 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 4

21、 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the so

22、licitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMEN

23、T OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/quicksearch.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA

24、 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained.

25、3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q, T and V shall be in accordance with MIL-PRF-38535 as specified herein, or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit

26、, or function as described herein. 3.1.1 Microcircuit die. For the requirements of microcircuit die, see appendix A to this document. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device clas

27、ses Q, T and V. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Timing diagram. The timing diagram shall be as specified on figure 2. 3.2.4 Radiation exposure circuit. The r

28、adiation exposure circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing and acquiring activity upon request. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein

29、, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electr

30、ical tests for each subgroup are defined in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-00521 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 5 DSCC FORM 2234 APR 97 TABLE

31、I. Electrical performance characteristics. Test Symbol Conditions 1/ Device type 01: -55C TA +125C VCC= 10 V to 18 V, ENBL 3 V; Device type 02: -55C TA +125C (TA= TJ), VCC= 15 V, ENBL 2 V, RT1 = RT2 = 100 k Group A subgroups Device type Limits Unit unless otherwise specified Min Max OVERALL section

32、Operating voltage range VCC1, 2, 3 01 10 18 V M,D,P,L,R,F 2/ 1 10 18 1, 2, 3 02 7 18 Input current, nominal ICC1, 2, 3 01 1.0 6.0 mA M,D,P,L,R,F 2/ 1 1.0 6.0 ENBL = 3 V 1, 2, 3 02 25 Input current, sleep mode ICCSENBL = 0.8 V 1, 2, 3 01 300 900 A M,D,P,L,R,F 2/ 1 300 900 1, 2, 3 02 300 Under voltage

33、, rising threshold UV+ 1, 2, 3 01 8.5 9.5 V M,D,P,L,R,F 2/ 1 8.5 9.5 Under voltage, falling threshold UV- 1, 2, 3 01 7.7 8.8 V M,D,P,L,R,F 2/ 1 7.7 8.8 Under voltage delta UVD 1, 2, 3 01 0 2.0 V M,D,P,L,R,F 2/ 1 0 2.0 Power driver (PWR) section Pre turn-on PWR output, low VPPWRVCC= 0 V, ENBL 0.8 V,

34、IOUT= 10 mA 1, 2, 3 All 2.0 V M,D,P,L,R,F 2/ 1 01 2.0 PWR pin output low, saturation VPWRINPUT = 0.8 V, IOUT= 40 mA 1, 2, 3 All 1.0 V M,D,P,L,R,F 2/ 1 01 1.0 INPUT = 0.8 V, IOUT= 100 mA 1, 2, 3 All 1.5 M,D,P,L,R,F 2/ 1 01 1.5 See footnotes at end of table. Provided by IHSNot for ResaleNo reproductio

35、n or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-00521 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics continued. Test Symbol Conditions 1/ Device type 01: -

36、55C TA +125C VCC= 10 V to 18 V, ENBL 3 V; Device type 02: -55C TA +125C (TA= TJ), VCC= 15 V, ENBL 2 V, RT1 = RT2 = 100 k Group A subgroups Device type Limits Unit unless otherwise specified Min Max Power driver (PWR) section continued. PWR pin output high, saturation VCC-VPWRINPUT = 3.0 V, IOUT= -40

37、 mA 1, 2, 3 01 1.0 V M,D,P,L,R,F 2/ 1 1.0 1, 2, 3 02 3 INPUT = 3.0 V, IOUT= -100 mA 1, 2, 3 01 1.5 M,D,P,L,R,F 2/ 1 1.5 1, 2, 3 02 3 Rise time TRPCL= 2200 pF 9, 10, 11 01 15 50 ns M,D,P,L,R,F 2/ 9 15 50 9, 10, 11 02 60 Fall time TFPCL= 2200 pF 9, 10, 11 01 15 50 ns M,D,P,L,R,F 2/ 9 15 50 9, 10, 11 0

38、2 60 T1 input pin delay, AUX to PWR tT1INPUT rising edge, 3/ 4/ RT1= 10 k 9, 10, 11 All 45 200 ns M,D,P,L,R,F 2/ 9 01 45 200 INPUT rising edge, 3/ 4/ RT1= 100 k 9, 10, 11 All 250 1300 M,D,P,L,R,F 2/ 9 01 250 1300 PWR propagation delay TDPINPUT falling edge at 5/ 50% points 9, 10, 11 01 50 300 ns M,D

39、,P,L,R,F 2/ 9 50 300 9, 10, 11 02 300 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-00521 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 7 DSCC FORM 22

40、34 APR 97 TABLE I. Electrical performance characteristics continued. Test Symbol Conditions 1/ Device type 01: -55C TA +125C VCC= 10 V to 18 V, ENBL 3 V; Device type 02: -55C TA +125C (TA= TJ), VCC= 15 V, ENBL 2 V, RT1 = RT2 = 100 k Group A subgroups Device type Limits Unit unless otherwise specifie

41、d Min Max Auxiliary (AUX) section AUX pre turn-on AUX output, low VPAUXVCC= 0 V, ENBL 0.8 V, IOUT= 10 mA 1, 2, 3 All 2.0 V M,D,P,L,R,F 2/ 1 01 2.0 AUX pin output low, saturation VAUXINPUT = 3.0 V, IOUT= 40 mA 1, 2, 3 All 1.0 V M,D,P,L,R,F 2/ 1 01 1.0 INPUT = 3.0 V, IOUT= 100 mA 1, 2, 3 All 1.5 M,D,P

42、,L,R,F 2/ 1 01 1.5 AUX pin output high, saturation VCC-VAUXINPUT = 0.8 V, IOUT= -40 mA 1, 2, 3 01 1.0 V M,D,P,L,R,F 2/ 1 1.0 1, 2, 3 02 3 INPUT = 0.8 V, IOUT= -100 mA 1, 2, 3 01 1.5 M,D,P,L,R,F 2/ 1 1.5 1, 2, 3 02 3 Rise time TRPCL= 2200 pF 9, 10, 11 01 15 50 ns M,D,P,L,R,F 2/ 9 15 50 9, 10, 11 02 6

43、0 Fall time TFPCL= 2200 pF 9, 10, 11 01 15 50 ns M,D,P,L,R,F 2/ 9 15 50 9, 10, 11 02 60 AUX propagation delay TDAINPUT rising edge at 5/ 50% points 9, 10, 11 01 50 185 ns M,D,P,L,R,F 2/ 9 50 185 9, 10, 11 02 185 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networkin

44、g permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-00521 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 8 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics continued. Test Symbol Conditions 1/ Device type 01: -55C TA +125C V

45、CC= 10 V to 18 V, ENBL 3 V; Device type 02: -55C TA +125C (TA= TJ), VCC= 15 V, ENBL 2 V, RT1 = RT2 = 100 k Group A subgroups Device type Limits Unit unless otherwise specified Min Max Auxiliary (AUX) section continued T2 input pin delay, PWR to AUX tT2INPUT falling edge, 3/ 4/ RT2= 10 k 9, 10, 11 01

46、 50 130 ns M,D,P,L,R,F 2/ 9 50 130 9, 10, 11 02 45 130 INPUT falling edge, 3/ 4/ RT2= 100 k 9, 10, 11 All 200 700 M,D,P,L,R,F 2/ 9 01 200 700 ENABLE section Input threshold voltage VIT1, 2, 3 All 2.8 V M,D,P,L,R,F 2/ 1 01 2.8 Input current high IIHENABLE pin = 15 V 1, 2, 3 All -10 10 A M,D,P,L,R,F 2

47、/ 1 01 -10 10 Input current low IILENABLE pin = 0 V 1, 2, 3 All -15 15 A M,D,P,L,R,F 2/ 1 01 -15 15 T1 input section Current limit T1CLT1 input = 0 V 1,2,3 01 -5.5 -1.6 mA M,D,P,L,R,F 2/ 1 -5.5 -1.6 1, 2, 3 02 -2.0 -0.5 Nominal voltage at T1 pin T1NV1, 2, 3 All 2.7 3.3 V M,D,P,L,R,F 2/ 1 01 2.7 3.3 Minimum T1 pin delay T1DMT1 pin = 2.5 V 5/ 9, 10, 11 01 25 120 ns M,D,P,L,R,F 2/ 9 25 120 9, 10, 11 02 80 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without lic