DLA SMD-5962-04201 REV A-2005 MICROCIRCUIT LINEAR LINE RECEIVER DIFFERENTIAL QUAD LVDS INTERNAL TERMINATION LOW VOLTAGE MONOLITHIC SILICON《硅单片低压内部终端 低压差分信号传输 四芯导线差动线路接收机线性微型电路》.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Sheet 2, paragraph 1.2.2, correction to the circuit function for device type 02. Editorial changes throughout. - drw 05-02-18 Raymond Monnin REV SHET REV SHET REV STATUS REV A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC

2、N/A PREPARED BY Dan Wonnell DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Raymond Monnin COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Raymond Monnin MICROCIRCUIT, LINEAR, LINE RECEIVER, DIFFERENTIAL, QUAD,

3、 LVDS, INTERNAL AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 04-01-05 TERMINATION, LOW VOLTAGE, MONOLITHIC SILICON AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-04201 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E181-05 Provided by IHSNot for ResaleNo reproduction or networkin

4、g permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-04201 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliabilit

5、y (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is

6、as shown in the following example: 5962 - 04201 01 Q Y A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked dev

7、ices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device types

8、. The device types identify the circuit function as follows: Device type Generic number Circuit function 01 UT54LVDS032LVT Radiation hardened, (dose rate 1 rad(Si)/s), quad differential line receiver, LVDS, internal termination 02 UT54LVDS032LVT Radiation hardened, (dose rate 5 rad(Si)/s), quad diff

9、erential line receiver, LVDS, internal termination 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 complian

10、t, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline. The case outline is as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style Y CDFP4-F16

11、16 Flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-042

12、01 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply voltage (VCC) -0.3 V to +4 V Input voltage (RIN+, RIN-) -0.3 V to +4 V Enable input voltage (EN, EN) . -0.3 V to (VCC+ 0.3 V) Storage temperature range -

13、65C to +150C Lead temperature (soldering, 4 seconds). +260C Package power dissipation at TA= +25C (PD): 2/ Case outline Y 1250 mW Thermal resistance, junction-to-ambient (JA) Case outline Y 120C/W Thermal resistance, junction-to-case (JC) Case outline Y 10C/W Junction temperature (TJ). +150C 3/ 1.4

14、Recommended operating conditions. Operating temperature range (TA) -55C to +125C Operating voltage range (VCC) . 3.0 V to 3.6 V TTL receiver input voltage GND to 3.6 V LVDS receiver input voltage. 0 V to 2.4 V 1.5 Radiation features. Maximum total dose available: Device type 01 (dose rate 1 rad(Si)/

15、s) . 1 Mrads(Si) Device type 02 (dose rate 5 rad(Si)/s) . 100 Krads(Si) Neutron irradiation 1 X 1013neutrons/cm24/ Single event latchup. 100 Mev-cm2/mg 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of

16、 this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in the issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the solicitation. DEPARTMENT OF DEFENSE SPECIFICATION MIL

17、-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcir

18、cuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 1/ Stre

19、sses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Derate 6.8 mW/C above TA= +25C. 3/ The maximum junction temperature may be increased to +175C during burn-in and life test. 4/

20、Guaranteed, but not tested. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-04201 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 2.2 Order of precedenc

21、e. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirement

22、s. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. T

23、he individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38

24、535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline. The case outline shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Radiation exposure circui

25、t. The radiation exposure circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing and acquiring activity upon request. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specifie

26、d herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. Th

27、e electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufactu

28、rer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.

29、5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a cert

30、ificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-H

31、DBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requ

32、irements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 No

33、tification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change as defined in MIL-PRF-38535, appendix A. 3.9 Verification and review for device class M. For device class M

34、, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M de

35、vices covered by this drawing shall be in microcircuit group number 53 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-04201 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 4321

36、8-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TA +125C 1/ VCC= 3.0 V to 3.6 V Group A subgroups Device type Limits Unit unless otherwise specified Min Max Differential input low threshold VTLVCM= +1.2 V 2/ 1, 2, 3 A

37、ll -100 mV Differential input high threshold VTHVCM= +1.2 V 2/ 1, 2, 3 All 100 mV Input clamp voltage VCLICL= 18 mA 1, 2, 3 All -1.5 V Common mode voltage range VCMR VID= 200 mV peak to peak 2/, 3/ 1, 2, 3 All 0.1 2.3 V LVDS input current IIVCC= 3.6 V, VIN= 2.4 V receiver inputs 1, 2, 3 All 15 A Col

38、d spare leakage current ICSVCC= 0 V, VIN= 3.6 V, all inputs 1, 2, 3 All 20 A Output high voltage VOHIOH= -0.4 mA, VCC= 3.0 V 1, 2, 3 All 2.7 V Output low voltage VOLIOL= 2 mA, VCC= 3.0 V 1, 2, 3 All 0.25 V Output short circuit current IOSEnabled, VOUT= 0 V 4/, 5/ 1, 2, 3 All -15 -130 mA Output three

39、-state current IOZDisabled, VOUT= 0 V or VCC1, 2, 3 All -10 +10 A TTL input high voltage VIHVCC= 3.0 V or 3.6 V 1, 2, 3 All 2.0 V TTL input low voltage VILVCC= 3.0 V or 3.6 V 1, 2, 3 All 0.8 V TTL input current INVIN= 3.6 V, VCC= 3.6 V, Enable pins 1, 2, 3 All 10 A Supply current, no load, receivers

40、 enabled ICCEN, EN = VCCor GND, inputs open 1, 2, 3 All 15 mA Supply current, no load, receivers disabled ICCZEN = GND, EN = VCC, inputs open 1, 2, 3 All 4 mA Termination resistor RTERMVDD= 3.0 V to 3.6 V 1, 2, 3 All 83 114 VDD= 0.0 V 125 154 Functional test FT See 4.4.1c 7, 8 All See footnotes at e

41、nd of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-04201 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance chara

42、cteristics - continued. Test Symbol Conditions -55C TA +125C 1/ VCC= 3.0 V to 3.6 V CL= 40 pF Group A subgroups Device type Limits Unit unless otherwise specified Min Max Propagation delay, differential, high to low tPHLDVID= 200 mV, input pulse =1.1 V to 1.3 V, VIN= 1.2 V (0 V differential) to VOUT

43、= VCC, see figure 2 9, 10, 11 All 1.8 3.3 ns Propagation delay, differential, low to high tPLHDVID= 200 mV, input pulse =1.1 V to 1.3 V, VIN= 1.2 V (0 V differential) to VOUT= VCC, see figure 2 9, 10, 11 All 1.8 3.3 ns Differential skew |tPHLD- tPLHD| tSKDVID= 200 mV 9, 10, 11 All 0.35 ns Channel to

44、 channel skew tSK1VID= 200 mV 6/ 9, 10, 11 All 0.5 ns Chip to chip skew tSK2VID= 200 mV 7/ 9, 10, 11 All 1.5 ns Disable time low to Z tPLZInput pulse = 0 V to 3.6 V, VIN= 1.5 V, RL= 100, VOUT= VOL+ 0.5 V, see figure 2 9, 10, 11 All 12 ns Disable time high to Z tPHZInput pulse = 0 V to 3.6 V, VIN= 1.

45、5 V, RL= 100, VOUT= VOH- 0.5 V, see figure 2 9, 10, 11 All 12 ns Enable time Z to high tPZHInput pulse = 0 V to 3.6 V, VIN= 1.5 V, VOUT= 50%, RL= 100, see figure 2 9, 10, 11 All 12 ns Enable time Z to low tPZLInput pulse = 0 V to 3.6 V, VIN= 1.5 V, VOUT= 50%, RL= 100, see figure 2 9, 10, 11 All 12 n

46、s 1/ Device type 01 supplied to this drawing will meet all levels M, D, P, L, R, F, G, H of irradiation. However, this device is only tested at the H levels. Device type 02 supplied to this drawing will meet all levels M, D, P, L, R of irradiation. However, this device is only tested at the R levels

47、. Pre and Post irradiation values are identical unless otherwise specified in Table I. When performing post irradiation electrical measurements for any RHA level, TA= +25C. 2/ Tested functionally. 3/ The VCMR range is reduced for larger input differential voltage (VID). Example: If VID= 400 mV, the

48、VCMR is 0.2 V to 2.2 V. A VIDup to VCC 0 V may be applied to the RIN+/RIN- inputs with the common-mode voltage set to VCC/2. 4/ Output short circuit current (IOS) is specified as magnitude only, minus sign indicates direction of current. Only one output should be shorted at a time for a maximum dura

49、tion of one second. 5/ Guaranteed by characterization. 6/ Channel to channel skew is defined as the difference between the propagation delay of one channel and that of the others on the same chip with any event on the inputs. 7/ Chip to chip skew is defined as the difference between the minimum and maximum specified diffe