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本文(DLA SMD-5962-06203 REV A-2009 MICROCIRCUIT MEMORY DIGITAL CMOS SOI 512K x 8-BIT RADIATION-HARDENED LOW VOLTAGE SRAM MONOLITHIC SILICON.pdf)为本站会员(proposalcash356)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-06203 REV A-2009 MICROCIRCUIT MEMORY DIGITAL CMOS SOI 512K x 8-BIT RADIATION-HARDENED LOW VOLTAGE SRAM MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Change to section 1.6. Added RAMP2s parameter to Table IA. ksr 09-05-07 Joseph Rodenbeck REV SHEET REV A A A A A A A A A A A SHEET 15 16 17 18 19 20 21 22 23 24 25 REV STATUS REV A A A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11

2、 12 13 14 PMIC N/A PREPARED BY Kenneth Rice DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY Rajesh Pithadia THIS DRAWING IS AVAILABLE FOR USE BY All DEPARTMENTS APPROVED BY Raymond Monnin MICROCIRCUIT, MEMORY, DIGITAL, CMOS/SOI

3、 512K x 8-BIT, RADIATION-HARDENED, LOW VOLTAGE SRAM, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 06-07-18 AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-06203 SHEET 1 OF 26 DSCC FORM 2233 APR 97 5962-E027-08 Provided by IHSNot for ResaleNo reproduction

4、or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-06203 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of hig

5、h reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN.

6、 The PIN shall be as shown in the following example: 5962 F 06203 01 Q X C Federal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q

7、and V RHA marked devices shall meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535 appendix A specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-

8、RHA device. 1.2.2 Device types. The device types shall identify the circuit function as follows: Device type Generic number Circuit function Access time Sleep Mode 01 HX6408X_FN25 512K X 8-bit rad-hard CMOS/SOI SRAM 300 KRAD 25 ns Non-Sleep 02 HX6408X_FN20 512K X 8-bit rad-hard CMOS/SOI SRAM 300 KRA

9、D 20 ns Non-Sleep 03 HX6408X_FM25 512K X 8-bit rad-hard CMOS/SOI SRAM 300 KRAD 25 ns Sleep 04 HX6408X_FM20 512K X 8-bit rad-hard CMOS/SOI SRAM 300 KRAD 20 ns Sleep 05 HX6408X_HN25 512K X 8-bit rad-hard CMOS/SOI SRAM 1 MRAD 25 ns Non-Sleep 1.2.3 Device class designator. The device class designator sh

10、all be a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q, V Certification and

11、 qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) shall be as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style Lid X See figure 1 36 Flat pack gold/nickel metal 1.2.5 Lead finish. The lead finish shall be as specified i

12、n MIL-PRF-38535 for classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-06203 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEV

13、EL A SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ Supply voltage range (VDD) . -0.5 V dc to +4.6 V dc DC input voltage range (VIN) . -0.5 V dc to VDD+ 0.5 V dc DC output voltage range (VOUT) -0.5 V dc to VDD+ 0.5 V dc DC or average output current (IOUT) 25 mA Storage temperature

14、 . -65C to +150C Lead temperature (soldering 5 seconds) +270C Thermal resistance, junction to case (JC) . 2.0 C/W Output voltage applied to high Z-state -0.5 V dc to VDD+ 0.5V dc Maximum power dissipation 2.5 W Operating free-air temperature, (TA) . -55C to +125C Maximum junction temperature (TJ) 17

15、5C 1.4 Recommended operating conditions. 3/ Supply voltage range (VDD) . 3.0 V dc to 3.6 V dc Supply voltage reference (VSS) . 0.0 V dc High level input voltage range (VIH) 0.7 x VDDto VDD+ 0.3 V dc Low level input voltage range (VIL) -0.3 V dc to 0.3 x VDDVoltage on any pin (VIN) -0.3 V dc to VDD+

16、0.3 Supply voltage ramp time (VDDRamp Time) . 50 ms Operating free-air temperature, (TA) . -55C to +125C 1.5 Digital logic testing for device classes Q and V. Fault coverage measurement of manufacturing logic tests (MIL-STD-883, test method 5012) 100 percent 1.6 Radiation features Maximum total dose

17、 available (dose rate = 50-300 rad/s) Devices 01-04 3E5 Rads(Si) Device 05 . 1E6 Rads(Si) Single event upset rate (Adams 10% worst case environment) . 1E-10 upsets/bit-day Neutron irradiation 1E14 neutrons/cm24/ Proton induced upset rate (spacecraft orbit) . 1E-10 upsets/bit-day Dose rate data upset

18、 gold/nickel metal lid 1E10 Rad(Si)/sec for 50 nsec Dose rate survivability . 1E12 Rad(Si)/sec for 50 nsec Latchup . Immune by SOI technology 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and a

19、ffect reliability. 2/ All voltages are referenced to VSS. 3/ Maximum applied voltage shall not exceed 4.6 V. 4/ Guaranteed but not tested. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-06203 DEFENSE SUPPLY

20、CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise

21、specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835

22、 Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or from the Standar

23、dization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of the documents are the issues of the documents

24、 cited in the solicitation. AMERICAN SOCIETY FOR TESTING AND MATERIALS (ASTM) ASTM Standard F1192-00 - Standard Guide for the Measurement of Single Event Phenomena from Heavy Ion Irradiation of Semiconductor Devices. (Applications for copies of ASTM publications should be addressed to: ASTM Internat

25、ional, PO Box C700, 100 Barr Harbor Drive, West Conshohocken, PA 19428-2959; http:/www.astm.org.) ELECTRONICS INDUSTRIES ASSOCIATION (EIA) JEDEC Standard EIA/JESD78 - IC Latch-Up Test. (Applications for copies should be addressed to the Electronics Industries Association, 2500 Wilson Boulevard, Arli

26、ngton, VA 22201; http:/www.jedec.org.) (Non-Government standards and other publications are normally available from the organizations that prepare or distribute the documents. These documents also may be available in or through libraries or other informational services.) 2.3 Order of precedence. In

27、the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The

28、 individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The ind

29、ividual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.1.1 Microcircuit die. For the requirements of microcircuit die, see Appendix B to this document. Provided by IHSNot for ResaleNo reproductio

30、n or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-06203 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 3.2 Design, construction, and physical dimensions. The design, construction, and physical dim

31、ensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline. The case outline shall be in accordance with 1.2.4 herein and Figure 1. 3.2.2 Terminal connections. The terminal connections shall be a

32、s specified on Figure 2. 3.2.3 Truth table. The truth table shall be as specified on Figure 3. 3.2.4 Output load circuit. The output load circuit for functional tests shall be as specified on Figure 4. 3.2.5 Tester timing characteristics and timing waveforms. The tester AC timing characteristics and

33、 timing waveforms shall be as specified on Figure 5 and applies to capacitance, read cycle, and write cycle measurements unless otherwise specified. 3.2.6 Radiation exposure circuit. The radiation test circuit shall be maintained under document revision level control by the manufacturer and shall be

34、 made available to the preparing or acquiring activity upon request. 3.2.7 Functional tests. Various functional tests used to test this device are contained in the appendix (herein). If the test patterns cannot be implemented due to test equipment limitations, alternate test patterns to accomplish t

35、he same results shall be allowed. For device class M, alternate test patterns shall be maintained under document revision level control by the manufacturer and shall be made available to the preparing or acquiring activity upon request. For device classes Q and V, alternate test patterns shall be un

36、der the control of the device manufacturers Technology Review Board (TRB) in accordance with MIL-PRF-38535 and shall be made available to the preparing or acquiring activity upon request. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified here

37、in, the electrical performance characteristics and postirradiation parameter limits are as specified in table IA and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The elect

38、rical tests for each subgroup are defined in table IA. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer ha

39、s the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Ce

40、rtification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificat

41、e of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-10

42、3 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requiremen

43、ts of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notifica

44、tion of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent,

45、 and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IH

46、S-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-06203 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 41

47、 (see MIL-PRF-38535, appendix A). 4. VERIFICATION 4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not a

48、ffect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. 4.2.1 Additional c

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