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本文(DLA SMD-5962-07202 REV D-2013 MICROCIRCUIT HYBRID 12 VOLT DUAL CHANNEL DC DC CONVERTER.pdf)为本站会员(unhappyhay135)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-07202 REV D-2013 MICROCIRCUIT HYBRID 12 VOLT DUAL CHANNEL DC DC CONVERTER.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Table I: Output voltage VOUTtest, for subgroups 2 and 3 (non-RHA) change min value from 11.82 V to 11.76 V and max value from 12.18 V to 12.24 V. Table I: Output response to step load transient VOUTtest, for subgroup 4 (non-RHA) change max value

2、from 300 mV pk to 400 mV pk, for subgroups 5 and 6 (non-RHA) change max. value from 350 mV pk to 450 mV pk, for subgroups 4,5, 6 (RHA) change max value from 400 mV pk to 500 mV pk. Figure 1 case outline X: Correct dimensions b, D, D1, E2, L, P, and Q in table. gc 07-10-23 Robert M. Heber B Table I:

3、For power dissipation test, change max limit of non-RHA subgroup 1 from “18” W to “20” W. Table II, add note to Group C end-point test parameters to include subgroups 2 and 3. In paragraph 4.3.5, correct units in table for Single event upset survival level (LET) from “MeV” to “MeV-cm2/mg”. Update dr

4、awing paragraphs. gc 12-03-01 Charles F. Saffle C Paragraph 1.3; Correct Power dissipation (PD) from “20 W” to “22 W” for RHA devices. Table I; Power dissipation test (PD), correct maximum power dissipation for RHA devices from”20 W” to “22 W”gc 12-06-25 Charles F. Saffle D Update to current RHA for

5、mat. -gc 13-06-12 Charles F. Saffle REV SHEET REV D D SHEET 15 16 REV STATUS REV D D D D D D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Greg Cecil DLA LAND AND MARITIME STANDARD MICROCIRCUIT DRAWING CHECKED BY Greg Cecil COLUMBUS, OHIO 43218-3990 http:/www.

6、landandmaritime.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Robert M. Heber MICROCIRCUIT, HYBRID, 12 VOLT, DUAL CHANNEL, DC/DC CONVERTER AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 07-07-09 AMSC N/A REVISION LEVEL D SIZE A CAGE CODE 67268 5962-07202 S

7、HEET 1 OF 16 DSCC FORM 2233 APR 97 5962-E417-13 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-07202 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.

8、1 Scope. This drawing documents five product assurance classes as defined in paragraph 1.2.3 and MIL-PRF-38534. A choice of case outlines and lead finishes which are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of radiation hardness assurance levels a

9、re reflected in the PIN. 1.2 PIN. The PIN shall be as shown in the following example: 5962 - 07202 01 H X X Federal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1

10、Radiation hardness assurance (RHA) designator. RHA marked devices shall meet the MIL-PRF-38534 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Devic

11、e type Generic number Circuit function 01 SMRT2812D DC/DC converter, 35 W, 12 V output 1.2.3 Device class designator. This device class designator shall be a single letter identifying the product assurance level. All levels are defined by the requirements of MIL-PRF-38534 and require QML Certificati

12、on as well as qualification (Class H, K, and E) or QML Listing (Class G and D). The product assurance levels are as follows: Device class Device performance documentation K Highest reliability class available. This level is intended for use in space applications. H Standard military quality class le

13、vel. This level is intended for use in applications where non-space high reliability devices are required. G Reduced testing version of the standard military quality class. This level uses the Class H screening and In-Process Inspections with a possible limited temperature range, manufacturer specif

14、ied incoming flow, and the manufacturer guarantees (but may not test) periodic and conformance inspections (Group A, B, C, and D). E Designates devices which are based upon one of the other classes (K, H, or G) with exception(s) taken to the requirements of that class. These exception(s) must be spe

15、cified in the device acquisition document; therefore the acquisition document should be reviewed to ensure that the exception(s) taken will not adversely affect system performance. D Manufacturer specified quality class. Quality level is defined by the manufacturers internal, QML certified flow. Thi

16、s product may have a limited temperature range. 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X See figure 1 12 Flanged Package 1.2.5 Lead finish. The lead finish shall be as specified in MIL

17、-PRF-38534. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-07202 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply voltage

18、 (VCC) . -0.5 V dc to +80 V dc Power dissipation (PD): Device type 01 (non-RHA) . 20 W Device type 01 (RHA levels P and R) . 22 W Output power 35 W Lead temperature (soldering, 10 seconds) . +300C Storage temperature . -65C to +150C 1.4 Recommended operating conditions. Supply voltage (VCC) . +19 V

19、dc to +56 V dc Case operating temperature range (TC) -55C to +125C 1.5 Radiation features. 2/ 3/ Maximum total dose available (dose rate = 50 - 300 rads(Si)/s) . 100 krads(Si) 4/ Maximum total dose available (dose rate 10 mrads(Si)/s) . 100 krads(Si) 4/ Single event phenomenon (SEP) effective linear

20、 energy transfer (LET): No SEL, SEB, SEFI, SEGR . 90 nm 2/ Tested Level P 30 krad (Si) QML die 3/ No Tested (78.2 MeV-cm2/mg) Not Tested 1/ Tested Level R 100 krad (Si) Tested Non QML die 4/ Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MI

21、CROCIRCUIT DRAWING SIZE A 5962-07202 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 14 DSCC FORM 2234 APR 97 TABLE IIIB. Hybrid level and element level test table. Continued. Radiation Test Prompt Dose 1/ DRU (upset) DRU (latch) Parametric (survive) Hybrid Level Testing Not T

22、ested Not Tested Not Tested Element Level Testing Bipolar Discrete 2/ Devices Not Tested Not Tested Not Tested Bipolar Linear or Mixed Signal 90 nm 2/ Not Tested Not Tested Not Tested 1/ Testing will be performed and this SMD will be updated to include these tests when completed. 2/ Bipolar Junction

23、 Transistors (BJT) may not be tested for TID if the design margin for critical parameters are 2X minimum as determined by design analysis. 3/ Purchased QML die are tested by the die manufacturer at rated dose of 30 krad (Si) for level P, and 100 krad (Si) for level R. 4/ Non QML die are tested at 1.

24、5X rated dose. 1.5X rated dose is 45 krad (Si) for level P, and 150 krad (Si) for level R. 4.3.5.1 Radiation Hardness Assurance (RHA) inspection. RHA qualification is required for those devices with the RHA designator as specified herein. End-point electrical parameters for radiation hardness assura

25、nce (RHA) devices shall be specified in table II. Radiation testing will be in accordance with the qualifying activity (DLA Land and Maritime-VQ) approved plan and with MIL-PRF-38534, Appendix G. a. The hybrid device manufacturer shall establish procedures controlling element radiation testing, and

26、shall establish radiation test plans used to implement element lot qualification during procurement. Test plans and test reports shall be filed and controlled in accordance with the manufacturers configuration management system. b. The hybrid device manufacturer shall designate a RHA program manager

27、 to oversee element lot qualification, and to monitor design changes for continued compliance to RHA requirements. 4.3.5.1.1 Hybrid level radiation qualification. 4.3.5.1.1.1 Qualification by similarity. A family is defined by the family model designator e.g. SMRT2812. All parts with this designator

28、 share a common design and use the same active elements. Device type 5962F0720201KXA was tested. 4.3.5.1.1.2 Total ionizing dose irradiation testing. This device is characterized and tested initially and after any design or process change that may affect the RHA response of this device. Devices are

29、tested at HDR in accordance with condition A and LDR in accordance with condition D of method 1019 of MIL-STD-883. HDR samples are tested to a minimum of 1.5 times the rated dose to ensure rated dose. LDR samples are tested to a minimum of 30 krads(Si). Provided by IHSNot for ResaleNo reproduction o

30、r networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-07202 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 15 DSCC FORM 2234 APR 97 4.3.5.1.1.3 Single event phenomena (SEP). A minimum of one representative hybrid of the hybrid family is

31、 characterized for SEP response at initial qualification and after any design or process change which may affect the RHA response of the device type. Testing shall be performed in accordance with ASTM F1192. Test conditions for SEP are as follows: a. The ion beam angle of incidence shall be normal t

32、o the die surface. No shadowing of the ion beam due to fixturing is allowed. b. The fluence shall be 1x106 particles/cm2. c. The flux shall be between 102and 105ions/cm2/s. d. The particle range shall be 35 micron in silicon. e. The characterization is performed at nominal input voltage between 21 a

33、nd 35 volts with loads varied from 30 percent to 50 percent. The test temperature shall be +25C 10 C in air. f. For SEP test limits, see table IB herein. 4.3.5.1.2 Element level radiation qualification. 4.3.5.1.2.1 Technologies not being tested. Testing is not performed on device technologies includ

34、ing: P/N, Schottky and zener diodes, and on small signal bipolar junction transistors that the manufacturer considers to be radiation hardened. / Bipolar Junction Transistors (BJT) may not be tested for TID if the design margin for critical parameters are 2X minimum as determined by design analysis.

35、 4.3.5.1.2.1.2 Total Ionizing Dose Irradiation. Testing every initial wafer lot of bipolar / BiCMOS linear or mixed signal semiconductor components will be characterized and tested at HDR in accordance with condition A of method 1019 of MIL-STD-883 to the specified total dose. Eleven samples will be

36、 tested under the bias condition which produces the greatest parametric shift. P99/90% statistics are applied to the element parameters as compared against limits in the component SCD which are established by the worst case circuit analysis. Low dose rate testing per Condition D has been performed a

37、t the hybrid level. Component changes may be qualified at hybrid level or the die will be characterized at the element level with condition D of method 1019 of MIL-STD-883. When element level low dose rate testing is performed ten samples (5 biased and 5 unbiased) will be tested to the specified tot

38、al dose. 0.9900/90% statistics are applied to the element parameters as compared against limits established by the worst case circuit analysis. 4.3.5.2 Radiation Lot Acceptance. Each lot of active elements, except as stated in 4.3.5.1.2.1 shall be evaluated for acceptance in accordance with MIL-PRF-

39、38534 and herein. 4.3.5.2.1 Total Ionizing Dose. All active elements (except as noted in 4.3.5.1.2.1) are either purchased at the radiation level of the hybrid (i.e., P or R) as MIL-PRF-38535 Standard Microcircuit Drawing (SMD) or MIL-PRF-19500 JAN where the electrical performance meets those establ

40、ished for the elements at hybrid device design, or subject to lot acceptance testing (LAT). LAT consists of HDR testing on every wafer lot in accordance with condition A of method 1019 of MIL-STD-883 to 45Krad (Si) for level P hybrid devices, and 150 krad(Si) for levels R hybrid devices. A minimum o

41、f 10 samples will be tested (5 biased and 5 unbiased unless the worst case test condition has been determined reducing the sample to 5. P99/90% statistics are applied to the element parameter as compared against limits established in the component SCD which are established by worst case circuit anal

42、ysis for lot acceptance Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-07202 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 16 DSCC FORM 2234 APR 97 5. PACKAGING 5.1 Packaging require

43、ments. The requirements for packaging shall be in accordance with MIL-PRF-38534. 6. NOTES 6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes. 6.2 Replaceability. Mi

44、crocircuits covered by this drawing will replace the same generic device covered by a contractor-prepared specification or drawing. 6.3 Configuration control of SMDs. All proposed changes to existing SMDs will be coordinated as specified in MIL-PRF-38534. 6.4 Record of users. Military and industrial

45、 users shall inform DLA Land and Maritime when a system application requires configuration control and the applicable SMD. DLA Land and Maritime will maintain a record of users and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering microel

46、ectronic devices (FSC 5962) should contact DLA Land and Maritime-VA, telephone (614) 692-8108. 6.5 Comments. Comments on this drawing should be directed to DLA Land and Maritime-VA, Post Office Box 3990, Columbus, Ohio 43218-3990, or telephone (614) 692-1081. 6.6 Sources of supply. Sources of supply

47、 are listed in MIL-HDBK-103 and QML-38534. The vendors listed in MIL-HDBK-103 and QML-38534 have submitted a certificate of compliance (see 3.7 herein) to DLA Land and Maritime-VA and have agreed to this drawing. 6.7 Additional information. When applicable, a copy of the following additional data sh

48、all be maintained and available from the device manufacturer: a. RHA upset levels. b. Test conditions (SEP). c. Occurrence of latchup (SEP). d Occurrence of Burn-out (SEP). e. Occurrence of Gate Rupture (SEP). f. Occurrence of Single Event Functional Interrupt (SEP). g Occurrence of Single Event Upset (SEP). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING BULLETIN DATE: 13-06-12 Approved sources of supply

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