DLA SMD-5962-07224 REV C-2010 MICROCIRCUIT DIGITAL 32-BIT SPARC V8 PROCESSOR MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update boilerplate to current MIL-PRF-38535 requirements. - CFS 09-01-21 Charles F. Saffle B Add case outline Y. - PHN 09-09-02 Thomas M. Hess C Add device type 02. - PHN 10-01-19 Thomas M. Hess REV SHEET REV C C C C C C C C C C C C C C C C C C C

2、 SHEET 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 REV STATUS OF SHEETS REV C C C C C C C C C C C C C C SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Charles F. Saffle DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRA

3、WING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A CHECKED BY Charles F. Saffle APPROVED BY Thomas M. Hess MICROCIRCUIT, DIGITAL, 32-BIT SPARC V8 PROCESSOR, MONOLITHIC SILICON DRAWING APPROVAL DATE 07-11-09 REVISION LEVEL C SIZE A CAGE CODE 6

4、7268 5962-07224 SHEET 1 OF 33 DSCC FORM 2233 APR 97 5962-E160-10 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A 5962-07224 REVISION LEVEL C SHEET 2 DSCC FO

5、RM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (

6、PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 07224 01 Q X B Federal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) de

7、signator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specifi

8、ed RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function Frequency 01 AT697E 32-bit SPARC V8 processor 100 MHz 02 AT697F 32-b

9、it SPARC V8 processor 100 MHz 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class leve

10、l B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X See figure 1 349 Multila

11、yer Column Grid Array (MCGA) Y See figure 1 256 Quad Flat Pack unformed lead (MQFP) 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted wit

12、hout license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A 5962-07224 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ Supply voltage range (VDD) -0.3 V dc to 2.0 V dc for core Supply voltage range (VCC) -

13、0.3 V dc to 4.0 V dc for I/O Power dissipation (Pd) . 1.3W Storage temperature range -65C to 150C Maximum junction temperature (TJ) . 175C Thermal resistance junction to case (Rjc): Case outline X 3C/W Case outline Y 2.5C/W Operating free-air temperature range (TA) . -55C to +125C 1.4 Recommended op

14、erating conditions. Supply voltage range (VDD) 1.65 V to 1.95 V dc for core Supply voltage range (VDD) 3 V dc to 3.6 V dc for I/O Ambient operating temperature (TA) -55C to 125C Storage temperature 30C, 20 to 65% RH, dust free, original packing 1.5 Radiation features. Maximum total dose available (d

15、ose rate = 0.1 rads(Si)/s) . 100 krads(Si) 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are t

16、hose cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case

17、 Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenu

18、e, Building 4D, Philadelphia, PA 19111-5094.) _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ All voltage values are with respect to Ground Provided by IHSNot for Res

19、aleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A 5962-07224 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 2.2 Non-Government publications. The following document(s) form a part of th

20、is document to the extent specified herein. Unless otherwise specified, the issues of the documents are the issues of the documents cited in the solicitation or contract. INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS (IEEE) IEEE Standard 1149.1 - IEEE Standard Test Access Port and Boundary Scan

21、Architecture. (Applications for copies should be addressed to the Institute of Electrical and Electronics Engineers, 445 Hoes Lane, Piscataway, NJ 08854-4150.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawi

22、ng takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specif

23、ied herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN c

24、lass level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outli

25、ne. The case outline shall be in accordance with 1.2.4 herein and on figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Block diagram. The block diagram shall be as specified on figure 3. 3.2.4 Boundary scan instruction codes. The boundary scan in

26、struction codes shall be as specified on figure 4. 3.2.5 Timing waveforms. The timing waveforms shall be as specified on figure 5. 3.2.6 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under document revision level control and shall be made availabl

27、e to the preparing and acquiring activity upon request. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table IA and shall apply ove

28、r the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table IA. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. I

29、n addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marke

30、d. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-385

31、35. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A 5962-072

32、24 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate

33、 of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers prod

34、uct meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device clas

35、s M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any

36、 change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at

37、 the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 105 (see MIL-PRF-38535, appendix A). 3.11 IEEE 1149.1 compliance. These devices shall be compliant to IEEE 1149.1. Provided by IHSN

38、ot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A 5962-07224 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 TABLE IA. Electrical performance characteristics. Test Symbol Cond

39、itions -55C TA+125C, +3 V VCC +3.6 V, +1.65 V VDD +1.95 V, Output load = 30 pF for device type 01 and 50 pF for device type 02, unless otherwise specified Group A subgroups Device type Limits Unit Min Max Low level input current 1/ IILVIN= VSS 1, 2, 3 All -1 1 A Low level input with pull-up current

40、2/ IILpuVIN= VSS 1, 2, 3 All -500 -100 A Low level input with pull-up current 3/ IILpdVIN= VSS 1, 2, 3 All -5 -5 A High level input with pull-down current 1/ IIHVIN= VCC max 1, 2, 3 All -1 1 A High level input with pull-down current 2/ IIHpuVIN= VCC max 1, 2, 3 All -5 -5 A High level input with pull

41、-down current 3/ IIHpdVIN= VCC max 1, 2, 3 01 100 500 A 02 100 600 Output leakage current third state (low level applied) 4/ IOZLVIN= VSS 1, 2, 3 All -1 1 A Output leakage current third state (high level applied) 5/ IOZLpuVIN= VSS 1, 2, 3 All -500 -100 A Output leakage current third state (high leve

42、l applied) 4/ 5/ IOZHVIN= VCC max 1, 2, 3 All -1 1 A Low level output voltage 6/ VOLVCC= VCC min IOL= 2, 4, 8, 16 mA 1, 2, 3 All 0.4 V Low level output voltage for PCI buffers 7/ VOLPCIVCC= VCC min IOL= 1.5 mA 1, 2, 3 All 0.1 VccV High level output voltage 8/ VOHVCC= VCC min IOH= -2, -4, -8, -16 mA

43、1, 2, 3 All Vcc- 0.4 V High level output voltage for PCI buffers 8/ VOHPCIVCC= VCC min IOH= - 0.5 mA 1, 2, 3 All 0.9VccV Standby current ICCSBVCC= VCC max No clock active 1, 2, 3 All 5 mA Input capacitance 9/ CIN4 All 7 pF Input/output capacitance 9/ CI/O4 All 7 pF Functional tests ViL= 0.0 V, VIH=

44、VCCVOUT= VCC /2 VCC= 3.0 V, 3.3 V CL = 3 SRAM write with precharge burst length = 1; CL = 3 FIGURE 5. Timing waveforms Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, O

45、HIO 43218-3990 SIZE A 5962-07224 REVISION LEVEL C SHEET 28 DSCC FORM 2234 APR 97 Fetch from ROM, read and write from/to 32-bit I/O 0 waitstate Fetch from ROM, read and write from/to 32-bit I/O n waitstates FIGURE 5. Timing waveforms - Continued. Provided by IHSNot for ResaleNo reproduction or networ

46、king permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A 5962-07224 REVISION LEVEL C SHEET 29 DSCC FORM 2234 APR 97 Fetch from ROM, read and write from/to 32-bit I/O n waitstates + BRDY* FIGURE 5. Timing waveforms - Con

47、tinued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A 5962-07224 REVISION LEVEL C SHEET 30 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspecti

48、on. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. For device classes Q and V, screening shall be in accordance wi