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本文(DLA SMD-5962-07227 REV A-2009 MICROCIRCUIT DIGITAL-LINEAR CMOS 8 CHANNEL 50 kSPS TO 1 MSPS 12 BIT ANALOG TO DIGITAL CONVERTER MONOLITHIC SILICON.pdf)为本站会员(priceawful190)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-07227 REV A-2009 MICROCIRCUIT DIGITAL-LINEAR CMOS 8 CHANNEL 50 kSPS TO 1 MSPS 12 BIT ANALOG TO DIGITAL CONVERTER MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Make a correction to the clock frequency limit from 8.0 MHz to 0.8 MHz as specified under paragraph 1.4 and figure 1. Make a correction to fSCLKlimit from 8.0 MHz to 0.8 MHz in footnotes 2/ and 3/ as specified under Table IA. Make clarification t

2、o footnote 1/ as specified under Table IIB. - ro 09-10-27 C. SAFFLE REV SHET REV A A A A A A A SHEET 15 16 17 18 19 20 21 REV STATUS REV A A A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY RICK OFFICER DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-

3、3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY RAJESH PITHADIA APPROVED BY ROBERT M. HEBER MICROCIRCUIT, DIGITAL-LINEAR, CMOS, 8 CHANNEL, 50 kSPS TO 1 MSPS, 12 BIT ANALOG TO DIGITAL C

4、ONVERTER, MONOLITHIC SILICON DRAWING APPROVAL DATE 09-03-11 AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-07227 SHEET 1 OF 21 DSCC FORM 2233 APR 97 5962-E464-09 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZ

5、E A 5962-07227 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choic

6、e of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 R 07227 01 V Z A Federal stock clas

7、s designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Leadfinish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the app

8、ropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type

9、 Generic number Circuit function 01 ADC128S102 Radiation hardened, CMOS, 8 channel, 50 kSPS to 1 MSPS, 12 bit analog to digital converter 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements

10、 documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1

11、835 and as follows: Outline letter Descriptive designator Terminals Package style Z GDFP1-G16 16 Flat pack with gullwing leads 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for Resale

12、No reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-07227 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Analog supply voltage (VA) . -0.3 V to 6.5 V D

13、igital supply voltage (VD) -0.3 V to VA+ 0.3 V 6.5 V maximum Voltage on any pin to GND . -0.3 V to VA+ 0.3 V Input current at any pin . 10 mA 2/ Power dissipation (PD) at TA= +25C 1.181 W 3/ Package input current . 20 mA 2/ Electrostatic susceptibility: 4/ Human body model (HBM) 8,000 V Lead tempera

14、ture (soldering, 10 seconds) +260C Junction temperature (TJ) . +175C Storage temperature range . -65C to +150C Thermal resistance, junction-to-case (JC) . 11.2C/W Thermal resistance, junction-to-ambient (JA) 127C/W 1.4 Recommended operating conditions. VAsupply voltage . +2.7 V to +5.25 V VDsupply v

15、oltage . +2.7 V to VADigital input voltage . 0 V to VAAnalog input voltage . 0 V to VAClock frequency 0.8 MHz to 16 MHz Ambient operating temperature range (TA) . -55C to +125C 1.4.1 Operating performance characteristics. 5/ Full power bandwidth (FPBW) (-3 dB): VA= VD= +3.0 V 6.8 MHz VA= VD = +5.0 V

16、 10 MHz Channel to channel isolation (ISO): VA= VD= +3.0 V 84 dB VA= VD = +5.0 V 85 dB Input voltage range (VIN) 0 to VA_ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2

17、/ When the input voltage at any pin exceeds the power supplies ( VIN AGND or VIN VAor VD), current at that pin should be limited to 10 mA. The 20 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 10 mA to two. 3/ The

18、absolute maximum junction temperature (TJmax) for this device is 175C. The maximum allowable power dissipation is dictated by TJmax, the junction to ambient thermal resistance (JA), and the ambient temperature (TA), can be calculated using the formula PDMAX = (TJMAX TA) / JA. The values for maximum

19、power dissipation listed above will be reached only when the device is operated in a severe fault condition (for example, when input or output pins are driven beyond the power supply voltages, or the power supply polarity is reversed). 4/ Human body model is 100 pF capacitor discharged through a 1.5

20、 k resistor. Machine model is 200 pF discharged through 0 . 5/ These represent performance characteristics of the device and are not guaranteed through test. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-07

21、227 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 1.4.1 Operating performance characteristics - continued. 5/ Input capacitance (CINA): Track mode . 38 pF Hold mode . 4.5 pF Digital input capacitance (CIND) . 3.5 pF maximum High impedance out

22、put capacitance (COUT) 3.5 pF maximum Output coding Straight natural binary SCLK duty cycle (DC) . 30 % 70 % Aperture delay (tD) 4 ns SCLK high time (tCH) 0.4 x tSCLKns minimum SCLK low time (tCL) 0.4 x tSCLKns minimum 1.5 Radiation features. Maximum total dose available (dose rate = 50 300 rads(Si)

23、 / s) 100 krads(Si) 6/ Single event latch-up (SEL) 120 MeV-cm2/mg 7/ 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issue

24、s of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard

25、 Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Or

26、der Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) _ 6/ Device type 01 is irradiated at dose rate = 50 - 300 rads(Si)/s in accordance with MIL-STD-883, method 1019, condition A, and is guaranteed to a maximum total dose specified. The effective dose rate after extended room tem

27、perature anneal = 0.16 rad(Si)/s per MIL-STD-883, method 1019, condition A, section 3.11.2. The total dose specification for this device only applies to the specified effective dose rate, or lower, environment. 7/ Limits are based on characterization, but not production tested unless specified on th

28、e purchase order or contract. See table IB. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-07227 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 2.2 No

29、n-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of the documents are the issues of the documents cited in the solicitation. AMERICAN SOCIETY FOR TESTING AND MATERIALS (ASTM) ASTM F1192 Standard G

30、uide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion Irradiation of Semiconductor Devices. (Copies of this document is available online at http:/www.astm.org/ or from ASTM International, P.O. Box C700, 100 Bar Harbor Drive, West Conshohocken, PA 19428-2959). 2.3 Order of pre

31、cedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requi

32、rements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described her

33、ein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-

34、PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline. The case outline shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Block diagram. The

35、block diagram shall be as specified on figure 2. 3.2.4 Timing waveforms. The timing waveforms shall be as specified on figure 3. 3.2.5 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under document revision level control and shall be made available

36、to the preparing and acquiring activity upon request. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table IA and shall apply over

37、the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table IA. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In

38、addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked.

39、 Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535

40、. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see

41、6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this

42、drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. Provided by IHSNot for ResaleNo reproduction or networking permitted without license fr

43、om IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-07227 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 TABLE IA. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TA+125C Group A subgroups Device type Limits Unit unless

44、 otherwise specified Min Max Static converter characteristics. 2/ Resolution with no missing codes 1,2,3 01 12 Bits Integral non linearity INL VA= VD= +3.0 V 1,2,3 01 -1.0 +1.1 LSB (end point method) VA= VD= +5.0 V -1.25 +1.4 Differential non linearity DNL VA= VD= +3.0 V 1,2,3 01 +0.9 LSB -0.7 VA= V

45、D= +5.0 V +1.5 -0.9 Offset error VOFFVA= VD= +3.0 V 1,2,3 01 -2.3 +2.3 LSB VA= VD= +5.0 V -2.3 +2.3 Offset error match OEM VA= VD= +3.0 V 1,2,3 01 -1.5 +1.5 LSB VA= VD= +5.0 V -1.5 +1.5 Full scale error FSE VA= VD= +3.0 V 1,2,3 01 -2.0 +2.0 LSB VA= VD= +5.0 V -2.0 +2.0 Full scale error match FSEM VA

46、= VD= +3.0 V 1,2,3 01 -1.5 +1.5 LSB VA= VD= +5.0 V -1.5 +1.5 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-07227 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVIS

47、ION LEVEL A SHEET 7 DSCC FORM 2234 APR 97 TABLE IA. Electrical performance characteristics Continued. Test Symbol Conditions 1/ -55C TA+125C Group A subgroups Device type Limits Unit unless otherwise specified Min Max Dynamic converter characteristics. 2/ Signal to noise plus distortion ratio SINAD

48、VA= VD= +3.0 V, fIN= 40.2 kHz, -0.02 dBFS 4,5,6 01 68 dB VA= VD= +5.0 V, fIN= 40.2 kHz, -0.02 dBFS 68 Signal to noise ratio SNR VA= VD= +3.0 V, fIN= 40.2 kHz, -0.02 dBFS 4,5,6 01 69 dB VA= VD= +5.0 V, fIN= 40.2 kHz, -0.02 dBFS 68.5 Total harmonic distortion THD VA= VD= +3.0 V, fIN= 40.2 kHz, -0.02 dBFS 4,5,6 01 -74 dB VA= VD= +5.0 V, fIN= 40.2 kHz, -0.02 dBFS -74 Spurious free dynamic range SFDR VA= VD= +3.0 V, fIN= 40.2 kHz, -0.02 dBFS 4,5,6 01 75 dB VA= VD= +5.0 V, fIN= 40.2 kHz, -0.02 dBFS 75 Effective number of bits ENOB VA= VD= +3.0 V, fIN=

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