DLA SMD-5962-38294 REV J-2010 MICROCIRCUIT MEMORY DIGITAL CMOS 8K x 8 STATIC RANDOM ACCESS MEMORY (SRAM) MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED E Added changes in accordance with NOR 5962-R085-93 93-03-16 M. A. Frye F Added device types 45, 46, and 47. Removed CAGE code 34168 for case outline 8, and added cage code 34168 for case outline 9. Editorial changes throughout. 95-11-14 M. A. Frye

2、 G Added device types 48-68. ICC1 changes for device types 18, 19, 46, and 47. Updated boilerplate. glg 98-02-20 Raymond Monnin H Updated boilerplate paragraphs as part of a 5 year review. ksr 05-05-18 Raymond Monnin J Updated boilerplate paragraphs as part of a 5 year review. ksr 10-11-05 Charles F

3、. Saffle REV J J J J J J J J J J J J J J SHEET 35 36 37 38 39 40 41 42 43 44 45 46 47 48 REV J J J J J J J J J J J J J J J J J J J J SHEET 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 REV STATUS REV J J J J J J J J J J J J J J OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A

4、PREPARED BY Kenneth Rice DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY Charles Reusing THIS DRAWING IS AVAILABLE FOR USE BY All DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE APPROVED BY Michael A. Frye MICROCIRCUIT, MEMORY, DI

5、GITAL, CMOS, 8K x 8 STATIC RANDOM ACCESS MEMORY (SRAM), MONOLITHIC SILICON DRAWING APPROVAL DATE 90-10-29 AMSC N/A REVISION LEVEL J SIZE A CAGE CODE 67268 5962-38294 SHEET 1 OF 48 DSCC FORM 2233 APR 97 5962-E049-11 Provided by IHSNot for ResaleNo reproduction or networking permitted without license

6、from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-38294 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space

7、application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 59

8、62 - 38294 01 Q X A | | | | | | | | | | | | | | | | | | Federal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked de

9、vices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type

10、(s). The device type(s) identify the circuit function as follows: Device type Generic number 1/ Circuit function Data retention Access time 01 No 150 ns 02 Yes 120 ns 03 No 120 ns 04 Yes 100 ns 05 No 100 ns 06 Yes 70 ns 07 No 70 ns 08 Yes 55 ns 09 No 55 ns 10 8K x 8 CMOS SRAM Yes 45 ns 11 No 45 ns 1

11、2 Yes 35 ns 13 No 35 ns 14 Yes 25 ns 15 No 25 ns 16 Yes 20 ns 17 No 20 ns 18 Yes 15 ns 19 No 15 ns 20 Yes 70 ns 21 No 70 ns 22 Yes 55 ns 23 No 55 ns 24 Yes 45 ns 25 No 45 ns 26 Yes 35 ns 27 No 35 ns 28 Yes 25 ns 29 No 25 ns 30 No 20 ns 31 Yes 100 ns 32 Yes 70 ns 33 Yes 55 ns 34 Yes 45 ns 1/ Generic

12、numbers are listed on the Standard Microcircuit Drawing Source Approval Bulletin at the end of this document and will also be listed in MIL-HDBK-103 and QML-38535. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5

13、962-38294 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 3 DSCC FORM 2234 APR 97 Device type Generic number 1/ Circuit function Data retention Access time 35 Yes 85 ns 36 Yes 70 ns 37 Yes 55 ns 38 Yes 120 ns 39 Yes 70 ns 40 8K x 8 CMOS SRAM Yes 120 ns 41 Yes 70 ns 42 Yes 55 n

14、s 43 Yes 55 ns 44 No 55 ns 45 Yes 120 ns 46 Yes 12 ns 47 No 12 ns 48 No 70 ns 49 Yes 55 ns 50 No 55 ns 51 Yes 45 ns 52 No 45 ns 53 Yes 35 ns 54 No 35 ns 55 Yes 25 ns 56 No 25 ns 57 Yes 20 ns 58 No 20 ns 59 No 70 ns 60 Yes 55 ns 61 No 55 ns 62 Yes 45 ns 63 No 45 ns 64 Yes 35 ns 65 No 35 ns 66 Yes 25

15、ns 67 No 25 ns 68 No 20 ns 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B

16、 microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X GDIP1-T28 or CDIP2-T28 28 D

17、ual-in-line Y CQCC1-N32 32 Rectangular chip carrier Z CDIP3-T28 or GDIP4-T28 28 Dual-in-line U CQCC4-N28 28 Rectangular chip carrier T GDFP2-F28 28 Flat pack M CDFP4-F28 28 Flat pack N See figure 1 28 Flat pack 9 See figure 1 36 Flat pack 8 See figure 1 36 Flat pack 1/ See footnote 1/, page 2. Provi

18、ded by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-38294 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 4 DSCC FORM 2234 APR 97 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38

19、535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 1.3 Absolute maximum ratings. 2/ 3/ Supply voltage range (VCC) - -0.5 V dc to +7.0 V dc DC input voltage range (VIN) - -0.5 V dc to VCC+0.5 V dc 4/ DC output voltage range (VOUT) - -0.5 V dc to VCC+0.5 V dc 4/ Storage te

20、mperature range - -65C to +150C Lead temperature (soldering, 10 seconds) - +260C Thermal resistance, junction-to-case (JC): Cases X, Y, Z, U, T, and M - See MIL-STD-1835 Case N - 10C/W 5/ Case 9 - 2.0C/W 5/ Case 8 - 3.3C/W 5/ Output voltage applied in high-Z state - -0.5 V dc to VCC+0.5 V dc Maximum

21、 power dissipation, (PD) - 1.0 W Maximum junction temperature (TJ) - +150C 6/ 1.4 Recommended operating conditions. Supply voltage range (VCC) - 4.5 V dc minimum to 5.5 V dc maximum Supply voltage (VSS) - 0.0 V dc High level input voltage range (VIH): Device types 1-39,46-68,42,44 (TTL levels) - -2.

22、2 V dc to VCC+ 0.5 V dc Device types 40,41,43,45 (CMOS levels) - 0.8 x VCCto VCC+ 0.5 V dc Low level input voltage range (VIL) Device types 1-39,46-68,42,44 (TTL levels) - -0.5 V dc to 0.8 V dc Device types 40,41,43,45 (CMOS levels) - -0.5 V dc to 0.2 x VCCCase operating temperature range (TC) - -55

23、C to +125C 1.5 Digital logic testing for device classes Q and V. Fault coverage measurement of manufacturing logic tests (MIL-STD-883, test method 5012) - 100 percent 2/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may

24、degrade performance and affect reliability. 3/ All voltages referenced to VSS(VSS= ground) unless otherwise specified. 4/ Negative undershoots to a minimum of -3.0 V are allowed with a maximum of 20 ns pulse width. 5/ When the thermal resistance for this case is specified in MIL-STD-1835 that value

25、shall supersede the value indicated herein. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-38294 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 5 DSCC FORM 2234 APR 97 2. APPLICABLE D

26、OCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF

27、DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 -

28、List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Go

29、vernment publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of the documents are the issues of the documents cited in the solicitation. AMERICAN SOCIETY FOR TESTING AND MATERIALS (ASTM) ASTM Standard F1192 - Sta

30、ndard Guide for the Measurement of Single Event Phenomena from Heavy Ion Irradiation of Semiconductor Devices. (Applications for copies of ASTM publications should be addressed to: ASTM International, PO Box C700, 100 Barr Harbor Drive, West Conshohocken, PA 19428-2959; http:/www.astm.org.) ELECTRON

31、ICS INDUSTRIES ASSOCIATION (EIA) JEDEC Standard EIA/JESD78 - IC Latch-Up Test. (Applications for copies should be addressed to the Electronics Industries Association, 2500 Wilson Boulevard, Arlington, VA 22201; http:/www.jedec.org.) (Non-Government standards and other publications are normally avail

32、able from the organizations that prepare or distribute the documents. These documents also may be available in or through libraries or other informational services.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this

33、 drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as

34、specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non

35、-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case

36、 outline(s). The case outline(s) shall be in accordance with 1.2.4 herein and figure 1. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-38294 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL J S

37、HEET 6 DSCC FORM 2234 APR 97 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Truth table(s). The truth table(s) shall be as specified on figure 3. 3.2.4 Radiation exposure circuit. The radiation exposure circuit shall be as specified on figure 6 . 3.2.5

38、Functional tests. Various functional tests used to test this device are contained in appendix A herein. If the test patterns cannot be implemented due to test equipment limitations, alternate test patterns to accomplish the same results shall be allowed. For device class M, alternate test patterns s

39、hall be maintained under document revision level control by the manufacturer and shall be made available to the preparing or acquiring activity upon request. For device classes Q and V, alternate test patterns shall be under the control of the device manufacturers Technology Review Board (TRB) in ac

40、cordance with MIL-PRF-38535 and shall be made available to the preparing or acquiring activity upon request. 3.2.6 Die overcoat. Polyimide and silicone coatings are allowable as an overcoat on the die for alpha particle protection only. Each coated microcircuit inspection lot (see inspection lot as

41、defined in MIL-PRF-38535) shall be subjected to and pass the internal moisture content test at 5000 ppm (see method 1018 of MIL-STD-883). The frequency of the internal water vapor testing shall not be decreased unless approved by the preparing activity for class M. The TRB will ascertain the require

42、ments as provided by MIL-PRF-38535 for classes Q and V. Samples may be pulled any time after seal. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are a

43、s specified in Table IA and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table IA. 3.5 Marking. The part shall be mar

44、ked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option,

45、 the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “Q