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本文(DLA SMD-5962-38480-1993 MICROCIRCUIT DIGITAL N-CHANNEL 8-BIT MICROPROCESSOR MONOLITHIC SILICON《硅单片8比特微型信息处理器 N沟道数字微型电路》.pdf)为本站会员(刘芸)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-38480-1993 MICROCIRCUIT DIGITAL N-CHANNEL 8-BIT MICROPROCESSOR MONOLITHIC SILICON《硅单片8比特微型信息处理器 N沟道数字微型电路》.pdf

1、SMD-5962-38480 7999996 0042528 706 -5 LTR DESCRIPTION DATE tYR-MO-DA) APPROVED REV CHECKED BY Tom Hess APPROVED BY SHEET 35 I I I DAYTON, OHIO 45444 MICROCIRCUIT, DIGITAL, N-CHANNEL, 8-BIT MICROPROCESSOR, MONOLITHIC REV STATUS OF SHEETS DRAWING APPROVAL DATE 93-06-17 REVISION LEVEL PMIC NIA SIZE CAG

2、E CODE 5962-38480 A 67268 SHEET 1 OF 35 STANDARD1 ZED MILITARY DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AHSC N/A PREPARED BY Jeffery Tunstall I DEFENSE ELECTRONICS SUPPLY CENTER Honica Poelking I SILICON DESC FORM 193 JUL 91 DISTRIBUTION

3、STATEMENT A. Approved for public release; distribution is unlimited. 5962-E141-93 Licensed by Information Handling ServicesSMD-59b2-38480 999999b 0042529 642 STMIDIUDIZIGD MLLITARY MUWIIG DEFEISE ELECTRONICS SUPPLY CE#TaR DAYTOW, OR10 45444 1. SCOPE 1.1 scopt. TM -duct assurance classes consisting o

4、f military high reliability (device classes 8, Q, and M) and space application levice classes S and V), and a choice of Case outlines and Id finishes are available and are reflected in the Part 5 Identifying Nuribcr (PIN). Device class H microcircuits represent non-JAN cless 6 microcircuits in accor

5、dance with 2.1 of MIL-STD-883, “?rovisims for the use of HIL-STO-883 in conjunction with carpliant non-JAN devices”. railsble, a choice of Radiation H8rdnesa Aswr8nce (RHAI levels are reflected in the PIN. 1.2 m. The ?IN shall be as shown in the following exaaple: This drawing forms a part of a one

6、part - one part nwber documentation system (see 6.6 herein). When - M a X M - 1 I I I 5962 38480 - I t I I I I Lead (see 1.2.5) I Case Devi ce Devi ce 1- Federal RHA stock class designator tw class outline finish designator (ace 1.2.1) (see 1.2.2) designator (see 1.2.4) I (sea 1.2.3) I Drawing nurba

7、r 1.2.1 BHA desianator. wels and shall be mrked with the appropriate IWA deslgnator. ve MIL-1-38535 specifid RHA levels rind shall be rrkd with the -riate RHA designator. Devia classes II, B, 8nd 5 RHA rrrkad devices 8hll mt the MIL-M-38510 Specified RHA Device classes Q and V RHA marked devices sha

8、ll meet A dash (-) indicates a M-RHA device. 1.2.2 Device type($. The device typeCs) hl1 identify the circuit function as follows: Device typa Generic nuilbcc Clock frmuency Circuit function SIZE 5962-38480 A REVISION LEVEL SHEET o1 02 o3 y 4.0 Wz 2.5 Wz 6.0 Mz from input or loutput pin to ground, a

9、ll lother pins at ground !cI I Isee 4.4.1 il Output capacitance, IC() I all outputs and data bus I I I Isee 4.4.lb I i Funct i ona 1 test I Naximum clock frequency If, IV = 4.5 V I ICY= 50 pF *IO% I I I I I I ICL = 50 pF i 10% I I I I Raxiaum clock frequency If, IVcc = 5.5 V I I I IC, = 140 pF i 10%

10、 I see figures 4 and 5 I I I itr I I I = 4.5 v tss otherwise specified; Clock cycle time Clock time IRise li Clock pulse I I I I tPUH1 I uidth high II uidth lou I Clock pulse i i I I I I RREQ puise uidth high I I ItPUH2 I I I I See footnotes at end of table. Lefer. i Group A Device 1 Limits i Unit N

11、o I subgroups I type I I 21 I I I l I I Hin I Max I I I I I I I I I I I I 4 I ALL I I 35 I PF I I 4 I ALL I I5 IPF I I I I I I I I I I I I 4 I ALL I I I I I I I 1,2,3 I ALL I -10 I +IO I jiA I 15 I PF i i I I I I I l I I I I I 01 1 4.0 1 I I I I I I I I I I I I MHz I 9,10,11 I O2 I 2.5 I I I 03 I 6.

12、0 I I I 01 I 4.0 I I I I I I I I i 9,10,11 i 02 2.5 i 1 HHz I I I I I I I 03 I 6.0 I I I 01 I 250 I I I I I I I I IO2 14001 I 1 I 9,10,11 I I I 31 I ns I I 03 I 165 I I 5 I 9,10,11 I 01,02 I 130 Ins I I I I I I I I I I I I I 03 I I 20 I 4 I 9,10,11 I M,02 1 130 Ins .- I I l I I I o1 I 110 I 2.000 I

13、i iii 3 I 9,10,11 I O2 I 180 I 2,000 I ns I ILI I I 03 I 65 I 2,000 I I I I I I I I I I I I I I I I I ns 10 I 9,10,11 I All I A/ I STANDARD1 ZED 5962-38480 MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 REVISION LEVEL I I I I DESC FORM 193A JUL 91 Licensed by Information Handl

14、ing ServicesSMD-5762-38480 W 9999996 0042535 946 I 01 I I I O2 I I Test 35 I I 50 I I I ns - REQ Pulse idth lou I 17 I 9,10,11 I 03 I oi, I 03 I I - IR pulse width low I ns 60 I m I I 601 % pulse width low I lm I 102 I 25 I 9,10,11 I 03 I I 01 102 I 03 I I I I I I lata setup to clock t (DO - 07) 50

15、I I I 60 I I ns 50 I I I 60 I 401 40 I setup to clock 4 )ata setup to clock (DO - D7) - sw setup to clock t TABLE I. Electrical performance characteristics - Continued. I Limits I Unit I l I I conditions I Refer. I Group A I Device I I symbol I I -55OC 5 TC S +12SoC I No I subgroups 1 type 1 I I unl

16、ess otherwise specified I 21 I I I I I I y 4.5 v I vcc s 5.5 v I I I I min I Max I I I I I I tpuy IVc = 4.5 v I 11 I 9,10,11 I ALL I s/ 1 I ns lunfess otherwise specified; I I l I I I CL = 140 pF *IO% Isee figures 4 and 5 I tPUL3 I -I I tPuL4 I -1 I tSZH1 I -i I %ZL1 i I I -1 I tSLH1 I -1 SHLI I - I

17、 I I I RESET setup to clock t (tSm I I I INT setup to clock t ltsw I I I I I Data valid after RD t ItHLZ1 I (DO - D7) 1-1 i I I I l I I I I I I I I I I I i I I I I I I I I I I I 03 I 70 I I ns I 37 I 9,10,11 I 01.02 1 80 I i o1 i 35 i i 102 150 I I I I I 103 lm I I i I i I I I I I I I I I I i I 102

18、180 I I I 03 I 50 I I I I I I I I I I i I 146 I I I 9,10,11 ns I 1 1 I I I I I I I i I I I 103 I 70 I I I 16 I 9,10,11 I All I O I I i I i I I I I I I I I I See footnotes at end of table. STANDARI ZED 5962-38480 MILITARY DRAWIG DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 REVISION LEVEL DESC

19、 FORM 193A JUL 91 Licensed by Information Handling ServicesSMD-59b2-38480 9999996 O042536 882 I I 1 I STANDARD1 ZED MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 SIZE 5962-38480 A SHEET REVISION LEVEL 9 Licensed by Information Handling ServicesTABLE I. Electrical performance

20、characteristics - Continued. I I I I I I I I I I I I I I I I I I I l I HREQ t , RD t , I- I I I I I .I I I I I I I I wtorIORQt I II I - ItPZL1 I I I I I I I I I I I I I I I I I I I I I I I I I I I (I/o write) 1-1 I I I I I I Data stable from i t ItpL= I I I I I I I ns I I I I I I I I 1-1 I I I Clock

21、 t to I I I I ns IC, = 150 pF *IO% I 45 I 9,10,11 I ALL 1 21 I Isee figures 4 and 5 ItmL4 - I no I 29 I 9,10,11 I AU I u/ I I 20 I 9,10,11 I 01 I I 03 1 102 I I I I I I ns 1 I - I I I I I I I I I 130 I ns I I l I I I I I 180 I 110 I I I I 120 I ns I I I I I I I 150 I loo I 1021 I I I I l I I I I I 0

22、1.02 I I 300 I I I Clock 4 to HALT I I I I I I I I I I i3(JoI I 01.02 I valid delay 1-1 I 03 I I 260 I I I I I 100 I ns I I I I I I I I I I I I 120 I i 901 102 103 I I I I 100 I ns I I I I l I I I I I I 110 I 103 I901 I I 102 I 80 I ns I I I I I I I I 43 I ,IO,II I m 110 I 701 102 103 I Ise figures

23、4 and 5 I I 50 I 9,10,11 I All I a/ I HI J. before ioRa 4 I tPHL14 I I I I 102 I I I I I 21 9,10,11 I M I 03 Clock t to RFSH 4 delay IfpHLi5 I I 22 I 9,10,11 I 01 I I 03 I clock t to t delay Itpllil5 I 1 260 I ns I M I 9,10,11 I 03 I I I PW6 ItPHL16 I 7 I 40 I 9,10,11 I M I Clock t t0 Busw 4 daLw It

24、pHL17 I - I 41 I 9,10,11 I 01 Clock 4 to WSM t delay Itpull8 I -,I I I I IORQ, float delay I I I I Clock? to MREQ, RD, UR, ItpHZ4 I See footnotes at md of table. STANDARDIZED SIZE 5962-38480 MILITARY DRAWING r DEFENSE ELECTRONICS SUPPLY CETER DAYTON, OHIO 45444 REVISION LEVEL SHEET 12 DESC FORM 193A

25、 JUL 91 Licensed by Information Handling ServicesSMD-5962-38480 9999996 0042540 203 Constant table I - 11 All test to be performed using worst-case test conditions unless otherwise specified. - 2/ The reference nuibcr refers to the position where the parameter being measured appears on figure 4. = t

26、 + tu + + tf 41 tpUHZ = tpyHl + tf - h (see constant table) 21 tpuy = tcyc - g (see constant table) G/ tpWU = tcyc - j (see constant table) 11 tpLU or tPHU = tpuH1 + tf - a (see constant table) S/ tpW or tpHO = tcyc - b (see constant table) 21 tpw4 or tpHL4 = tpuL1 + tr - c (see constant table) - IO

27、/ tPZL1 or tpZH1 = tcyc - d (see constant table) - Il/ tpZU or tpZa = tPUL1 + tp - e (see constant tile) - 121 tpLz2 or tpHa = tpUL1 + tr - f (see constant table) - 131 tpHL13 = 2 (tcyc) +tpuH, +tr - k (see constant table) - 141 The ac paranters represented by notes 51 through cl are CLK dependent,

28、the quations are used to CelCUlatt limits for any given set of CLK paranters (clock high, clock Lou, clock cycle time) within the frequency of operation. STANDARDIZED SIZE 5962-38480 MILITARY DRAWIIOG A DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 REVISION LEVEL SHEET 13 DESC FORM 193A JUL 9

29、1 Licensed by Information Handling ServicesI A lie A 12- A 13 A 14 A 15- 04- 03 - - 05 4 06- + 5v - 02 - c 07 - 2 DO- INt - CLOCK - 01 - - Nil I HAL T HREO - IORO e- - - - SMD-5962-38480 1 2 3 4 -5 6 =7 8 -9 10 11 12 13 14 1s 16 - 17 18 . 19 20 = 7b 0042543 34T 40 39 38 37 36 35 34 33 32 31 30 29 28

30、 27 26 25 24 23 22 21 Device types 01, 02, and 03 Case O - A10 - A9 - A7 - A5 : A4 - A3 A2 -A1 5 AO A A8 GND - - . a RFSH I- RESET BUSRO WAIT - BUSAK WR - RO cm - - - - - - STAWDARDIZED MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CEITER SIZE 5962-38480 A FIGURE 1. Teraina1 connections (pin assisruen

31、t). DAYTON, OHIO 45444 I REVISION LEVEL I SHEET 14 - DESC FON4 i93A JUL 91 Licensed by Information Handling ServicesSMD-5962-3YO 999999b 0042542 OBb W STANDARD1 ZED SIZE MILITARY DRAWING A DEFENSE ELECTRONICS SUPPLY CEMTER DAYTON, OHIO 45444 REVISION LEVEL evi ce. type Ise outline erminal number 1 2

32、 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 5962-38480 SHEET 15 Device types M, 02 and 03 Cases X and Y M, 02 and 03 .X and Y Terminal symbol Al 1 Al 2 Al 3 Al 4 Al 5 NI c CU D4 D3 D5 D6 NIC vcc D2 D7 w evi ce type ase outline erminal nunber 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38

33、39 40 41 42 43 44 01, O2 and 03 X and Y Terminal sylbol - RD NI c - NIC BUSAK UAIT RESET MI RFSH WR BUSRQ - - - GND AO AI A2 A3 A4 A5 A6 A7 AB A9 Al O FIGURE 2. Terminal connections. - Continued. Licensed by Information Handling ServicesDevi ce tyms 01, 02. and 03 MILITARY DRAWING DEFENSE ELECTRONIC

34、S SUPPLY CENTER DAYTON, OHIO 45444 fi 8 BIT DATA BUS A REVISION LEVEL SHEET 16 DATA BUS CONTROL I CONTROL +5 111 V GND CLOCK +, V 16 BIT ADDRESS BUS FIGURE 2. Block diaram. I STANDARDIZED I SIZE I 1 5962-38480 Licensed by Information Handling ServicesSPID-5962-3480 9999996 0042544 959 m STANDARDIZED

35、 MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 FROH OUTPUT OF DUT SIZE 5962-38480 A REVISION LEVEL SHEET 17 “BIAS1 s NOTES: 1. 3. All diodes are 1k or quivalent. 4. For AC testing: C = 140 pF tMX for pins 1-5, 7-10, 12-15, 18-23, 27, 28, 30-40: 2. R = 55m t5, R = 9.6 m a. VBi

36、asl = 2.1 v *5%, VBias2 = o v. For Tristatc tests: a. Logic “1“ to tristatc (address, data and control out pin) b. Logic “O“ to tristatc (address and thta pins only) veias, = 1.0 v *5%, VBias2 = -10 v *s.%. vsias1 = 4.5 v *!i%, Veia these tests shall have been fault graded in accordance with MIL-STD

37、-883, test method 5012 (se 1.5 herein). For device c. Subgroups 4 (Cc, CI and CI# measurements shall be measured only for the initial test and after process or design changes which may a ect capacitance. rqui red. A minimum sample size of five devices with zero rejects shall be DESC FORM 193A JUL 91

38、 Licensed by Information Handling ServicesSMD-5762-38480 999999b 0042557 507 STADARDI ZED MILITARY DRAWING DEFEHSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 4.4.2 verein. 4.4.3 herein. SIZE 5962-38480 A REVISION LEVEL SiEET 30 TABLE IIA. Electrical test rcauirements. I I Subgroups I subgroups I I

39、 I I I table III) I I I I I I I I M I B I S 1 Q I “I I I I I l I Interi II elect r i Ca 1 I 1,7,9 I 1,7,9 I 1,7,9 I 1,7,9 I 1,7,9 I parameters (see 4.2) I I I I I I I 110,ll y 110,ll I/ Il0,ll 2/ Il0,ll I/ 110,ll 2/ I Test rquirentnts I (per method 5005,table I) (per MJL-1-38535, I I Device I Device

40、 I Device 1 Device I Device I I class I class I class I class I class I Final electrical 11,2,3, 11,2,3, 13, 1123, 1123, I parameters (see 4.2) 179 178, 178, 178, 173, I I I I I I I I I I I I I I I I I I I i 1,7,9 i - I I wrameters (see 4.4) I I I I I I I I I 1 I I 1,7,9 I 1,7,9 I parameters (see 4.

41、4) I I I I I I I I I I wramters (see 4.4) I I I I I I I I I I I I wrameters (see 4.4) I I I I I I Group B end-point electrical i - i - Group C &-point electrical I 1,7,9 I 1,7,9 I - Group D end-point electrical I 1,7,9 I 1,7,9 1 1,7,9 I 1,7,9 I 1,7,9 I Group E end-point electrical I 1,7,9 I 1,7,9 I

42、1,7,9 I 1,7,9 I 1,7,9 I - I/ PDA applies to subgroup 1. - 2/ PDA applies to subgroups 1 and 7. Group B inspection. The group B inspection end-point electrical psruaters rh611 be as 8pecified in table II For device class S steady-state life tests, the test circuit shall be wbiitte to the qualifying a

43、ctivity. Grow C inspcction. The group C inspection &point electrical parameters shall be as specified in table 11 4.4.3.1 Additional criteria for device classes i4 and B. Steady-state life test conditions, method 1005 of ML-STD-883 : a. Test condition A,B,C or D. For device class n, the test circuit

44、 shall be mintainad by the uanufacturer under docucnt revision level control and hl1 be udc available to the praprrring or acquiring activity upon request. For device class 8, the test circuit shall be rukitted to the qualifying activity. For device classes N and 8, the test circuit shall specify th

45、e inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test aethod 1005. b. TA = +12SoC, mini-. c. Test duration: 1,ooO hours, except as permitted by method 1005 of MIL-STD-883. 4.4.3.2 Additional criteria for device classes Q d V. The steady-stat

46、e life test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturers U plan in accordance with MIL-1-38535. manufacturers TRB in accordance with MIL-1-38535 and shall be de available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005. The test circuit shall be maintained under document revision level control by the device Licensed by Information Handling Services

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