DLA SMD-5962-76006 REV K-2005 MICROCIRCUIT DIGITAL LOW-POWER SCHOTTKY TTL DECODERS MONOLITHIC SILICON《硅单片译码器肖脱基小功率TTL数字微型电路》.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED F Convert to military drawing format. Add LCC package. Add logic diagram. Change code ident. no. to 67268. Remove vendors CAGE 34335, 07263, 27014. Editorial changes. 87-10-07 R. P. Evans G Changes in accordance with NOR 5962-R137-92. -pn 92-02-21

2、Monica L. Poelking H Changes in accordance with NOR 5962-R214-93. -tvn 93-08-19 Monica L. Poelking J Update to reflect latest changes in format and requirements. Editorial changes throughout. -les 02-12-05 Raymond Monnin K Update to reflect latest changes in format and requirements. Correct paragrap

3、h in 3.5. Editorial changes throughout. les 05-08-16 Raymond Monnin THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED. CURRENT CAGE CODE 67268 REV SHET REV SHET REV STATUS REV K K K K K K K K K K K K OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Joseph A. Kerby DEFENSE SUPP

4、LY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY D. A. DiCenzo COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Robert P. Evans MICROCIRCUIT, DIGITAL, LOW-POWER SCHOTTKY TTL, DECODERS, MONOLITHIC AND AGENCIES OF THE DEPARTME

5、NT OF DEFENSE DRAWING APPROVAL DATE 77-02-03 SILICON AMSC N/A REVISION LEVEL K SIZE A CAGE CODE 14933 76006 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E455-05 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 76006 DE

6、FENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Nu

7、mber (PIN). The complete PIN is as shown in the following example: 76006 01 E X Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type. The device type identify the circuit function as follows: Device type Generic number Circuit function 01 54LS193 Syn

8、chronous 4-bit up/down binary counter 1.2.2 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 dual-in-line F GDFP2-F16 or CDFP3-F16 16 flat 2 CQCC1-N20 20 square chip carrier 1.

9、2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage . -0.5 V dc to +7.0 V dc Input voltage range . -1.5 V dc at -18 mA to +5.5 V dc Storage temperature range -65C to +150C Maximum power dissipation (PD) 1/ . 187mW Lead temperatu

10、re (soldering, 10 seconds) . +300C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C 1.4 Recommended operating conditions. Supply voltage range (VCC) . 4.5 V dc minimum to 5.5 V dc maximum Minimum high level input voltage (VIH) . 2.0 V dc Maximum low level

11、input voltage (VIL) 0.7 V dc Case operating temperature range (TC) -55C to +125C _ 1/ Maximum power dissipation is defined as VCCx ICC, and must withstand the added PDdue to short-circuit test; e.g., IOS. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,

12、-,-STANDARD MICROCIRCUIT DRAWING SIZE A 76006 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of t

13、his drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MI

14、L-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online

15、at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein,

16、 the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for n

17、on-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in ac

18、cordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of t

19、he device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensio

20、ns shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figur

21、e 2. 3.2.4 Logic diagrams. The logic diagrams shall be as specified on figure 3. 3.2.5 Switching waveforms. The switching waveforms shall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as spec

22、ified in table I and shall apply over the full case operating temperature range. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 76006 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEE

23、T 4 DSCC FORM 2234 APR 97 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be ma

24、rked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with

25、a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). Th

26、e certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in M

27、IL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity re

28、tain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535,

29、 appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. T

30、he test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the inte

31、nt specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. Provided by IHSNot for ResaleNo

32、 reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 76006 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C

33、unless otherwise specified Group A subgroupsDevice type Limits Unit Min Max High level output voltage VOH VCC = 4.5 V, IOH = -400 A VIL= 0.7 V 1, 2, 3 All 2.5 V Low level output voltage VOL VCC= 4.5 V, IOL= 4 mA VIH= 2.0 V 1, 2, 3 All 0.4 V Input clamp voltage VIC VCC= 4.5 V, IIN= -18 mA, TC= +25C 1

34、 All -1.5 V High level input current IIH1 VCC= 5.5 V, VIH= 2.7 V 1, 2, 3 All 20 A IIH2 VCC= 5.5 V, VIH= 5.5 V 1, 2, 3 All 100 A Low level input current IIL VCC= 5.5 V, VIL= 0.4 V 1, 2, 3 All -400 A Short-circuit output current IOS VCC= 5.5 V 1/ 1, 2, 3 All -6 -130 mA Supply current ICCVCC= 5.5 V 1,

35、2, 3 All 34 mA Functional tests See 4.3.1c 7 All fMAX9 25 MHz VCC= 5.0 V, RL= 2 k 5% CL= 15 pF 10% 10, 11 All 15 MHz 20 Maximum clock frequency CL= 50 pF 10% 10, 11 All 14 MHz tPHL19 35 ns CL= 15 pF 10% 10, 11 All 49 ns 40 Propagation delay time, high-to-low level, 2/ clear to Q CL= 50 pF 10% 10, 11

36、 All 56 ns tPLH29 40 CL= 15 pF 10% 10, 11 All 56 ns 45 Propagation delay time, low-to-high level, 2/ load to Q CL= 50 pF 10% 10, 11 All 63 ns tPHL29 40 CL= 15 pF 10% 10, 11 All 56 ns 45 Propagation delay time, high-to-low level, 2/ load to Q CL= 50 pF 10% 10, 11 All 63 ns See footnotes at end of tab

37、le. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 76006 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - C

38、ontinued. Test Symbol Conditions -55C TC +125C unless otherwise specified Group A subgroupsDevice type Limits Unit Min Max tPLH39 All 26 ns VCC= 5.0 V, RL= 2 k 5% CL= 15 pF 10% 10, 11 All 36 ns 31 Propagation delay time, low-to-high level, 2/ count up to carry CL= 50 pF 10% 10, 11 All 43 ns tPHL39 3

39、3 CL= 15 pF 10% 10, 11 All 46 ns 38 Propagation delay time, high-to-low level, 2/ count up to carry CL= 50 pF 10% 10, 11 All 53 ns tPLH49 24 CL= 15 pF 10% 10, 11 All 34 ns 29 Propagation delay time, low-to-high level, 2/ count down to borrow CL= 50 pF 10% 10, 11 All 41 ns tPHL49 33 CL= 15 pF 10% 10,

40、 11 All 46 ns 38 Propagation delay time, high-to-low level, 2/ count down to borrow CL= 50 pF 10% 10, 11 All 53 ns tPLH59 38 CL= 15 pF 10% 10, 11 All 53 ns 43 Propagation delay time, low-to-high level, 2/ either count to Q CL= 50 pF 10% 10, 11 All 60 ns tPHL59 47 CL= 15 pF 10% 10, 11 All 66 ns 52 Pr

41、opagation delay time, high-to-low level, 2/ either count to Q CL= 50 pF 10% 10, 11 All 73 ns 1/ Not more than one output should be shorted at a time, and the duration of the short-circuit condition should not exceed one second. 2/ Propagation delay time testing may be performed using either CL= 15 p

42、F or CL= 50 pF. However, the manufacturer must certify and guarantee that the microcircuits meet the switching test limits specified for a 50 pF load. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 76006 DEFENSE

43、SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEET 7 DSCC FORM 2234 APR 97 Device types 01 01 Case outlines E, F 2 Terminal number Terminal symbols Terminal symbols 1 B N/C 2 QB B 3 QA QB 4 DOWN QA 5 UP DOWN 6 QC N/C 7 QD UP 8 GND QC 9 D QD 10 C GND 11 LOAD N/C 12 CO D 13 BO C 1

44、4 CLR LOAD 15 A CO 16 VCC N/C 17 - - - BO 18 - - - CLR 19 - - - A 20 - - - VCCFIGURE 1. Terminal connections. MODE SELECTION CLR LOAD CPU CPD MODE H X X X Reset (Asyn.) L L X X Preset (Asyn.) L H H H No change L H H Count up L H H Count down H = High voltage level L = Low voltage level X = Dont care

45、 condition = Clock transition low to high FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 76006 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEET 8 DSCC FORM 22

46、34 APR 97 FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 76006 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEET 9 DSCC FORM 2234 APR 97 VOLTAGE WAVEFORMS NO

47、TES: 1. The pulse generators have the following characteristics: ZOUT 50 and for the data pulse generator PRR 500 kHz, duty cycle = 50%; for the load pulse generator PRR is two times data PRR, duty cycle = 50%. 2. CLincludes probe and jig capacitance. 3. Diodes are 1N3064 or equivalent. 4. tr 15 ns

48、and tf 7 ns. 5. Vref= 1.3 V. FIGURE 4. Switching waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 76006 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEET 10 DSCC FORM 2234 APR 97 NOTES: 1. Clear overrides load, data, and count inputs. 2. When counting up, count-down input must be high; when counting down, count-up input must be high. FIGURE 4. Switching waveforms - Continued. Provided