DLA SMD-5962-76020 REV H-2010 MICROCIRCUIT DIGITAL BIPOLAR LOW POWER SCHOTTKY TTL NAND GATES MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED E Delete vendors, CAGE 18324 and 27014. Convert to military drawing format. Table I, tPLHand IILchanges. 87-10-16 R. P. Evans F Update to reflect latest changes in format and requirements. Editorial changes throughout. -les 03-03-31 Raymond Monnin

2、G Add class “V“ to document. Update to reflect latest changes in format and requirements. Editorial changes throughout. -les 04-01-20 Raymond Monnin H Update drawing to current requirements. Editorial changes throughout. - gap 10-05-14 Charles F. Saffle CURRENT CAGE CODE 67268 The original first she

3、et of this drawing has been replaced. REV SHET REV SHET REV STATUS REV H H H H H H H H H H OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 PMIC N/A PREPARED BY T. E. Gordon DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FO

4、R USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY R. F. Gonzales APPROVED BY N. A. Hauck MICROCIRCUIT, DIGITAL, BIPOLAR LOW POWER SCHOTTKY TTL, NAND GATES, MONOLITHIC SILICON DRAWING APPROVAL DATE 76-03-24 AMSC N/A REVISION LEVEL H SIZE A CAGE CODE 14933 76020 SHEET 1 OF

5、10 DSCC FORM 2233 APR 97 5962-E154-10 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 76020 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scop

6、e. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice o

7、f Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following examples. For device classes M and Q: 76020 01 C X Drawing number Device type (see 1.2.2) Case outline (see 1.2.4)Lead finish (see 1.2.5)For device class V: 5962 - 76020 01 V C X Federa

8、l stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) /Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked

9、with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows:

10、 Device type Generic number Circuit function 01 54LS26 Quad 2-input high-voltage positive NAND gate with open collector outputs 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as listed below. Since the device class designator has

11、 been added after the original issuance of this drawing, device classes M and Q designators will not be included in the PIN and will not be marked on the device. Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class le

12、vel B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 76020 DEFENSE SUPPLY CENTER COLUMBUS COLUMBU

13、S, OHIO 43218-3990 REVISION LEVEL H SHEET 3 DSCC FORM 2234 APR 97 1.2.4 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style C GDIP1-T14 or CDIP2-T14 14 dual-in-line package D GDFP1-F14or CDFP2-F14 14 flat pa

14、ckage 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 1.3 Absolute maximum ratings. 1/ Supply voltage . -0.5 V dc to +7.0 V dc Input voltage range . -1.5 V dc at -18 mA to +5.5 V dc Storage temperature ra

15、nge -65C to +150C Maximum power dissipation (PD) 2/ . 24 mW Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Junction temperature (TJ) +175C 1.4 Recommended operating conditions. Supply voltage range (VCC) 4.5 V dc minimum to 5.5 V dc maximum

16、Minimum high level input voltage (VIH) 2.0 V dc Maximum low level input voltage (VIL) . 0.7 V dc Case operating temperature range (TC) -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of th

17、is drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL

18、-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online a

19、t https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing tak

20、es precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and a

21、ffect reliability. 2/ Must withstand the added PDdue to short circuit test e.g., IOS. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 76020 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL H

22、 SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan

23、 shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, constr

24、uction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connectio

25、ns shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, th

26、e electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical te

27、sts for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the opt

28、ion of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certificati

29、on/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of comp

30、liance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.

31、6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL

32、-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of c

33、hange for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the

34、acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing

35、 shall be in microcircuit group number 9 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 76020 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 5 DSC

36、C FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC+125C unless otherwise specified Group A subgroups Limits Unit Min Max Collector cutoff current ICEXVCC= 4.5 V, VOH= 12.0 V 1, 2, 3 50 A VIL= 0.7 V, VOH= 15.0 V 1, 2, 3 2.5 1.0 mA Low level output volta

37、ge VOLVCC= 4.5 V, IOL= 4.0 mA, VIN= 0.7 V or 2.0 V 1, 2, 3 0.4 V Input clamp voltage VICVCC= 4.5 V, IIN= -18 mA, TC= +25C 1 -1.5 V High level input current IIH1 VCC= 5.5 V, VIH= 2.7 V 1, 2, 3 20 A IIH2 VCC= 5.5 V, VIH= 5.5 V 1, 2, 3 100 A Low level input current IILVCC= 5.5 V, VIL= 0.4 V 1, 2, 3 -40

38、0 A High level supply current ICCHVCC= 5.5 V, VIN= 0 V 1, 2, 3 1.6 mA Low level supply current ICCLVCC= 5.5 V, VIN= 4.5 V 1, 2, 3 4.4 mA Functional tests See 4.4.1c 7, 8 Propagation delay time, high to low level tPHLVCC= 5.0 V, RL= 2 k5% CL= 15 pF 10% 2/ 9 28 ns 10, 1139 ns 1/ CL= 50 pF 10% 9 33 ns

39、10, 1146 ns Propagation delay time, low to high level tPLHCL= 15 pF 10% 2/ 9 32 ns 10, 1145 ns CL= 50 pF 10% 9 40 ns 10, 1152 ns 1/ Propagation delay time testing testing may be performed using either CL= 15 pF or CL= 50 pF. However, the manufacturer must certify and guarantee that the microcircuits

40、 meet the switching test limits specified for a 50 pF load. 2/ Parameters are guaranteed if not tested. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 76020 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-399

41、0 REVISION LEVEL H SHEET 6 DSCC FORM 2234 APR 97 Device type 01 Case outlines C and D Terminal number Terminal symbol 1 1A 2 1B 3 1Y 4 2A 5 2B 6 2Y 7 GND 8 3Y 9 3A 10 3B 11 4Y 12 4A 13 4B 14 VCCFIGURE 1. Terminal connections. Truth table each gate Input Output A B Y L L H H L H L H H H H L FIGURE 2.

42、 Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 76020 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 7 DSCC FORM 2234 APR 97 FIGURE 3. Logic diagram. Provided by IHSN

43、ot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 76020 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 8 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. For device classes Q and V

44、, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedu

45、res shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in acc

46、ordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. 4.2.1 Additional criteria for device class M. a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacture

47、r under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015. (2) TA= +125C, minimum. b

48、. Interim and final electrical test parameters shall be as specified in table II herein. 4.2.2 Additional criteria for device classes Q and V. a. The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturers QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under document revision level control of the device manufacturers Technology Review Board (TRB) in accordance with MIL-PRF-38535 and shall be made available to the acquiring