DLA SMD-5962-77006 REV G-2009 MICROCIRCUIT DIGITAL LOW POWER SCHOTTKY TTL SHIFT REGISTER MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED D Delete min. limits from prop delays. Editorial changes throughout. 86-01-07 N. A. Hauck E Changes in accordance with NOR 5962-R143-92. 92-02-21 M. Poelking F Drawing updated to reflect current requirements. Added class V requirements. Updated tab

2、le II. Redrawn. - gt 03-12-15 R. Monnin G Update drawing to current requirements. Editorial changes throughout. - gap 09-08-20 Charles F. Saffle CURRENT CAGE CODE 67268 The original first sheet of this drawing has been replaced. REV SHET REV SHET REV STATUS REV G G G G G G G G G G OF SHEETS SHEET 1

3、2 3 4 5 6 7 8 9 10 PMIC N/A PREPARED BY C. R. Jackson DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY A. J. Foley APPROVED BY N. A.

4、Hauck MICROCIRCUIT, DIGITAL, LOW POWER SCHOTTKY TTL, SHIFT REGISTER, MONOLITHIC SILICON DRAWING APPROVAL DATE 77-04-15 AMSC N/A REVISION LEVEL G SIZE A CAGE CODE 14933 77006 SHEET 1 OF 10 DSCC FORM 2233 APR 97 5962-E243-09 Provided by IHSNot for ResaleNo reproduction or networking permitted without

5、license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 77006 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M

6、) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following

7、examples. For device classes M and Q: 77006 01 E X Drawing number Device type (see 1.2.2) Case outline (see 1.2.4)Lead finish (see 1.2.5)For device class V: 5962 - 77006 01 V E X Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see

8、 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) /Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified

9、 RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54LS165 8 bit parallel load shift register 1.2.3 Device class desig

10、nator. The device class designator is a single letter identifying the product assurance level as listed below. Since the device class designator has been added after the original issuance of this drawing, device classes M and Q designators will not be included in the PIN and will not be marked on th

11、e device. Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 Provided by IHSNot for ResaleNo

12、 reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 77006 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 3 DSCC FORM 2234 APR 97 1.2.4 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follow

13、s: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line package F GDFP2-F16 or CDFP3-F16 16 Flat package 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 1

14、.3 Absolute maximum ratings. Supply voltage range -0.5 V dc to +7.0 V dc Input voltage range . -1.5 V dc at -18 mA to 5.5 V dc Storage temperature . -65C to +150C Maximum power dissipation (PD) 1/ 198 mW Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC) See MIL

15、-STD-1835 Junction temperature (TJ) +175C 1.4 Recommended operating conditions. Supply voltage (VCC) . 4.5 V dc minimum to 5.5 V dc maximum Minimum high level input voltage (VIH) 2.0 V dc Maximum low level input voltage (VIL) . 0.7 V dc Case operating temperature range (TC) -55C to +125C 2. APPLICAB

16、LE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT

17、 OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-10

18、3 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Ord

19、er of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. _ 1/ Must withstand t

20、he added PDdue to short circuit test (e.g., IOS). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 77006 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 4 DSCC FORM 2234 APR 97 3. RE

21、QUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or

22、function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shal

23、l be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1

24、. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and

25、shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2

26、 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall stil

27、l be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in M

28、IL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this d

29、rawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supp

30、ly for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required fo

31、r device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) in

32、volving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentatio

33、n. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 12 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo rep

34、roduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 77006 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C Grou

35、p A subgroups Limits Unit unless otherwise specified Min Max High level output voltage VOHVCC= 4.5 V, IOH= -400 mA, VIN= 2.0 V or 0.7 V 1, 2, 3 2.5 V Low -level output voltage VOLVCC= 4.5 V, IOL= 4 mA, VIN= 2.0 V or 0.7 V 1, 2, 3 0.4 V Input clamp voltage VICVCC= 4.5 V, IIN= -18 mA, TC= +25C 1 -1.5

36、V High level input current IIHVCC= 5.5 V, VIH= 2.7 V 1, 2, 3 60 A Low-level input current IILVCC= 5.5 V, VIL= 0.4 V 1, 2, 3 -1.2 mA Short-circuit output current IOSVCC= 5.5 V 1/ 1, 2, 3 -15 -100 mA Supply current ICCVCC= 5.5 V 1, 2, 3 36 mA Functional tests See 4.4.1c 7, 8 Maximum clock frequency fM

37、AXVCC= 5.0 V RL= 2 k 5% CL= 15 pF 10% 9 25 MHz 2/ 10, 11 20 RL= 2 k 5% CL= 50 pF 10% 9 20 10, 11 15Propagation delay time, high to low level, output from clock to output 2/ tPHL1VCC= 5.0 V RL= 2 k 5% CL= 15 pF 10% 9 40 ns 10, 11 56RL= 2 k 5% CL= 50 pF 10% 9 45 10, 11 63 Propagation delay time, low t

38、o high level, output from clock to output 2/ tPLH1VCC= 5.0 V RL= 2 k 5% CL= 15 pF 10% 9 40 ns 10, 11 56RL= 2 k 5% CL= 50 pF 10% 9 45 10, 11 63 Propagation delay time, high to low level, output from clock (load input high) to QH2/ tPHL2VCC= 5.0 V RL= 2 k 5% CL= 15 pF 10% 9 30 ns 10, 11 42RL= 2 k 5% C

39、L= 50 pF 10% 9 35 10, 11 49 Propagation delay time, low to high level, output from clock (load input high) to QH2/ tPLH2VCC= 5.0 V RL= 2 k 5% CL= 15 pF 10% 9 25 ns 10, 11 35RL= 2 k 5% CL= 50 pF 10% 9 30 10, 11 42 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networki

40、ng permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 77006 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions -55C TC +125C Group A subgrou

41、ps Limits Unit unless otherwise specified Min Max Propagation delay time, high to low level, output from clock (load input low) to QH2/ tPHL3VCC= 5.0 V RL= 2 k 5% CL= 15 pF 10% 9 25 ns 10, 11 35RL= 2 k 5% CL= 50 pF 10% 9 30 10, 11 42 Propagation delay time, low to high level, output from clock (load

42、 input low) to QH2/ tPLH3VCC= 5.0 V RL= 2 k 5% CL= 15 pF 10% 9 30 ns 10, 11 42RL= 2 k 5% CL= 50 pF 10% 9 35 10, 11 49 Propagation delay time, high to low level, output from load to any Q 2/ tPHL4VCC= 5.0 V RL= 2 k 5% CL= 15 pF 10% 9 35 ns 10, 11 49RL= 2 k 5% CL= 50 pF 10% 9 40 10, 11 56 Propagation

43、delay time, low to high level, output from load to any Q 2/ tPLH4VCC= 5.0 V RL= 2 k 5% CL= 15 pF 10% 9 35 ns 10, 11 49RL= 2 k 5% CL= 50 pF 10% 9 40 10, 11 56 1/ Not more than one output should be shorted at a time, and the duration of the short circuit condition should not exceed one second. 2/ Prop

44、agation delay time testing and maximum clock frequency testing may be performed using either CL= 15 pF, CL= 45 pF or CL= 50 pF. However, the manufacturer must certify and guarantee that the microcircuits meet the switching test limits specified for a 50 pF load. Provided by IHSNot for ResaleNo repro

45、duction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 77006 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 7 DSCC FORM 2234 APR 97 Device type 01 Case outlines E and F Terminal number Terminal symbol 1 SHIFT/LOAD 2 CLOCK3 E

46、 4 F 5 G 6 H 7 OUTPUT Q%H8 GND 9 OUTPUT QH10 SERIAL INPUT 11 A 12 B 13 C 14 D 15 INHIBIT 16 VCCFIGURE 1. Terminal connections. INPUTS INTERNAL SHIFT/ CLOCK CLOCK SERIAL PARALLEL OUTPUTS OUTPUT LOAD INHIBIT A.H QAQBQHL X X X a.h a b h H L L X X QAOQBOQHOH L H X H QAnQGnH L L X L QAnQGnH H X X X QAOQB

47、OQHOH = high level (steady state) L = low level (steady state) X = irrelevant (any input, including transitions) transition from low to high level a, b.h = the level of steady state input at inputs A thru H, respectively. QAOthru QHO= the level of QAthru QH, respectively, before the indicated steady

48、 state input conditions were established Anthru QHn= the level of QAthru QH, respectively, before the most recent transition of the clock. FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 77006 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 8 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. For device classes Q a